From f93f248a78a2c73114641c27042c16f6593dc5dc Mon Sep 17 00:00:00 2001 From: Olivier Martin Date: Wed, 17 Jul 2013 06:23:07 +0000 Subject: [PATCH] ArmPlatformPkg: Removed the check on the CpuId to release the secondary cores from their mailbox spinning The idea is to remove the PCD PcdGicPrimaryCoreId to make the port easier (and also to allow changing the primary boot CPU without adding more platform specific code to UEFI). There is a risk the mailboxes contain garbage at boot time. But it should be easy enough to clear the mailboxes when starting UEFI to workaround this limitation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14477 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPlatformPkg/PrePeiCore/MainMPCore.c | 5 ++--- ArmPlatformPkg/PrePi/MainMPCore.c | 5 ++--- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/ArmPlatformPkg/PrePeiCore/MainMPCore.c b/ArmPlatformPkg/PrePeiCore/MainMPCore.c index afe36a7538..29c96a2296 100644 --- a/ArmPlatformPkg/PrePeiCore/MainMPCore.c +++ b/ArmPlatformPkg/PrePeiCore/MainMPCore.c @@ -45,7 +45,6 @@ SecondaryMain ( UINT32 CoreId; VOID (*SecondaryStart)(VOID); UINTN SecondaryEntryAddr; - UINTN AcknowledgedCoreId; ClusterId = GET_CLUSTER_ID(MpId); CoreId = GET_CORE_ID(MpId); @@ -88,8 +87,8 @@ SecondaryMain ( SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress); // Acknowledge the interrupt and send End of Interrupt signal. - ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase), &AcknowledgedCoreId, NULL); - } while ((SecondaryEntryAddr == 0) && (AcknowledgedCoreId != PcdGet32 (PcdGicPrimaryCoreId))); + ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase), NULL, NULL); + } while (SecondaryEntryAddr == 0); // Jump to secondary core entry point. SecondaryStart = (VOID (*)())SecondaryEntryAddr; diff --git a/ArmPlatformPkg/PrePi/MainMPCore.c b/ArmPlatformPkg/PrePi/MainMPCore.c index 998a7763f4..e8cd75186f 100644 --- a/ArmPlatformPkg/PrePi/MainMPCore.c +++ b/ArmPlatformPkg/PrePi/MainMPCore.c @@ -62,7 +62,6 @@ SecondaryMain ( UINT32 CoreId; VOID (*SecondaryStart)(VOID); UINTN SecondaryEntryAddr; - UINTN AcknowledgedCoreId; ClusterId = GET_CLUSTER_ID(MpId); CoreId = GET_CORE_ID(MpId); @@ -95,8 +94,8 @@ SecondaryMain ( SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress); // Acknowledge the interrupt and send End of Interrupt signal. - ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase), &AcknowledgedCoreId, NULL); - } while ((SecondaryEntryAddr == 0) && (AcknowledgedCoreId != PcdGet32 (PcdGicPrimaryCoreId))); + ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase), NULL, NULL); + } while (SecondaryEntryAddr == 0); // Jump to secondary core entry point. SecondaryStart = (VOID (*)())SecondaryEntryAddr;