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ArmPlatformPkg: Added Aarch64 Foundation Model
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14495 6f19259b-4bc3-4df7-8a09-765794883524
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#
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# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#
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################################################################################
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#
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# Defines Section - statements that will be processed to create a Makefile.
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#
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################################################################################
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[Defines]
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PLATFORM_NAME = ArmVExpressPkg-RTSM-AEMv8Ax4-foundation
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PLATFORM_GUID = 2a9d4992-0730-11e2-9829-1c6f650265cc
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PLATFORM_VERSION = 0.1
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DSC_SPECIFICATION = 0x00010005
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OUTPUT_DIRECTORY = Build/ArmVExpress-RTSM-AEMv8Ax4-foundation
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SUPPORTED_ARCHITECTURES = AARCH64
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BUILD_TARGETS = DEBUG|RELEASE
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SKUID_IDENTIFIER = DEFAULT
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FLASH_DEFINITION = ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4-foundation.fdf
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!include ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
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[LibraryClasses.common]
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ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
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ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexAEMv8Lib/ArmCortexAEMv8Lib.inf
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ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressFoundationLib.inf
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ArmPlatformSysConfigLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
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TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
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# Foundation model does not have an RTC. Use the NULL version.
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RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf
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[LibraryClasses.common.SEC]
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ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf
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ArmPlatformSecLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/ArmVExpressFoundationSecLib.inf
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ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressFoundationLibSec.inf
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[BuildOptions]
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GCC:*_*_AARCH64_PLATFORM_FLAGS == -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
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################################################################################
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#
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# Pcd Section - list of all EDK II PCD Entries defined by this Platform
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#
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################################################################################
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[PcdsFeatureFlag.common]
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!ifdef $(EDK2_SKIP_PEICORE)
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gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE
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gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|TRUE
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!endif
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## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
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# It could be set FALSE to save size.
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gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|FALSE
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[PcdsFixedAtBuild.common]
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gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Foundation Model"
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gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmFoundation"
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gArmPlatformTokenSpaceGuid.PcdCoreCount|4
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gArmTokenSpaceGuid.PcdVFPEnabled|1
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# Stacks for MPCores in Secure World (No SRAM on foundation model, put in RAM at 64MB)
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gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0xA4009000
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gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x1000
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# Stacks for MPCores in Monitor Mod (No SRAM on foundation model, put in RAM at 64MB)
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gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0xA4008000
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gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x100
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# Stacks for MPCores in Normal World (No SRAM on foundation model, put in RAM at 64MB)
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gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0xA4000000
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gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000
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# System Memory (2GB)
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gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
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gArmTokenSpaceGuid.PcdSystemMemorySize|0x80000000
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# Size of the region used by UEFI in permanent memory (Reserved 64MB)
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gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
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#
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# ARM Pcds
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#
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gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000
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#
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# ARM PrimeCell
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#
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## PL011 - Serial Terminal
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1c090000
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gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|38400
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#
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# ARM PL390 General Interrupt Controller
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#
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gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C001000
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C002000
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#
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# ARM OS Loader
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#
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# Versatile Express machine type (ARM VERSATILE EXPRESS = 2272) required for ARM Linux:
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gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"Linux from SemiHosting"
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gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"VenHw(C5B9C74A-6D72-4719-99AB-C59F199091EB)/Image"
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gArmPlatformTokenSpaceGuid.PcdDefaultBootInitrdPath|L"VenHw(C5B9C74A-6D72-4719-99AB-C59F199091EB)/filesystem.cpio.gz"
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gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|"console=ttyAMA0 earlyprintk=pl011,0x1c090000 maxcpus=4 debug user_debug=31 loglevel=9"
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gArmPlatformTokenSpaceGuid.PcdDefaultBootType|2
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gArmPlatformTokenSpaceGuid.PcdFdtDevicePath|L"VenHw(C5B9C74A-6D72-4719-99AB-C59F199091EB)/fdt.dtb"
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# Use the serial console (ConIn & ConOut) and the Graphic driver (ConOut)
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gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi();"
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gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi()"
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#
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# ARM Architectual Timer Frequency
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#
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# Set model tick to 120Mhz. This depends a lot on workstation performance.
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gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|120000000
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################################################################################
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#
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# Components Section - list of all EDK II Modules needed by this Platform
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#
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################################################################################
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[Components.common]
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#
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# SEC
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#
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ArmPlatformPkg/Sec/Sec.inf {
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<LibraryClasses>
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# Use the implementation which set the Secure bits
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ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
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}
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#
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# PEI Phase modules
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#
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!ifdef $(EDK2_SKIP_PEICORE)
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ArmPlatformPkg/PrePi/PeiMPCore.inf {
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<LibraryClasses>
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ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
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ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressFoundationLib.inf
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ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf
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}
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!else
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ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf {
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<LibraryClasses>
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ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
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}
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MdeModulePkg/Core/Pei/PeiMain.inf
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MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
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<LibraryClasses>
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PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
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}
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ArmPlatformPkg/PlatformPei/PlatformPeim.inf
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ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
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ArmPkg/Drivers/CpuPei/CpuPei.inf
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IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
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Nt32Pkg/BootModePei/BootModePei.inf
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MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
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MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
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<LibraryClasses>
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NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
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}
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!endif
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#
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# DXE
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#
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MdeModulePkg/Core/Dxe/DxeMain.inf {
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<LibraryClasses>
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PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
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NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
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}
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#
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# Architectural Protocols
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#
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ArmPkg/Drivers/CpuDxe/CpuDxe.inf
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MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
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MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
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MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
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MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
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MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
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MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
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EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
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EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
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EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
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MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
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MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
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MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
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MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
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EmbeddedPkg/SerialDxe/SerialDxe.inf
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MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
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ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
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ArmPkg/Drivers/TimerDxe/TimerDxe.inf
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MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
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#
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# Semi-hosting filesystem
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#
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ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
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#
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# FAT filesystem + GPT/MBR partitioning
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#
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MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
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MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
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MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
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#
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# Bds
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#
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MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
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ArmPlatformPkg/Bds/Bds.inf
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#
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# Copyright (c) 2011, 2013, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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################################################################################
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#
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# FD Section
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# The [FD] Section is made up of the definition statements and a
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# description of what goes into the Flash Device Image. Each FD section
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# defines one flash "device" image. A flash device image may be one of
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# the following: Removable media bootable image (like a boot floppy
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# image,) an Option ROM image (that would be "flashed" into an add-in
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# card,) a System "Flash" image (that would be burned into a system's
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# flash) or an Update ("Capsule") image that will be used to update and
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# existing system flash.
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#
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################################################################################
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[FD.RTSM_VE_Foundationv8_EFI]
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BaseAddress = 0xA0000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in RAM (Foundation model has no NOR Flash).
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Size = 0x00300000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
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ErasePolarity = 1
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# This one is tricky, it must be: BlockSize * NumBlocks = Size
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BlockSize = 0x00001000
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NumBlocks = 0x300
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################################################################################
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#
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# Following are lists of FD Region layout which correspond to the locations of different
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# images within the flash device.
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#
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# Regions must be defined in ascending order and may not overlap.
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#
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# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
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# the pipe "|" character, followed by the size of the region, also in hex with the leading
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# "0x" characters. Like:
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# Offset|Size
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# PcdOffsetCName|PcdSizeCName
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# RegionType <FV, DATA, or FILE>
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#
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################################################################################
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0x00000000|0x00080000
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gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
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FV = FVMAIN_SEC
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0x00080000|0x00280000
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gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
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FV = FVMAIN_COMPACT
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################################################################################
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#
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# FV Section
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#
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# [FV] section is used to define what components or modules are placed within a flash
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# device file. This section also defines order the components and modules are positioned
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# within the image. The [FV] section consists of define statements, set statements and
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# module statements.
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#
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################################################################################
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[FV.FVMAIN_SEC]
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FvAlignment = 16
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
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LOCK_CAP = TRUE
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LOCK_STATUS = TRUE
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WRITE_DISABLED_CAP = TRUE
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WRITE_ENABLED_CAP = TRUE
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WRITE_STATUS = TRUE
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WRITE_LOCK_CAP = TRUE
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WRITE_LOCK_STATUS = TRUE
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READ_DISABLED_CAP = TRUE
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READ_ENABLED_CAP = TRUE
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READ_STATUS = TRUE
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READ_LOCK_CAP = TRUE
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READ_LOCK_STATUS = TRUE
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INF ArmPlatformPkg/Sec/Sec.inf
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[FV.FvMain]
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BlockSize = 0x40
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NumBlocks = 0 # This FV gets compressed so make it just big enough
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FvAlignment = 16 # FV alignment and FV attributes setting.
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ERASE_POLARITY = 1
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MEMORY_MAPPED = TRUE
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STICKY_WRITE = TRUE
|
||||||
|
LOCK_CAP = TRUE
|
||||||
|
LOCK_STATUS = TRUE
|
||||||
|
WRITE_DISABLED_CAP = TRUE
|
||||||
|
WRITE_ENABLED_CAP = TRUE
|
||||||
|
WRITE_STATUS = TRUE
|
||||||
|
WRITE_LOCK_CAP = TRUE
|
||||||
|
WRITE_LOCK_STATUS = TRUE
|
||||||
|
READ_DISABLED_CAP = TRUE
|
||||||
|
READ_ENABLED_CAP = TRUE
|
||||||
|
READ_STATUS = TRUE
|
||||||
|
READ_LOCK_CAP = TRUE
|
||||||
|
READ_LOCK_STATUS = TRUE
|
||||||
|
|
||||||
|
INF MdeModulePkg/Core/Dxe/DxeMain.inf
|
||||||
|
|
||||||
|
#
|
||||||
|
# PI DXE Drivers producing Architectural Protocols (EFI Services)
|
||||||
|
#
|
||||||
|
INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
||||||
|
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
||||||
|
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
||||||
|
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
||||||
|
INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
|
||||||
|
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
||||||
|
INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
|
||||||
|
INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
||||||
|
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
||||||
|
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
||||||
|
|
||||||
|
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
|
||||||
|
|
||||||
|
#
|
||||||
|
# Multiple Console IO support
|
||||||
|
#
|
||||||
|
INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
|
||||||
|
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
|
||||||
|
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
|
||||||
|
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
|
||||||
|
INF EmbeddedPkg/SerialDxe/SerialDxe.inf
|
||||||
|
|
||||||
|
INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
|
||||||
|
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
|
||||||
|
INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
|
||||||
|
|
||||||
|
#
|
||||||
|
# Semi-hosting filesystem
|
||||||
|
#
|
||||||
|
INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
|
||||||
|
|
||||||
|
#
|
||||||
|
# FAT filesystem + GPT/MBR partitioning
|
||||||
|
#
|
||||||
|
INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
|
||||||
|
INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
|
||||||
|
INF FatBinPkg/EnhancedFatDxe/Fat.inf
|
||||||
|
INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
|
||||||
|
|
||||||
|
#
|
||||||
|
# UEFI application (Shell Embedded Boot Loader)
|
||||||
|
#
|
||||||
|
INF ShellBinPkg/UefiShell/UefiShell.inf
|
||||||
|
|
||||||
|
#
|
||||||
|
# Bds
|
||||||
|
#
|
||||||
|
INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
|
||||||
|
INF ArmPlatformPkg/Bds/Bds.inf
|
||||||
|
|
||||||
|
|
||||||
|
[FV.FVMAIN_COMPACT]
|
||||||
|
FvAlignment = 16
|
||||||
|
ERASE_POLARITY = 1
|
||||||
|
MEMORY_MAPPED = TRUE
|
||||||
|
STICKY_WRITE = TRUE
|
||||||
|
LOCK_CAP = TRUE
|
||||||
|
LOCK_STATUS = TRUE
|
||||||
|
WRITE_DISABLED_CAP = TRUE
|
||||||
|
WRITE_ENABLED_CAP = TRUE
|
||||||
|
WRITE_STATUS = TRUE
|
||||||
|
WRITE_LOCK_CAP = TRUE
|
||||||
|
WRITE_LOCK_STATUS = TRUE
|
||||||
|
READ_DISABLED_CAP = TRUE
|
||||||
|
READ_ENABLED_CAP = TRUE
|
||||||
|
READ_STATUS = TRUE
|
||||||
|
READ_LOCK_CAP = TRUE
|
||||||
|
READ_LOCK_STATUS = TRUE
|
||||||
|
|
||||||
|
!if $(EDK2_SKIP_PEICORE) == 1
|
||||||
|
INF ArmPlatformPkg/PrePi/PeiMPCore.inf
|
||||||
|
!else
|
||||||
|
INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
|
||||||
|
INF MdeModulePkg/Core/Pei/PeiMain.inf
|
||||||
|
INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
|
||||||
|
INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
|
||||||
|
INF ArmPkg/Drivers/CpuPei/CpuPei.inf
|
||||||
|
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
|
||||||
|
INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
|
||||||
|
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
|
||||||
|
!endif
|
||||||
|
|
||||||
|
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
|
||||||
|
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
|
||||||
|
SECTION FV_IMAGE = FVMAIN
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
################################################################################
|
||||||
|
#
|
||||||
|
# Rules are use with the [FV] section's module INF type to define
|
||||||
|
# how an FFS file is created for a given INF file. The following Rule are the default
|
||||||
|
# rules for the different module type. User can add the customized rules to define the
|
||||||
|
# content of the FFS file.
|
||||||
|
#
|
||||||
|
################################################################################
|
||||||
|
|
||||||
|
|
||||||
|
############################################################################
|
||||||
|
# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
|
||||||
|
############################################################################
|
||||||
|
#
|
||||||
|
#[Rule.Common.DXE_DRIVER]
|
||||||
|
# FILE DRIVER = $(NAMED_GUID) {
|
||||||
|
# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||||
|
# COMPRESS PI_STD {
|
||||||
|
# GUIDED {
|
||||||
|
# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||||
|
# UI STRING="$(MODULE_NAME)" Optional
|
||||||
|
# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||||
|
# }
|
||||||
|
# }
|
||||||
|
# }
|
||||||
|
#
|
||||||
|
############################################################################
|
||||||
|
|
||||||
|
[Rule.Common.SEC]
|
||||||
|
FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
|
||||||
|
TE TE Align = 128 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||||
|
}
|
||||||
|
|
||||||
|
[Rule.Common.PEI_CORE]
|
||||||
|
FILE PEI_CORE = $(NAMED_GUID) {
|
||||||
|
TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||||
|
UI STRING ="$(MODULE_NAME)" Optional
|
||||||
|
}
|
||||||
|
|
||||||
|
[Rule.Common.PEIM]
|
||||||
|
FILE PEIM = $(NAMED_GUID) {
|
||||||
|
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||||
|
TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||||
|
UI STRING="$(MODULE_NAME)" Optional
|
||||||
|
}
|
||||||
|
|
||||||
|
[Rule.Common.PEIM.TIANOCOMPRESSED]
|
||||||
|
FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
|
||||||
|
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||||
|
GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
|
||||||
|
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||||
|
UI STRING="$(MODULE_NAME)" Optional
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
[Rule.Common.DXE_CORE]
|
||||||
|
FILE DXE_CORE = $(NAMED_GUID) {
|
||||||
|
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||||
|
UI STRING="$(MODULE_NAME)" Optional
|
||||||
|
}
|
||||||
|
|
||||||
|
[Rule.Common.UEFI_DRIVER]
|
||||||
|
FILE DRIVER = $(NAMED_GUID) {
|
||||||
|
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||||
|
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||||
|
UI STRING="$(MODULE_NAME)" Optional
|
||||||
|
}
|
||||||
|
|
||||||
|
[Rule.Common.DXE_DRIVER]
|
||||||
|
FILE DRIVER = $(NAMED_GUID) {
|
||||||
|
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||||
|
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||||
|
UI STRING="$(MODULE_NAME)" Optional
|
||||||
|
}
|
||||||
|
|
||||||
|
[Rule.Common.DXE_RUNTIME_DRIVER]
|
||||||
|
FILE DRIVER = $(NAMED_GUID) {
|
||||||
|
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||||
|
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||||
|
UI STRING="$(MODULE_NAME)" Optional
|
||||||
|
}
|
||||||
|
|
||||||
|
[Rule.Common.UEFI_APPLICATION]
|
||||||
|
FILE APPLICATION = $(NAMED_GUID) {
|
||||||
|
UI STRING ="$(MODULE_NAME)" Optional
|
||||||
|
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||||
|
}
|
||||||
|
|
||||||
|
[Rule.Common.UEFI_DRIVER.BINARY]
|
||||||
|
FILE DRIVER = $(NAMED_GUID) {
|
||||||
|
DXE_DEPEX DXE_DEPEX Optional |.depex
|
||||||
|
PE32 PE32 |.efi
|
||||||
|
UI STRING="$(MODULE_NAME)" Optional
|
||||||
|
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||||
|
}
|
||||||
|
|
||||||
|
[Rule.Common.UEFI_APPLICATION.BINARY]
|
||||||
|
FILE APPLICATION = $(NAMED_GUID) {
|
||||||
|
PE32 PE32 |.efi
|
||||||
|
UI STRING="$(MODULE_NAME)" Optional
|
||||||
|
VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||||
|
}
|
@ -0,0 +1,53 @@
|
|||||||
|
#/* @file
|
||||||
|
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
|
||||||
|
#
|
||||||
|
# This program and the accompanying materials
|
||||||
|
# are licensed and made available under the terms and conditions of the BSD License
|
||||||
|
# which accompanies this distribution. The full text of the license may be found at
|
||||||
|
# http://opensource.org/licenses/bsd-license.php
|
||||||
|
#
|
||||||
|
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
|
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
#
|
||||||
|
#*/
|
||||||
|
|
||||||
|
[Defines]
|
||||||
|
INF_VERSION = 0x00010005
|
||||||
|
BASE_NAME = RTSMArmVExpressFoundationLib
|
||||||
|
FILE_GUID = ce5d91ae-0893-11e2-b6bb-1c6f650265cc
|
||||||
|
MODULE_TYPE = BASE
|
||||||
|
VERSION_STRING = 1.0
|
||||||
|
LIBRARY_CLASS = ArmPlatformLib
|
||||||
|
|
||||||
|
[Packages]
|
||||||
|
MdePkg/MdePkg.dec
|
||||||
|
MdeModulePkg/MdeModulePkg.dec
|
||||||
|
EmbeddedPkg/EmbeddedPkg.dec
|
||||||
|
ArmPkg/ArmPkg.dec
|
||||||
|
ArmPlatformPkg/ArmPlatformPkg.dec
|
||||||
|
|
||||||
|
[LibraryClasses]
|
||||||
|
IoLib
|
||||||
|
ArmLib
|
||||||
|
MemoryAllocationLib
|
||||||
|
SerialPortLib
|
||||||
|
PrintLib
|
||||||
|
|
||||||
|
[Sources.common]
|
||||||
|
RTSMFoundation.c
|
||||||
|
RTSMFoundationMem.c
|
||||||
|
|
||||||
|
[Sources.AARCH64]
|
||||||
|
AArch64/RTSMHelper.S | GCC
|
||||||
|
|
||||||
|
[FeaturePcd]
|
||||||
|
gEmbeddedTokenSpaceGuid.PcdCacheEnable
|
||||||
|
|
||||||
|
[FixedPcd]
|
||||||
|
gArmTokenSpaceGuid.PcdSystemMemoryBase
|
||||||
|
gArmTokenSpaceGuid.PcdSystemMemorySize
|
||||||
|
|
||||||
|
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
|
||||||
|
gArmTokenSpaceGuid.PcdArmPrimaryCore
|
||||||
|
|
||||||
|
gArmPlatformTokenSpaceGuid.PcdCoreCount
|
@ -0,0 +1,50 @@
|
|||||||
|
#/* @file
|
||||||
|
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
|
||||||
|
#
|
||||||
|
# This program and the accompanying materials
|
||||||
|
# are licensed and made available under the terms and conditions of the BSD License
|
||||||
|
# which accompanies this distribution. The full text of the license may be found at
|
||||||
|
# http://opensource.org/licenses/bsd-license.php
|
||||||
|
#
|
||||||
|
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
|
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
#
|
||||||
|
#*/
|
||||||
|
|
||||||
|
[Defines]
|
||||||
|
INF_VERSION = 0x00010005
|
||||||
|
BASE_NAME = RTSMArmVExpressFoundationLibSec
|
||||||
|
FILE_GUID = bc6e6418-0894-11e2-9dc3-1c6f650265cc
|
||||||
|
MODULE_TYPE = BASE
|
||||||
|
VERSION_STRING = 1.0
|
||||||
|
LIBRARY_CLASS = ArmPlatformLib
|
||||||
|
|
||||||
|
[Packages]
|
||||||
|
MdePkg/MdePkg.dec
|
||||||
|
MdeModulePkg/MdeModulePkg.dec
|
||||||
|
EmbeddedPkg/EmbeddedPkg.dec
|
||||||
|
ArmPkg/ArmPkg.dec
|
||||||
|
ArmPlatformPkg/ArmPlatformPkg.dec
|
||||||
|
|
||||||
|
[LibraryClasses]
|
||||||
|
IoLib
|
||||||
|
ArmLib
|
||||||
|
SerialPortLib
|
||||||
|
|
||||||
|
[Sources.common]
|
||||||
|
RTSMFoundation.c
|
||||||
|
|
||||||
|
[Sources.AARCH64]
|
||||||
|
AArch64/RTSMHelper.S | GCC
|
||||||
|
|
||||||
|
[FeaturePcd]
|
||||||
|
gEmbeddedTokenSpaceGuid.PcdCacheEnable
|
||||||
|
|
||||||
|
[FixedPcd]
|
||||||
|
gArmTokenSpaceGuid.PcdSystemMemoryBase
|
||||||
|
gArmTokenSpaceGuid.PcdSystemMemorySize
|
||||||
|
|
||||||
|
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
|
||||||
|
gArmTokenSpaceGuid.PcdArmPrimaryCore
|
||||||
|
|
||||||
|
gArmPlatformTokenSpaceGuid.PcdCoreCount
|
@ -0,0 +1,165 @@
|
|||||||
|
/** @file
|
||||||
|
*
|
||||||
|
* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
|
||||||
|
*
|
||||||
|
* This program and the accompanying materials
|
||||||
|
* are licensed and made available under the terms and conditions of the BSD License
|
||||||
|
* which accompanies this distribution. The full text of the license may be found at
|
||||||
|
* http://opensource.org/licenses/bsd-license.php
|
||||||
|
*
|
||||||
|
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
|
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
*
|
||||||
|
**/
|
||||||
|
|
||||||
|
#include <Library/IoLib.h>
|
||||||
|
#include <Library/ArmPlatformLib.h>
|
||||||
|
#include <Library/DebugLib.h>
|
||||||
|
#include <Library/PcdLib.h>
|
||||||
|
|
||||||
|
#include <Ppi/ArmMpCoreInfo.h>
|
||||||
|
|
||||||
|
#include <ArmPlatform.h>
|
||||||
|
|
||||||
|
|
||||||
|
UINTN
|
||||||
|
ArmGetCpuCountPerCluster (
|
||||||
|
VOID
|
||||||
|
);
|
||||||
|
|
||||||
|
ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
|
||||||
|
{
|
||||||
|
// Cluster 0, Core 0
|
||||||
|
0x0, 0x0,
|
||||||
|
|
||||||
|
// NOTE:
|
||||||
|
// The foundation model does not have the VE_SYS_REGS like all the other VE
|
||||||
|
// platforms. We pick a spot in RAM that *should* be safe in the simple case
|
||||||
|
// of no UEFI apps interfering (Only the Linux loader getting used). By the
|
||||||
|
// time we come to load Linux we should have all the cores in a safe place.
|
||||||
|
// The image expects to be loaded at 0xa0000000. We also place the mailboxes
|
||||||
|
// here as it does not matter if we corrupt the image at this time.
|
||||||
|
// NOTE also see: "ArmVExpressSecLibRTSM/AArch64/RTSMFoundationBoot.S"
|
||||||
|
|
||||||
|
// MP Core MailBox Set/Get/Clear Addresses and Clear Value
|
||||||
|
(EFI_PHYSICAL_ADDRESS)0xa0000000,
|
||||||
|
(EFI_PHYSICAL_ADDRESS)0xa0000000,
|
||||||
|
(EFI_PHYSICAL_ADDRESS)0xa0000000,
|
||||||
|
(UINT64)0x0
|
||||||
|
|
||||||
|
},
|
||||||
|
{
|
||||||
|
// Cluster 0, Core 1
|
||||||
|
0x0, 0x1,
|
||||||
|
|
||||||
|
// MP Core MailBox Set/Get/Clear Addresses and Clear Value
|
||||||
|
(EFI_PHYSICAL_ADDRESS)0xa0000000,
|
||||||
|
(EFI_PHYSICAL_ADDRESS)0xa0000000,
|
||||||
|
(EFI_PHYSICAL_ADDRESS)0xa0000000,
|
||||||
|
(UINT64)0x0
|
||||||
|
|
||||||
|
},
|
||||||
|
{
|
||||||
|
// Cluster 0, Core 2
|
||||||
|
0x0, 0x2,
|
||||||
|
|
||||||
|
// MP Core MailBox Set/Get/Clear Addresses and Clear Value
|
||||||
|
(EFI_PHYSICAL_ADDRESS)0xa0000000,
|
||||||
|
(EFI_PHYSICAL_ADDRESS)0xa0000000,
|
||||||
|
(EFI_PHYSICAL_ADDRESS)0xa0000000,
|
||||||
|
(UINT64)0x0
|
||||||
|
},
|
||||||
|
{
|
||||||
|
// Cluster 0, Core 3
|
||||||
|
0x0, 0x3,
|
||||||
|
|
||||||
|
// MP Core MailBox Set/Get/Clear Addresses and Clear Value
|
||||||
|
(EFI_PHYSICAL_ADDRESS)0xa0000000,
|
||||||
|
(EFI_PHYSICAL_ADDRESS)0xa0000000,
|
||||||
|
(EFI_PHYSICAL_ADDRESS)0xa0000000,
|
||||||
|
(UINT64)0x0
|
||||||
|
}
|
||||||
|
};
|
||||||
|
|
||||||
|
/**
|
||||||
|
Return the current Boot Mode
|
||||||
|
|
||||||
|
This function returns the boot reason on the platform
|
||||||
|
|
||||||
|
@return Return the current Boot Mode of the platform
|
||||||
|
|
||||||
|
**/
|
||||||
|
EFI_BOOT_MODE
|
||||||
|
ArmPlatformGetBootMode (
|
||||||
|
VOID
|
||||||
|
)
|
||||||
|
{
|
||||||
|
return BOOT_WITH_FULL_CONFIGURATION;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Initialize controllers that must setup in the normal world
|
||||||
|
|
||||||
|
This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
|
||||||
|
in the PEI phase.
|
||||||
|
|
||||||
|
**/
|
||||||
|
RETURN_STATUS
|
||||||
|
ArmPlatformInitialize (
|
||||||
|
IN UINTN MpId
|
||||||
|
)
|
||||||
|
{
|
||||||
|
/* The Foundation model has no SP810 to initialise. */
|
||||||
|
|
||||||
|
return RETURN_SUCCESS;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Initialize the system (or sometimes called permanent) memory
|
||||||
|
|
||||||
|
This memory is generally represented by the DRAM.
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
ArmPlatformInitializeSystemMemory (
|
||||||
|
VOID
|
||||||
|
)
|
||||||
|
{
|
||||||
|
// Nothing to do here
|
||||||
|
}
|
||||||
|
|
||||||
|
EFI_STATUS
|
||||||
|
PrePeiCoreGetMpCoreInfo (
|
||||||
|
OUT UINTN *CoreCount,
|
||||||
|
OUT ARM_CORE_INFO **ArmCoreTable
|
||||||
|
)
|
||||||
|
{
|
||||||
|
// Foundation model has no VE_SYS_REGS
|
||||||
|
// Only support one cluster
|
||||||
|
*CoreCount = ArmGetCpuCountPerCluster ();
|
||||||
|
*ArmCoreTable = mVersatileExpressMpCoreInfoTable;
|
||||||
|
|
||||||
|
return EFI_SUCCESS;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the context of PrePeiCore
|
||||||
|
EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
|
||||||
|
ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
|
||||||
|
|
||||||
|
EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
|
||||||
|
{
|
||||||
|
EFI_PEI_PPI_DESCRIPTOR_PPI,
|
||||||
|
&mArmMpCoreInfoPpiGuid,
|
||||||
|
&mMpCoreInfoPpi
|
||||||
|
}
|
||||||
|
};
|
||||||
|
|
||||||
|
VOID
|
||||||
|
ArmPlatformGetPlatformPpiList (
|
||||||
|
OUT UINTN *PpiListSize,
|
||||||
|
OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
|
||||||
|
)
|
||||||
|
{
|
||||||
|
*PpiListSize = sizeof(gPlatformPpiTable);
|
||||||
|
*PpiList = gPlatformPpiTable;
|
||||||
|
}
|
@ -0,0 +1,86 @@
|
|||||||
|
/** @file
|
||||||
|
*
|
||||||
|
* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
|
||||||
|
*
|
||||||
|
* This program and the accompanying materials
|
||||||
|
* are licensed and made available under the terms and conditions of the BSD License
|
||||||
|
* which accompanies this distribution. The full text of the license may be found at
|
||||||
|
* http://opensource.org/licenses/bsd-license.php
|
||||||
|
*
|
||||||
|
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
|
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
*
|
||||||
|
**/
|
||||||
|
|
||||||
|
#include <Library/ArmPlatformLib.h>
|
||||||
|
#include <Library/DebugLib.h>
|
||||||
|
#include <Library/PcdLib.h>
|
||||||
|
#include <Library/IoLib.h>
|
||||||
|
#include <Library/MemoryAllocationLib.h>
|
||||||
|
#include <ArmPlatform.h>
|
||||||
|
|
||||||
|
// Number of Virtual Memory Map Descriptors without a Logic Tile
|
||||||
|
#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 4
|
||||||
|
|
||||||
|
// DDR attributes
|
||||||
|
#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
|
||||||
|
#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
|
||||||
|
|
||||||
|
/**
|
||||||
|
Return the Virtual Memory Map of your platform
|
||||||
|
|
||||||
|
This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
|
||||||
|
|
||||||
|
@param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
|
||||||
|
Virtual Memory mapping. This array must be ended by a zero-filled
|
||||||
|
entry
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
ArmPlatformGetVirtualMemoryMap (
|
||||||
|
IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
|
||||||
|
)
|
||||||
|
{
|
||||||
|
ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
|
||||||
|
UINTN Index = 0;
|
||||||
|
ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
|
||||||
|
|
||||||
|
ASSERT(VirtualMemoryMap != NULL);
|
||||||
|
|
||||||
|
VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
|
||||||
|
if (VirtualMemoryTable == NULL) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
|
||||||
|
CacheAttributes = DDR_ATTRIBUTES_CACHED;
|
||||||
|
} else {
|
||||||
|
CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
|
||||||
|
}
|
||||||
|
|
||||||
|
// DDR
|
||||||
|
VirtualMemoryTable[Index].PhysicalBase = ARM_VE_DRAM_BASE;
|
||||||
|
VirtualMemoryTable[Index].VirtualBase = ARM_VE_DRAM_BASE;
|
||||||
|
VirtualMemoryTable[Index].Length = ARM_VE_DRAM_SZ;
|
||||||
|
VirtualMemoryTable[Index].Attributes = CacheAttributes;
|
||||||
|
|
||||||
|
// CPU peripherals. TRM. Manual says not all of them are implemented.
|
||||||
|
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_ON_CHIP_PERIPH_BASE;
|
||||||
|
VirtualMemoryTable[Index].VirtualBase = ARM_VE_ON_CHIP_PERIPH_BASE;
|
||||||
|
VirtualMemoryTable[Index].Length = ARM_VE_ON_CHIP_PERIPH_SZ;
|
||||||
|
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
|
||||||
|
|
||||||
|
// Peripheral CS2 and CS3
|
||||||
|
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;
|
||||||
|
VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;
|
||||||
|
VirtualMemoryTable[Index].Length = 2 * ARM_VE_SMB_PERIPH_SZ;
|
||||||
|
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
|
||||||
|
|
||||||
|
// End of Table
|
||||||
|
VirtualMemoryTable[++Index].PhysicalBase = 0;
|
||||||
|
VirtualMemoryTable[Index].VirtualBase = 0;
|
||||||
|
VirtualMemoryTable[Index].Length = 0;
|
||||||
|
VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
|
||||||
|
|
||||||
|
*VirtualMemoryMap = VirtualMemoryTable;
|
||||||
|
}
|
@ -0,0 +1,75 @@
|
|||||||
|
//
|
||||||
|
// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
|
||||||
|
//
|
||||||
|
// This program and the accompanying materials
|
||||||
|
// are licensed and made available under the terms and conditions of the BSD License
|
||||||
|
// which accompanies this distribution. The full text of the license may be found at
|
||||||
|
// http://opensource.org/licenses/bsd-license.php
|
||||||
|
//
|
||||||
|
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
|
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
//
|
||||||
|
//
|
||||||
|
|
||||||
|
#include <AsmMacroIoLib.h>
|
||||||
|
#include <Base.h>
|
||||||
|
#include <Library/ArmPlatformLib.h>
|
||||||
|
#include <AutoGen.h>
|
||||||
|
#include <ArmPlatform.h>
|
||||||
|
|
||||||
|
.text
|
||||||
|
.align 3
|
||||||
|
|
||||||
|
ASM_GLOBAL ASM_PFX(ArmPlatformSecBootAction)
|
||||||
|
ASM_GLOBAL ASM_PFX(ArmPlatformSecBootMemoryInit)
|
||||||
|
ASM_GLOBAL ASM_PFX(ArmSecMpCoreSecondariesWrite)
|
||||||
|
ASM_GLOBAL ASM_PFX(ArmSecMpCoreSecondariesRead)
|
||||||
|
|
||||||
|
/**
|
||||||
|
Call at the beginning of the platform boot up
|
||||||
|
|
||||||
|
This function allows the firmware platform to do extra actions at the early
|
||||||
|
stage of the platform power up.
|
||||||
|
|
||||||
|
Note: This function must be implemented in assembler as there is no stack set up yet
|
||||||
|
|
||||||
|
**/
|
||||||
|
ASM_PFX(ArmPlatformSecBootAction):
|
||||||
|
ret
|
||||||
|
|
||||||
|
/**
|
||||||
|
Initialize the memory where the initial stacks will reside
|
||||||
|
|
||||||
|
This memory can contain the initial stacks (Secure and Secure Monitor stacks).
|
||||||
|
In some platform, this region is already initialized and the implementation of this function can
|
||||||
|
do nothing. This memory can also represent the Secure RAM.
|
||||||
|
This function is called before the stack has been set up. Its implementation must ensure the stack
|
||||||
|
pointer is not used (probably required to use assembly language)
|
||||||
|
|
||||||
|
**/
|
||||||
|
ASM_PFX(ArmPlatformSecBootMemoryInit):
|
||||||
|
// The SMC does not need to be initialized for RTSM
|
||||||
|
ret
|
||||||
|
|
||||||
|
|
||||||
|
// NOTE:
|
||||||
|
// The foundation model does not have the VE_SYS_REGS like all the other VE
|
||||||
|
// platforms. We pick a spot in RAM that *should* be safe in the simple case
|
||||||
|
// of no UEFI apps interfering (Only the Linux loader getting used). By the
|
||||||
|
// time we come to load Linux we should have all the cores in a safe place.
|
||||||
|
// The image expects to be loaded at 0xa0000000. We also place the mailboxes
|
||||||
|
// here as it does not matter if we corrupt the image at this time.
|
||||||
|
// NOTE also see: "ArmVExpressLibRTSM/RTSMFoundation.c"
|
||||||
|
|
||||||
|
/* Write the flag register used to start Secondary cores */
|
||||||
|
ASM_PFX(ArmSecMpCoreSecondariesWrite):
|
||||||
|
ldr x1, =0xa0000000
|
||||||
|
str w0, [x1]
|
||||||
|
ret
|
||||||
|
|
||||||
|
|
||||||
|
/* Read the flag register used to start Secondary cores */
|
||||||
|
ASM_PFX(ArmSecMpCoreSecondariesRead):
|
||||||
|
ldr x1, =0xa0000000
|
||||||
|
ldr w0, [x1]
|
||||||
|
ret
|
@ -0,0 +1,42 @@
|
|||||||
|
#/* @file
|
||||||
|
#
|
||||||
|
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
|
||||||
|
#
|
||||||
|
# This program and the accompanying materials
|
||||||
|
# are licensed and made available under the terms and conditions of the BSD License
|
||||||
|
# which accompanies this distribution. The full text of the license may be found at
|
||||||
|
# http://opensource.org/licenses/bsd-license.php
|
||||||
|
#
|
||||||
|
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
|
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
#
|
||||||
|
#*/
|
||||||
|
|
||||||
|
[Defines]
|
||||||
|
INF_VERSION = 0x00010005
|
||||||
|
BASE_NAME = RTSMArmVExpressFoundationSecLib
|
||||||
|
FILE_GUID = 9de85c42-0894-11e2-8ed6-1c6f650265cc
|
||||||
|
MODULE_TYPE = BASE
|
||||||
|
VERSION_STRING = 1.0
|
||||||
|
LIBRARY_CLASS = ArmPlatformSecLib
|
||||||
|
|
||||||
|
[Packages]
|
||||||
|
MdePkg/MdePkg.dec
|
||||||
|
MdeModulePkg/MdeModulePkg.dec
|
||||||
|
EmbeddedPkg/EmbeddedPkg.dec
|
||||||
|
ArmPkg/ArmPkg.dec
|
||||||
|
ArmPlatformPkg/ArmPlatformPkg.dec
|
||||||
|
|
||||||
|
[LibraryClasses]
|
||||||
|
IoLib
|
||||||
|
ArmLib
|
||||||
|
SerialPortLib
|
||||||
|
|
||||||
|
[Sources.common]
|
||||||
|
RTSMFoundationSec.c
|
||||||
|
|
||||||
|
[Sources.AARCH64]
|
||||||
|
AArch64/RTSMFoundationBoot.S | GCC
|
||||||
|
|
||||||
|
[FixedPcd]
|
||||||
|
gArmTokenSpaceGuid.PcdFvBaseAddress
|
@ -0,0 +1,71 @@
|
|||||||
|
/** @file
|
||||||
|
*
|
||||||
|
* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
|
||||||
|
*
|
||||||
|
* This program and the accompanying materials
|
||||||
|
* are licensed and made available under the terms and conditions of the BSD License
|
||||||
|
* which accompanies this distribution. The full text of the license may be found at
|
||||||
|
* http://opensource.org/licenses/bsd-license.php
|
||||||
|
*
|
||||||
|
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||||
|
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||||
|
*
|
||||||
|
**/
|
||||||
|
|
||||||
|
#include <Library/IoLib.h>
|
||||||
|
#include <Library/ArmPlatformLib.h>
|
||||||
|
#include <Library/DebugLib.h>
|
||||||
|
#include <Library/PcdLib.h>
|
||||||
|
|
||||||
|
#include <Drivers/PL310L2Cache.h>
|
||||||
|
#include <Drivers/SP804Timer.h>
|
||||||
|
|
||||||
|
#include <ArmPlatform.h>
|
||||||
|
|
||||||
|
/**
|
||||||
|
Initialize the Secure peripherals and memory regions
|
||||||
|
|
||||||
|
If Trustzone is supported by your platform then this function makes the required initialization
|
||||||
|
of the secure peripherals and memory regions.
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
ArmPlatformSecTrustzoneInit (
|
||||||
|
IN UINTN MpId
|
||||||
|
)
|
||||||
|
{
|
||||||
|
// No TZPC or TZASC on RTSM to initialize
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Initialize controllers that must setup at the early stage
|
||||||
|
|
||||||
|
Some peripherals must be initialized in Secure World.
|
||||||
|
For example, some L2x0 requires to be initialized in Secure World
|
||||||
|
|
||||||
|
**/
|
||||||
|
RETURN_STATUS
|
||||||
|
ArmPlatformSecInitialize (
|
||||||
|
IN UINTN MpId
|
||||||
|
)
|
||||||
|
{
|
||||||
|
/* The Foundation model has no SP810 to initialise. */
|
||||||
|
|
||||||
|
return RETURN_SUCCESS;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
Call before jumping to Normal World
|
||||||
|
|
||||||
|
This function allows the firmware platform to do extra actions before
|
||||||
|
jumping to the Normal World
|
||||||
|
|
||||||
|
**/
|
||||||
|
VOID
|
||||||
|
ArmPlatformSecExtraAction (
|
||||||
|
IN UINTN MpId,
|
||||||
|
OUT UINTN* JumpAddress
|
||||||
|
)
|
||||||
|
{
|
||||||
|
*JumpAddress = PcdGet32(PcdFvBaseAddress);
|
||||||
|
}
|
@ -0,0 +1,28 @@
|
|||||||
|
Copyright (c) 2011-2013 ARM Limited
|
||||||
|
All rights reserved.
|
||||||
|
|
||||||
|
Redistribution and use in source and binary forms, with or without
|
||||||
|
modification, are permitted provided that the following conditions are
|
||||||
|
met:
|
||||||
|
|
||||||
|
* Redistributions of source code must retain the above copyright
|
||||||
|
notice, this list of conditions and the following disclaimer.
|
||||||
|
* Redistributions in binary form must reproduce the above copyright
|
||||||
|
notice, this list of conditions and the following disclaimer in
|
||||||
|
the documentation and/or other materials provided with the
|
||||||
|
distribution.
|
||||||
|
* Neither the name of ARM nor the names of its contributors may be
|
||||||
|
used to endorse or promote products derived from this software
|
||||||
|
without specific prior written permission.
|
||||||
|
|
||||||
|
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
|
||||||
|
IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||||
|
TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
|
||||||
|
PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||||
|
TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||||
|
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||||
|
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||||
|
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
|
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
@ -0,0 +1,96 @@
|
|||||||
|
#
|
||||||
|
# Makefile - build a UEFI boot image for booting from different exception levels.
|
||||||
|
#
|
||||||
|
# Copyright (C) 2011-2013 ARM Limited.
|
||||||
|
# All rights reserved.
|
||||||
|
#
|
||||||
|
# Redistribution and use in source and binary forms, with or without
|
||||||
|
# modification, are permitted provided that the following conditions are
|
||||||
|
# met:
|
||||||
|
#
|
||||||
|
# * Redistributions of source code must retain the above copyright
|
||||||
|
# notice, this list of conditions and the following disclaimer.
|
||||||
|
# * Redistributions in binary form must reproduce the above copyright
|
||||||
|
# notice, this list of conditions and the following disclaimer in
|
||||||
|
# the documentation and/or other materials provided with the
|
||||||
|
# distribution.
|
||||||
|
# * Neither the name of ARM nor the names of its contributors may be
|
||||||
|
# used to endorse or promote products derived from this software
|
||||||
|
# without specific prior written permission.
|
||||||
|
#
|
||||||
|
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
|
||||||
|
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||||
|
# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
|
||||||
|
# PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
# HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||||
|
# TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||||
|
# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||||
|
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||||
|
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
|
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
#
|
||||||
|
# This license can also be found in the LICENSE.TXT file.
|
||||||
|
|
||||||
|
|
||||||
|
# VE
|
||||||
|
PHYS_OFFSET := 0x80000000
|
||||||
|
UART_BASE := 0x1c090000
|
||||||
|
GIC_DIST_BASE := 0x2c001000
|
||||||
|
GIC_CPU_BASE := 0x2c002000
|
||||||
|
CNTFRQ := 0x01800000 # 24Mhz
|
||||||
|
|
||||||
|
BOOTLOADER := boot.S
|
||||||
|
LD_SCRIPT := model.lds.S
|
||||||
|
IMAGE_1 := uefi-bootstrap-el1.axf
|
||||||
|
IMAGE_2 := uefi-bootstrap-el2.axf
|
||||||
|
IMAGE_3 := uefi-bootstrap-el3.axf
|
||||||
|
IMAGE_3F := uefi-bootstrap-el3-foundation.axf
|
||||||
|
|
||||||
|
|
||||||
|
CROSS_COMPILE ?= aarch64-none-elf-
|
||||||
|
CC := $(CROSS_COMPILE)gcc
|
||||||
|
LD := $(CROSS_COMPILE)ld
|
||||||
|
|
||||||
|
all: $(IMAGE_1) $(IMAGE_2) $(IMAGE_3) $(IMAGE_3F)
|
||||||
|
|
||||||
|
clean:
|
||||||
|
rm -f *.axf *.o *.lds
|
||||||
|
|
||||||
|
$(IMAGE_1): boot1.o model1.lds
|
||||||
|
$(LD) -o $@ --script=model1.lds
|
||||||
|
|
||||||
|
$(IMAGE_2): boot2.o model2.lds
|
||||||
|
$(LD) -o $@ --script=model2.lds
|
||||||
|
|
||||||
|
$(IMAGE_3): boot3.o model3.lds
|
||||||
|
$(LD) -o $@ --script=model3.lds
|
||||||
|
|
||||||
|
$(IMAGE_3F): boot3f.o model3f.lds
|
||||||
|
$(LD) -o $@ --script=model3f.lds
|
||||||
|
|
||||||
|
boot1.o: $(BOOTLOADER) Makefile
|
||||||
|
$(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -DSTART_EL2=1 -DSTART_EL1=1 -c -o $@ $(BOOTLOADER)
|
||||||
|
|
||||||
|
boot2.o: $(BOOTLOADER) Makefile
|
||||||
|
$(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -DSTART_EL2=1 -c -o $@ $(BOOTLOADER)
|
||||||
|
|
||||||
|
boot3.o: $(BOOTLOADER) Makefile
|
||||||
|
$(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -c -o $@ $(BOOTLOADER)
|
||||||
|
|
||||||
|
boot3f.o: $(BOOTLOADER) Makefile
|
||||||
|
$(CC) $(CPPFLAGS) -DUART_BASE=$(UART_BASE) -DCNTFRQ=$(CNTFRQ) -DGIC_DIST_BASE=$(GIC_DIST_BASE) -DGIC_CPU_BASE=$(GIC_CPU_BASE) -DFOUNDATION_MODEL=1 -c -o $@ $(BOOTLOADER)
|
||||||
|
|
||||||
|
model1.lds: $(LD_SCRIPT) Makefile boot1.o
|
||||||
|
$(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT1 -E -P -C -o $@ $<
|
||||||
|
|
||||||
|
model2.lds: $(LD_SCRIPT) Makefile boot2.o
|
||||||
|
$(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT2 -E -P -C -o $@ $<
|
||||||
|
|
||||||
|
model3.lds: $(LD_SCRIPT) Makefile boot3.o
|
||||||
|
$(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT3 -E -P -C -o $@ $<
|
||||||
|
|
||||||
|
model3f.lds: $(LD_SCRIPT) Makefile boot3f.o
|
||||||
|
$(CC) $(CPPFLAGS) -DPHYS_OFFSET=$(PHYS_OFFSET) -DBOOT3F -E -P -C -o $@ $<
|
||||||
|
|
||||||
|
.PHONY: all clean
|
@ -0,0 +1,183 @@
|
|||||||
|
/*
|
||||||
|
* boot.S - simple register setup code for junping to a second stage bootloader
|
||||||
|
*
|
||||||
|
* Copyright (C) 2011-2013 ARM Limited.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are
|
||||||
|
* met:
|
||||||
|
*
|
||||||
|
* * Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* * Neither the name of ARM nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
|
||||||
|
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||||
|
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
|
||||||
|
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||||
|
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||||
|
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||||
|
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||||
|
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* This license can also be found in the LICENSE.TXT file.
|
||||||
|
*/
|
||||||
|
|
||||||
|
.text
|
||||||
|
|
||||||
|
.globl _start
|
||||||
|
|
||||||
|
.set LED_ADDR, 0x1c010008
|
||||||
|
|
||||||
|
_start:
|
||||||
|
/*
|
||||||
|
* EL3 initialisation
|
||||||
|
*/
|
||||||
|
|
||||||
|
// Set LED to show progress.
|
||||||
|
ldr x1, =LED_ADDR
|
||||||
|
mov w0, #0x1
|
||||||
|
str w0, [x1]
|
||||||
|
dsb sy
|
||||||
|
|
||||||
|
#if defined START_EL2
|
||||||
|
|
||||||
|
mrs x0, CurrentEL
|
||||||
|
cmp x0, #0xc // EL3?
|
||||||
|
b.ne start_ns // skip EL3 initialisation
|
||||||
|
|
||||||
|
mov x0, #0x30 // RES1
|
||||||
|
orr x0, x0, #(1 << 0) // Non-secure EL1
|
||||||
|
orr x0, x0, #(1 << 8) // HVC enable
|
||||||
|
orr x0, x0, #(1 << 10) // 64-bit EL2
|
||||||
|
msr scr_el3, x0
|
||||||
|
|
||||||
|
msr cptr_el3, xzr // Disable copro. traps to EL3
|
||||||
|
|
||||||
|
ldr x0, =CNTFRQ
|
||||||
|
msr cntfrq_el0, x0
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Check for the primary CPU to avoid a race on the distributor
|
||||||
|
* registers.
|
||||||
|
*/
|
||||||
|
mrs x0, mpidr_el1
|
||||||
|
tst x0, #15
|
||||||
|
b.ne 1f // secondary CPU
|
||||||
|
|
||||||
|
ldr x1, =GIC_DIST_BASE // GICD_CTLR
|
||||||
|
mov w0, #3 // EnableGrp0 | EnableGrp1
|
||||||
|
str w0, [x1]
|
||||||
|
|
||||||
|
1: ldr x1, =GIC_DIST_BASE + 0x80 // GICD_IGROUPR
|
||||||
|
mov w0, #~0 // Grp1 interrupts
|
||||||
|
str w0, [x1], #4
|
||||||
|
b.ne 2f // Only local interrupts for secondary CPUs
|
||||||
|
str w0, [x1], #4
|
||||||
|
str w0, [x1], #4
|
||||||
|
|
||||||
|
2: ldr x1, =GIC_CPU_BASE // GICC_CTLR
|
||||||
|
ldr w0, [x1]
|
||||||
|
mov w0, #3 // EnableGrp0 | EnableGrp1
|
||||||
|
str w0, [x1]
|
||||||
|
|
||||||
|
mov w0, #1 << 7 // allow NS access to GICC_PMR
|
||||||
|
str w0, [x1, #4] // GICC_PMR
|
||||||
|
|
||||||
|
msr sctlr_el2, xzr
|
||||||
|
|
||||||
|
#if defined START_EL1
|
||||||
|
|
||||||
|
/* Now setup our EL1. Controlled by EL2 config on Model */
|
||||||
|
mrs x0, hcr_el2 // Read EL2 Hypervisor configuration Register
|
||||||
|
orr x0, x0, #(1 << 31) // Set EL1 to be 64bit
|
||||||
|
|
||||||
|
// Send all interrupts to their respective Exception levels for EL2
|
||||||
|
bic x0, x0, #(1 << 3) // Disable virtual FIQ
|
||||||
|
bic x0, x0, #(1 << 4) // Disable virtual IRQ
|
||||||
|
bic x0, x0, #(1 << 5) // Disable virtual SError and Abort
|
||||||
|
msr hcr_el2, x0 // Write back our settings
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Enable architected timer access
|
||||||
|
*/
|
||||||
|
mrs x0, cnthctl_el2
|
||||||
|
orr x0, x0, #3 // Enable EL1 access to timers
|
||||||
|
msr cnthctl_el2, x0
|
||||||
|
|
||||||
|
mrs x0, cntkctl_el1
|
||||||
|
orr x0, x0, #3 // EL0 access to counters
|
||||||
|
msr cntkctl_el1, x0
|
||||||
|
|
||||||
|
/* Set ID regs */
|
||||||
|
mrs x0, midr_el1
|
||||||
|
mrs x1, mpidr_el1
|
||||||
|
msr vpidr_el2, x0
|
||||||
|
msr vmpidr_el2, x1
|
||||||
|
|
||||||
|
/* Coprocessor traps. */
|
||||||
|
mov x0, #0x33ff
|
||||||
|
msr cptr_el2, x0 // Disable copro. traps to EL2
|
||||||
|
|
||||||
|
msr hstr_el2, xzr // Disable CP15 traps to EL2
|
||||||
|
|
||||||
|
#endif // START_EL1
|
||||||
|
|
||||||
|
/* Configure UART. Primary CPU only */
|
||||||
|
mrs x4, mpidr_el1
|
||||||
|
tst x4, #15
|
||||||
|
b.ne 1f
|
||||||
|
|
||||||
|
/*
|
||||||
|
* UART initialisation (38400 8N1)
|
||||||
|
*/
|
||||||
|
ldr x4, =UART_BASE // UART base
|
||||||
|
mov w5, #0x10 // ibrd
|
||||||
|
str w5, [x4, #0x24]
|
||||||
|
mov w5, #0xc300
|
||||||
|
orr w5, w5, #0x0001 // cr
|
||||||
|
str w5, [x4, #0x30]
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Prepare the switch to the EL2_SP2 mode from EL3
|
||||||
|
*/
|
||||||
|
1: ldr x0, =start_ns // Return after mode switch
|
||||||
|
#if defined START_EL1
|
||||||
|
mov x1, #0x3c5 // EL1_SP1 | D | A | I | F
|
||||||
|
#else
|
||||||
|
mov x1, #0x3c9 // EL2_SP2 | D | A | I | F
|
||||||
|
#endif
|
||||||
|
|
||||||
|
msr elr_el3, x0
|
||||||
|
msr spsr_el3, x1
|
||||||
|
eret
|
||||||
|
|
||||||
|
#endif // START_EL2
|
||||||
|
|
||||||
|
|
||||||
|
start_ns:
|
||||||
|
|
||||||
|
/*
|
||||||
|
* We do not have NOR flash on the Foundation model. So run UEFI from RAM.
|
||||||
|
* On the full model we use the NOR FLASH to store UEFI, so start there.
|
||||||
|
*/
|
||||||
|
#if defined FOUNDATION_MODEL
|
||||||
|
mov x0, #0xa0000000
|
||||||
|
#else
|
||||||
|
mov x0, #0x0
|
||||||
|
#endif
|
||||||
|
br x0
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
|
.org 0x200
|
@ -0,0 +1,77 @@
|
|||||||
|
/*
|
||||||
|
* model.lds.S - simple linker script for stand-alone Linux booting
|
||||||
|
*
|
||||||
|
* Copyright (C) 2011, 2012 ARM Limited.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are
|
||||||
|
* met:
|
||||||
|
*
|
||||||
|
* * Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* * Neither the name of ARM nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
|
||||||
|
* IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||||
|
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
|
||||||
|
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
* HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
|
||||||
|
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||||
|
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||||
|
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||||
|
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||||
|
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* This license can also be found in the LICENSE.TXT file.
|
||||||
|
*/
|
||||||
|
|
||||||
|
OUTPUT_FORMAT("elf64-littleaarch64")
|
||||||
|
OUTPUT_ARCH(aarch64)
|
||||||
|
TARGET(binary)
|
||||||
|
|
||||||
|
#ifdef BOOT1
|
||||||
|
INPUT(./boot1.o)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BOOT2
|
||||||
|
INPUT(./boot2.o)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BOOT3
|
||||||
|
INPUT(./boot3.o)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BOOT3F
|
||||||
|
INPUT(./boot3f.o)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
. = PHYS_OFFSET;
|
||||||
|
#ifdef BOOT1
|
||||||
|
.text : { boot1.o }
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BOOT2
|
||||||
|
.text : { boot2.o }
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BOOT3
|
||||||
|
.text : { boot3.o }
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BOOT3F
|
||||||
|
.text : { boot3f.o }
|
||||||
|
#endif
|
||||||
|
|
||||||
|
.data : { *(.data) }
|
||||||
|
.bss : { *(.bss) }
|
||||||
|
}
|
@ -0,0 +1,88 @@
|
|||||||
|
<h1>AArch64 UEFI bootstraps</h1>
|
||||||
|
|
||||||
|
<p>Copyright (c) 2011-2013 ARM Limited. All rights reserved.
|
||||||
|
See the <code>LICENSE.TXT</code> file for more information.</p>
|
||||||
|
|
||||||
|
<p>Contents:</p>
|
||||||
|
|
||||||
|
<ul>
|
||||||
|
<li>Introduction</li>
|
||||||
|
<li>Build</li>
|
||||||
|
<li>Use on ARMv8 RTSM and FVP models</li>
|
||||||
|
<li>Use on ARMv8 Foundation model</li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h2>Introduction</h2>
|
||||||
|
|
||||||
|
<p>A bootstrap can be used to change the model state, like the Exception
|
||||||
|
Level (EL), before executing the UEFI binary.</p>
|
||||||
|
|
||||||
|
<p>For the ARMv8 RTSM and FVP models this can be used to show/test the UEFI binary
|
||||||
|
starting at different exception levels. The ARMv8 models start at EL3 by
|
||||||
|
default.</p>
|
||||||
|
|
||||||
|
<p>In the case of the Foundation model a bootstrap is required to jump to the
|
||||||
|
UEFI binary as loaded in RAM. This is required as the Foundation model cannot
|
||||||
|
load and execute UEFI binaries directly. The Foundation model can only load and
|
||||||
|
execute ELF binaries.</p>
|
||||||
|
|
||||||
|
<h2>Build</h2>
|
||||||
|
|
||||||
|
<p>Build the bootstraps using a AArch64 GCC cross-compiler. By default the
|
||||||
|
<code>Makefile</code> is configured to assume a GCC bare-metal toolchain:</p>
|
||||||
|
|
||||||
|
<pre><code>PATH=$PATH:<path/to/baremetal-tools/bin/> make clean
|
||||||
|
PATH=$PATH:<path/to/baremetal-tools/bin/> make
|
||||||
|
</code></pre>
|
||||||
|
|
||||||
|
<p>To build the bootstraps with a Linux GCC toolchain use the following
|
||||||
|
commands:</p>
|
||||||
|
|
||||||
|
<pre><code>PATH=$PATH:<path/to/aarch64-linux-gnu-tools/bin/> make clean
|
||||||
|
PATH=$PATH:<path/to/aarch64-linux-gnu-tools/bin/> CROSS_COMPILE=<gcc-prefix> make
|
||||||
|
</code></pre>
|
||||||
|
|
||||||
|
<p>The <code>gcc-prefix</code> depends on the specific toolchain distribution used. It can be
|
||||||
|
"aarch64-linux-gnu-" for example.</p>
|
||||||
|
|
||||||
|
<p>This will result in four <code>axf</code> files:</p>
|
||||||
|
|
||||||
|
<ul>
|
||||||
|
<li><p>uefi-bootstrap-el3 : The bootstrap jumps to the UEFI code in FLASH without
|
||||||
|
changing anything.</p></li>
|
||||||
|
<li><p>uefi-bootstrap-el2 : Setup EL3 and switch the model to EL2 before jumping to the
|
||||||
|
UEFI code in FLASH.</p></li>
|
||||||
|
<li><p>uefi-bootstrap-el1 : Setup EL3 and prepare to run at non-secure EL1. Switch to
|
||||||
|
non-secure EL1 and run the UEFI code in FLASH.</p></li>
|
||||||
|
<li><p>uefi-bootstrap-el3-foundation : The bootstrap jumps to the UEFI code in RAM
|
||||||
|
without changing anything. Only to be used with the
|
||||||
|
Foundation model. The Foundation model does not have
|
||||||
|
non-secure memory at address <code>0x0</code> and thus the UEFI image
|
||||||
|
should be pre-loaded into non-secure RAM at address
|
||||||
|
<code>0xA0000000</code>.</p></li>
|
||||||
|
</ul>
|
||||||
|
|
||||||
|
<h2>Use on ARMv8 RTSM and FVP models</h2>
|
||||||
|
|
||||||
|
<p>Add the '-a' option to the model start script and point to the required
|
||||||
|
bootstrap:</p>
|
||||||
|
|
||||||
|
<pre><code>< ... model start script as described in top-level readme file ... >
|
||||||
|
-a <path/to/bootstrap-binary-file>
|
||||||
|
</code></pre>
|
||||||
|
|
||||||
|
<p>NOTE: The Foundation model bootstrap should not be used with these models.</p>
|
||||||
|
|
||||||
|
<h2>Use on ARMv8 Foundation model</h2>
|
||||||
|
|
||||||
|
<p>The Foundation model takes an option for an ELF file to be loaded as well as an
|
||||||
|
option to load a binary data blob into RAM. This can be used to run UEFI in the
|
||||||
|
following manner:</p>
|
||||||
|
|
||||||
|
<pre><code><PATH_TO_INSTALLED_FOUNDATION_MODEL>/Foundation_v8 --cores=2 --visualization
|
||||||
|
--image=uefi-bootstrap-el3-foundation.axf --nsdata=RTSM_VE_FOUNDATIONV8_EFI.fd@0xA0000000
|
||||||
|
</code></pre>
|
||||||
|
|
||||||
|
<p>NOTE: The RTSM version of the bootstraps and UEFI image will not work as
|
||||||
|
expected on the Foundation model. Foundation model specific versions
|
||||||
|
should be used.</p>
|
@ -0,0 +1,92 @@
|
|||||||
|
AArch64 UEFI bootstraps
|
||||||
|
=======================
|
||||||
|
|
||||||
|
Copyright (c) 2011-2013 ARM Limited. All rights reserved.
|
||||||
|
See the `LICENSE.TXT` file for more information.
|
||||||
|
|
||||||
|
Contents:
|
||||||
|
|
||||||
|
* Introduction
|
||||||
|
* Build
|
||||||
|
* Use on ARMv8 RTSM and FVP models
|
||||||
|
* Use on ARMv8 Foundation model
|
||||||
|
|
||||||
|
|
||||||
|
Introduction
|
||||||
|
------------
|
||||||
|
|
||||||
|
A bootstrap can be used to change the model state, like the Exception
|
||||||
|
Level (EL), before executing the UEFI binary.
|
||||||
|
|
||||||
|
For the ARMv8 RTSM and FVP models this can be used to show/test the UEFI binary
|
||||||
|
starting at different exception levels. The ARMv8 models start at EL3 by
|
||||||
|
default.
|
||||||
|
|
||||||
|
In the case of the Foundation model a bootstrap is required to jump to the
|
||||||
|
UEFI binary as loaded in RAM. This is required as the Foundation model cannot
|
||||||
|
load and execute UEFI binaries directly. The Foundation model can only load and
|
||||||
|
execute ELF binaries.
|
||||||
|
|
||||||
|
|
||||||
|
Build
|
||||||
|
-----
|
||||||
|
|
||||||
|
Build the bootstraps using a AArch64 GCC cross-compiler. By default the
|
||||||
|
`Makefile` is configured to assume a GCC bare-metal toolchain:
|
||||||
|
|
||||||
|
PATH=$PATH:<path/to/baremetal-tools/bin/> make clean
|
||||||
|
PATH=$PATH:<path/to/baremetal-tools/bin/> make
|
||||||
|
|
||||||
|
To build the bootstraps with a Linux GCC toolchain use the following
|
||||||
|
commands:
|
||||||
|
|
||||||
|
PATH=$PATH:<path/to/aarch64-linux-gnu-tools/bin/> make clean
|
||||||
|
PATH=$PATH:<path/to/aarch64-linux-gnu-tools/bin/> CROSS_COMPILE=<gcc-prefix> make
|
||||||
|
|
||||||
|
The `gcc-prefix` depends on the specific toolchain distribution used. It can be
|
||||||
|
"aarch64-linux-gnu-" for example.
|
||||||
|
|
||||||
|
This will result in four `axf` files:
|
||||||
|
|
||||||
|
* uefi-bootstrap-el3 : The bootstrap jumps to the UEFI code in FLASH without
|
||||||
|
changing anything.
|
||||||
|
|
||||||
|
* uefi-bootstrap-el2 : Setup EL3 and switch the model to EL2 before jumping to the
|
||||||
|
UEFI code in FLASH.
|
||||||
|
|
||||||
|
* uefi-bootstrap-el1 : Setup EL3 and prepare to run at non-secure EL1. Switch to
|
||||||
|
non-secure EL1 and run the UEFI code in FLASH.
|
||||||
|
|
||||||
|
* uefi-bootstrap-el3-foundation : The bootstrap jumps to the UEFI code in RAM
|
||||||
|
without changing anything. Only to be used with the
|
||||||
|
Foundation model. The Foundation model does not have
|
||||||
|
non-secure memory at address `0x0` and thus the UEFI image
|
||||||
|
should be pre-loaded into non-secure RAM at address
|
||||||
|
`0xA0000000`.
|
||||||
|
|
||||||
|
|
||||||
|
Use on ARMv8 RTSM and FVP models
|
||||||
|
--------------------------------
|
||||||
|
|
||||||
|
Add the '-a' option to the model start script and point to the required
|
||||||
|
bootstrap:
|
||||||
|
|
||||||
|
< ... model start script as described in top-level readme file ... >
|
||||||
|
-a <path/to/bootstrap-binary-file>
|
||||||
|
|
||||||
|
NOTE: The Foundation model bootstrap should not be used with these models.
|
||||||
|
|
||||||
|
|
||||||
|
Use on ARMv8 Foundation model
|
||||||
|
-----------------------------
|
||||||
|
|
||||||
|
The Foundation model takes an option for an ELF file to be loaded as well as an
|
||||||
|
option to load a binary data blob into RAM. This can be used to run UEFI in the
|
||||||
|
following manner:
|
||||||
|
|
||||||
|
<PATH_TO_INSTALLED_FOUNDATION_MODEL>/Foundation_v8 --cores=2 --visualization
|
||||||
|
--image=uefi-bootstrap-el3-foundation.axf --nsdata=RTSM_VE_FOUNDATIONV8_EFI.fd@0xA0000000
|
||||||
|
|
||||||
|
NOTE: The RTSM version of the bootstraps and UEFI image will not work as
|
||||||
|
expected on the Foundation model. Foundation model specific versions
|
||||||
|
should be used.
|
Loading…
x
Reference in New Issue
Block a user