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UefiCpuPkg/CpuMpPei: Load GDT table on BSP
Load new GDT table and update segment accordingly. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17988 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Jeff Fan
vanjeff
parent
65e79f931f
commit
f9d30595ae
@ -14,6 +14,30 @@
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#include "CpuMpPei.h"
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#include "CpuMpPei.h"
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//
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// Global Descriptor Table (GDT)
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//
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GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {
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/* selector { Global Segment Descriptor } */
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/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor
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/* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor
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/* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor
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/* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
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/* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor
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/* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
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/* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor
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/* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor
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/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor
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};
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//
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// IA32 Gdt register
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//
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GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR mGdt = {
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sizeof (mGdtEntries) - 1,
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(UINTN) mGdtEntries
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};
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/**
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/**
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The Entry point of the MP CPU PEIM.
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The Entry point of the MP CPU PEIM.
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@ -36,6 +60,10 @@ CpuMpPeimInit (
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{
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{
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//
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// Load new GDT table on BSP
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//
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AsmInitializeGdt (&mGdt);
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return EFI_SUCCESS;
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return EFI_SUCCESS;
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}
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}
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@ -21,6 +21,36 @@
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#include <Library/BaseLib.h>
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#include <Library/BaseLib.h>
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#include <Library/PeimEntryPoint.h>
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#include <Library/PeimEntryPoint.h>
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#pragma pack(1)
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typedef union {
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struct {
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UINT32 LimitLow : 16;
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UINT32 BaseLow : 16;
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UINT32 BaseMid : 8;
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UINT32 Type : 4;
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UINT32 System : 1;
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UINT32 Dpl : 2;
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UINT32 Present : 1;
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UINT32 LimitHigh : 4;
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UINT32 Software : 1;
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UINT32 Reserved : 1;
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UINT32 DefaultSize : 1;
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UINT32 Granularity : 1;
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UINT32 BaseHigh : 8;
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} Bits;
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UINT64 Uint64;
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} IA32_GDT;
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#pragma pack()
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/**
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Assembly code to load GDT table and update segment accordingly.
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@param Gdtr Pointer to GDT descriptor
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**/
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VOID
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EFIAPI
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AsmInitializeGdt (
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IN IA32_DESCRIPTOR *Gdtr
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);
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#endif
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#endif
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@ -31,6 +31,17 @@
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CpuMpPei.h
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CpuMpPei.h
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CpuMpPei.c
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CpuMpPei.c
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[Sources.IA32]
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Ia32/MpEqu.inc
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Ia32/MpFuncs.asm | MSFT
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Ia32/MpFuncs.asm | INTEL
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Ia32/MpFuncs.nasm | GCC
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[Sources.X64]
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X64/MpEqu.inc
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X64/MpFuncs.asm | MSFT
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X64/MpFuncs.asm | INTEL
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X64/MpFuncs.nasm | GCC
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[Packages]
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[Packages]
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MdePkg/MdePkg.dec
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MdePkg/MdePkg.dec
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24
UefiCpuPkg/CpuMpPei/Ia32/MpEqu.inc
Normal file
24
UefiCpuPkg/CpuMpPei/Ia32/MpEqu.inc
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@ -0,0 +1,24 @@
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;------------------------------------------------------------------------------ ;
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; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; MpEqu.inc
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;
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; Abstract:
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;
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; This is the equates file for Multiple Processor support
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;
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;-------------------------------------------------------------------------------
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PROTECT_MODE_CS equ 10h
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PROTECT_MODE_DS equ 18h
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55
UefiCpuPkg/CpuMpPei/Ia32/MpFuncs.asm
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55
UefiCpuPkg/CpuMpPei/Ia32/MpFuncs.asm
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;------------------------------------------------------------------------------ ;
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; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; MpFuncs32.asm
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;
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; Abstract:
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;
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; This is the assembly code for MP support
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;
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;-------------------------------------------------------------------------------
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.686p
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.model flat
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include MpEqu.inc
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.code
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AsmInitializeGdt PROC near C PUBLIC
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push ebp
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mov ebp, esp
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pushad
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mov edi, [ebp + 8] ; Load GDT register
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mov ax,cs ; Get the selector data from our code image
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mov es,ax
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lgdt FWORD PTR es:[edi] ; and update the GDTR
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push PROTECT_MODE_CS
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lea eax, SetCodeSelectorFarJump
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push eax
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retf
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SetCodeSelectorFarJump:
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mov ax, PROTECT_MODE_DS ; Update the Base for the new selectors, too
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov ss, ax
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popad
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pop ebp
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ret
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AsmInitializeGdt ENDP
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END
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49
UefiCpuPkg/CpuMpPei/Ia32/MpFuncs.nasm
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49
UefiCpuPkg/CpuMpPei/Ia32/MpFuncs.nasm
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@ -0,0 +1,49 @@
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;------------------------------------------------------------------------------ ;
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; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; MpFuncs.nasm
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;
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; Abstract:
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;
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; This is the assembly code for MP support
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;
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;-------------------------------------------------------------------------------
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%include "MpEqu.inc"
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SECTION .text
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global ASM_PFX(AsmInitializeGdt)
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ASM_PFX(AsmInitializeGdt):
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push ebp
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mov ebp, esp
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pushad
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mov edi, [ebp + 8] ; Load GDT register
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lgdt [edi] ; and update the GDTR
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push PROTECT_MODE_CS
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mov eax, ASM_PFX(SetCodeSelectorFarJump)
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push eax
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retf
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ASM_PFX(SetCodeSelectorFarJump):
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mov ax, PROTECT_MODE_DS ; Update the Base for the new selectors, too
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov ss, ax
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popad
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pop ebp
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ret
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25
UefiCpuPkg/CpuMpPei/X64/MpEqu.inc
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25
UefiCpuPkg/CpuMpPei/X64/MpEqu.inc
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@ -0,0 +1,25 @@
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;------------------------------------------------------------------------------ ;
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; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; MpEqu.inc
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;
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; Abstract:
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;
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; This is the equates file for Multiple Processor support
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;
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;-------------------------------------------------------------------------------
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LONG_MODE_CS equ 38h
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LONG_MODE_DS equ 30h
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51
UefiCpuPkg/CpuMpPei/X64/MpFuncs.asm
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51
UefiCpuPkg/CpuMpPei/X64/MpFuncs.asm
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;------------------------------------------------------------------------------ ;
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; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; MpFuncs32.asm
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;
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; Abstract:
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;
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; This is the assembly code for MP support
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;
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;-------------------------------------------------------------------------------
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include MpEqu.inc
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.code
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AsmInitializeGdt PROC
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push rbp
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mov rbp, rsp
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lgdt fword PTR [rcx] ; update the GDTR
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sub rsp, 0x10
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lea rax, SetCodeSelectorFarJump
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mov [rsp], rax
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mov rdx, LONG_MODE_CS
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mov [rsp + 4], dx ; get new CS
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jmp fword ptr [rsp]
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SetCodeSelectorFarJump:
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add rsp, 0x10
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mov rax, LONG_MODE_DS ; get new DS
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov ss, ax
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pop rbp
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ret
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AsmInitializeGdt ENDP
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END
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50
UefiCpuPkg/CpuMpPei/X64/MpFuncs.nasm
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50
UefiCpuPkg/CpuMpPei/X64/MpFuncs.nasm
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@ -0,0 +1,50 @@
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;------------------------------------------------------------------------------ ;
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; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php.
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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; Module Name:
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;
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; MpFuncs.nasm
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;
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; Abstract:
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;
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; This is the assembly code for MP support
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;
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;-------------------------------------------------------------------------------
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%include "MpEqu.inc"
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DEFAULT REL
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SECTION .text
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global ASM_PFX(AsmInitializeGdt)
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ASM_PFX(AsmInitializeGdt):
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push rbp
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mov rbp, rsp
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lgdt [rcx] ; update the GDTR
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sub rsp, 0x10
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mov rax, ASM_PFX(SetCodeSelectorFarJump)
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mov [rsp], rax
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mov rdx, LONG_MODE_CS
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mov [rsp + 4], dx ; get new CS
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jmp far dword [rsp] ; far jump with new CS
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ASM_PFX(SetCodeSelectorFarJump):
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add rsp, 0x10
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mov rax, LONG_MODE_DS ; get new DS
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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mov ss, ax
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pop rbp
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ret
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