From fbec9aec00c2cc10de439f2f0c3accb52488d32f Mon Sep 17 00:00:00 2001
From: Tuan Phan <tphan@ventanamicro.com>
Date: Fri, 14 Jul 2023 12:08:19 -0700
Subject: [PATCH] MdePkg/Register: RISC-V: Add satp mode bits shift definition

The satp mode bits shift is used cross modules. It should be defined
in one place.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
---
 MdePkg/Include/Register/RiscV64/RiscVEncoding.h | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/MdePkg/Include/Register/RiscV64/RiscVEncoding.h b/MdePkg/Include/Register/RiscV64/RiscVEncoding.h
index 5c2989b797..2bde8db478 100644
--- a/MdePkg/Include/Register/RiscV64/RiscVEncoding.h
+++ b/MdePkg/Include/Register/RiscV64/RiscVEncoding.h
@@ -58,9 +58,10 @@
 #define PRV_S  1UL
 #define PRV_M  3UL
 
-#define SATP64_MODE  0xF000000000000000ULL
-#define SATP64_ASID  0x0FFFF00000000000ULL
-#define SATP64_PPN   0x00000FFFFFFFFFFFULL
+#define SATP64_MODE        0xF000000000000000ULL
+#define SATP64_MODE_SHIFT  60
+#define SATP64_ASID        0x0FFFF00000000000ULL
+#define SATP64_PPN         0x00000FFFFFFFFFFFULL
 
 #define SATP_MODE_OFF   0UL
 #define SATP_MODE_SV32  1UL