mirror of https://github.com/acidanthera/audk.git
DynamicTables: Fix DT PCI interrupt flags parsing
Device Tree PCI interrupt flags use the convention described at linux/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml The 3rd cell is the flags, encoded as follows: bits[3:0] trigger type and level flags. 1 = low-to-high edge triggered 2 = high-to-low edge triggered (invalid for SPIs) 4 = active high level-sensitive 8 = active low level-sensitive (invalid for SPIs). Fix the incorrect code. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
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@ -449,7 +449,7 @@ GeneratePrt (
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if ((Index > 0) &&
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(IrqMapInfo->IntcInterrupt.Interrupt >= 32) &&
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(IrqMapInfo->IntcInterrupt.Interrupt < 1020) &&
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((IrqMapInfo->IntcInterrupt.Flags & 0x3) != BIT0))
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((IrqMapInfo->IntcInterrupt.Flags & 0xB) != 0))
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{
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Status = EFI_INVALID_PARAMETER;
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ASSERT_EFI_ERROR (Status);
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@ -60,7 +60,7 @@
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#define SPI_OFFSET (32U)
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#define DT_PPI_IRQ (1U)
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#define DT_SPI_IRQ (0U)
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#define DT_IRQ_IS_EDGE_TRIGGERED(x) ((((x) & (BIT0 | BIT2)) != 0))
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#define DT_IRQ_IS_EDGE_TRIGGERED(x) ((((x) & (BIT0 | BIT1)) != 0))
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#define DT_IRQ_IS_ACTIVE_LOW(x) ((((x) & (BIT1 | BIT3)) != 0))
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#define IRQ_TYPE_OFFSET (0U)
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#define IRQ_NUMBER_OFFSET (1U)
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