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UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmiStack" with PatchInstructionX86() 

Rename the variable to "gPatchSmiStack" so that its association with
PatchInstructionX86() is clear from the declaration. Also change its type
to X86_ASSEMBLY_PATCH_LABEL.

Unlike "gSmbase" in the previous patch, "gSmiStack"'s patched value is
also de-referenced by C code (in other words, it is read back after
patching): the InstallSmiHandler() function stores "CpuIndex" to the given
CPU's SMI stack through "gSmiStack". Introduce the local variable
"CpuSmiStack" in InstallSmiHandler() for calculating the stack location
separately, then use this variable for both patching into the assembly
code, and for storing "CpuIndex" through it.

It's assumed that "volatile" stood in the declaration of "gSmiStack"
because we used to read "gSmiStack" back for de-referencing; with that use
gone, we can remove "volatile" too. (Note that the *target* of the pointer
was never volatile-qualified.)

Finally, replace the binary (DB) encoding of "mov esp, imm32" in
"SmiEntry.nasm".

Cc: Eric Dong <eric.dong@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=866
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Laszlo Ersek 2018-02-01 23:23:59 +01:00
parent 5a1bfda4bd
commit fc504fdea7
3 changed files with 11 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
View File

@ -45,7 +45,7 @@ extern ASM_PFX(CpuSmmDebugExit)
global ASM_PFX(gcSmiHandlerTemplate)
global ASM_PFX(gcSmiHandlerSize)
global ASM_PFX(gSmiCr3)
global ASM_PFX(gSmiStack)
global ASM_PFX(gPatchSmiStack)
global ASM_PFX(gPatchSmbase)
global ASM_PFX(mXdSupported)
extern ASM_PFX(gSmiHandlerIdtr)
@ -86,8 +86,8 @@ o16 mov es, ax
o16 mov fs, ax
o16 mov gs, ax
o16 mov ss, ax
DB 0xbc ; mov esp, imm32
ASM_PFX(gSmiStack): DD 0
mov esp, strict dword 0 ; source operand will be patched
ASM_PFX(gPatchSmiStack):
mov eax, ASM_PFX(gSmiHandlerIdtr)
lidt [eax]
jmp ProtFlatMode

8
UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c
View File

@ -106,7 +106,7 @@ typedef struct {
/// Variables from SMI Handler
///
X86_ASSEMBLY_PATCH_LABEL gPatchSmbase;
extern volatile UINT32 gSmiStack;
X86_ASSEMBLY_PATCH_LABEL gPatchSmiStack;
extern UINT32 gSmiCr3;
extern volatile UINT8 gcSmiHandlerTemplate[];
extern CONST UINT16 gcSmiHandlerSize;
@ -686,6 +686,7 @@ InstallSmiHandler (
)
{
PROCESSOR_SMM_DESCRIPTOR *Psd;
UINT32 CpuSmiStack;
//
// Initialize PROCESSOR_SMM_DESCRIPTOR
@ -716,7 +717,8 @@ InstallSmiHandler (
//
// Initialize values in template before copy
//
gSmiStack = (UINT32)((UINTN)SmiStack + StackSize - sizeof (UINTN));
CpuSmiStack = (UINT32)((UINTN)SmiStack + StackSize - sizeof (UINTN));
PatchInstructionX86 (gPatchSmiStack, CpuSmiStack, 4);
gSmiCr3 = Cr3;
PatchInstructionX86 (gPatchSmbase, SmBase, 4);
gSmiHandlerIdtr.Base = IdtBase;
@ -725,7 +727,7 @@ InstallSmiHandler (
//
// Set the value at the top of the CPU stack to the CPU Index
//
*(UINTN*)(UINTN)gSmiStack = CpuIndex;
*(UINTN*)(UINTN)CpuSmiStack = CpuIndex;
//
// Copy template to CPU specific SMI handler location

6
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
View File

@ -55,7 +55,7 @@ extern ASM_PFX(CpuSmmDebugExit)
global ASM_PFX(gPatchSmbase)
global ASM_PFX(mXdSupported)
global ASM_PFX(gSmiStack)
global ASM_PFX(gPatchSmiStack)
global ASM_PFX(gSmiCr3)
global ASM_PFX(gcSmiHandlerTemplate)
global ASM_PFX(gcSmiHandlerSize)
@ -96,8 +96,8 @@ o16 mov es, ax
o16 mov fs, ax
o16 mov gs, ax
o16 mov ss, ax
DB 0xbc ; mov esp, imm32
ASM_PFX(gSmiStack): DD 0
mov esp, strict dword 0 ; source operand will be patched
ASM_PFX(gPatchSmiStack):
jmp ProtFlatMode
BITS 64