mirror of https://github.com/acidanthera/audk.git
MdeModulePkg/Ata: Use a new Pcd named "PcdAtaSmartEnable" to control if enabling S.M.A.R.T feature by default.
Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Sun Rui <rui.sun@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13369 6f19259b-4bc3-4df7-8a09-765794883524
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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The file for AHCI mode of ATA host controller.
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The file for AHCI mode of ATA host controller.
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Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -2349,7 +2349,7 @@ AhciModeInitialization (
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//
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//
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// If the device is a hard disk, then try to enable S.M.A.R.T feature
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// If the device is a hard disk, then try to enable S.M.A.R.T feature
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//
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//
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if (DeviceType == EfiIdeHarddisk) {
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if ((DeviceType == EfiIdeHarddisk) && PcdGetBool (PcdAtaSmartEnable)) {
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AhciAtaSmartSupport (
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AhciAtaSmartSupport (
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PciIo,
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PciIo,
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AhciRegisters,
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AhciRegisters,
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@ -4,7 +4,7 @@
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# This driver installs AtaPassThru and ExtScsiPassThru protocol in each ide/sata controller
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# This driver installs AtaPassThru and ExtScsiPassThru protocol in each ide/sata controller
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# to access to all attached Ata/Atapi devices.
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# to access to all attached Ata/Atapi devices.
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#
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#
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# Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
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#
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#
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# This program and the accompanying materials
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# are licensed and made available under the terms and conditions of the BSD License
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@ -65,3 +65,6 @@
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gEfiIdeControllerInitProtocolGuid # TO_START
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gEfiIdeControllerInitProtocolGuid # TO_START
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gEfiDevicePathProtocolGuid # TO_START
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gEfiDevicePathProtocolGuid # TO_START
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gEfiPciIoProtocolGuid # TO_START
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gEfiPciIoProtocolGuid # TO_START
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[Pcd]
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gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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Header file for AHCI mode of ATA host controller.
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Header file for AHCI mode of ATA host controller.
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Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -2667,7 +2667,7 @@ DetectAndConfigIdeDevice (
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//
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//
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// If the device is a hard disk, then try to enable S.M.A.R.T feature
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// If the device is a hard disk, then try to enable S.M.A.R.T feature
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//
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//
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if (DeviceType == EfiIdeHarddisk) {
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if ((DeviceType == EfiIdeHarddisk) && PcdGetBool (PcdAtaSmartEnable)) {
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IdeAtaSmartSupport (
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IdeAtaSmartSupport (
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Instance,
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Instance,
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IdeChannel,
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IdeChannel,
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@ -462,6 +462,9 @@
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## If TRUE, S3 performance data will be supported in ACPI FPDT table.
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## If TRUE, S3 performance data will be supported in ACPI FPDT table.
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gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwarePerformanceDataTableS3Support|TRUE|BOOLEAN|0x00010064
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gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwarePerformanceDataTableS3Support|TRUE|BOOLEAN|0x00010064
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## This PCD specified whether the S.M.A.R.T feature of attached ATA hard disks are enabled.
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gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable|TRUE|BOOLEAN|0x00010065
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[PcdsFeatureFlag.IA32, PcdsFeatureFlag.X64]
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[PcdsFeatureFlag.IA32, PcdsFeatureFlag.X64]
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##
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##
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# This feature flag specifies whether DxeIpl switches to long mode to enter DXE phase.
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# This feature flag specifies whether DxeIpl switches to long mode to enter DXE phase.
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