CryptoPkg/IntrinsicLib: Remove .S files for IA32 arch

.nasm file has been added for X86 arch. .S assembly code
is not required any more.
https://bugzilla.tianocore.org/show_bug.cgi?id=1594

Cc: Ting Ye <ting.ye@intel.com>
Cc: Jian Wang <jian.j.wang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Shenglei Zhang 2019-03-29 14:52:21 +08:00 committed by Liming Gao
parent 94cf7d235a
commit fcc61ca4b1
3 changed files with 0 additions and 130 deletions

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@ -1,62 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# MathLShiftS64.S
#
# Abstract:
#
# 64-bit Math Worker Function.
# Shifts a 64-bit signed value left by a certain number of bits.
#
#------------------------------------------------------------------------------
.686:
.code:
ASM_GLOBAL ASM_PFX(__ashldi3)
#------------------------------------------------------------------------------
#
# void __cdecl __ashldi3 (void)
#
#------------------------------------------------------------------------------
ASM_PFX(__ashldi3):
#
# Handle shifting of 64 or more bits (return 0)
#
cmpb $64, %cl
jae ReturnZero
#
# Handle shifting of between 0 and 31 bits
#
cmpb $32, %cl
jae More32
shld %cl, %eax, %edx
shl %cl, %eax
ret
#
# Handle shifting of between 32 and 63 bits
#
More32:
movl %eax, %edx
xor %eax, %eax
and $31, %cl
shl %cl, %edx
ret
ReturnZero:
xor %eax, %eax
xor %edx, %edx
ret

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@ -1,66 +0,0 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php.
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
# Module Name:
#
# MathRShiftU64.S
#
# Abstract:
#
# 64-bit Math Worker Function.
# Shifts a 64-bit unsigned value right by a certain number of bits.
#
#------------------------------------------------------------------------------
.686:
.code:
ASM_GLOBAL ASM_PFX(__ashrdi3)
#------------------------------------------------------------------------------
#
# void __cdecl __ashrdi3 (void)
#
#------------------------------------------------------------------------------
ASM_PFX(__ashrdi3):
#
# Checking: Only handle 64bit shifting or more
#
cmpb $64, %cl
jae _Exit
#
# Handle shifting between 0 and 31 bits
#
cmpb $32, %cl
jae More32
shrd %cl, %edx, %eax
shr %cl, %edx
ret
#
# Handle shifting of 32-63 bits
#
More32:
movl %edx, %eax
xor %edx, %edx
and $31, %cl
shr %cl, %eax
ret
#
# Invalid number (less then 32bits), return 0
#
_Exit:
xor %eax, %eax
xor %edx, %edx
ret

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@ -39,8 +39,6 @@
Ia32/MathLShiftS64.c | INTEL
Ia32/MathRShiftU64.c | INTEL
Ia32/MathLShiftS64.S | GCC
Ia32/MathRShiftU64.S | GCC
Ia32/MathLShiftS64.nasm | GCC
Ia32/MathRShiftU64.nasm | GCC