mirror of https://github.com/acidanthera/audk.git
CryptoPkg/IntrinsicLib: Remove .S files for IA32 arch
.nasm file has been added for X86 arch. .S assembly code is not required any more. https://bugzilla.tianocore.org/show_bug.cgi?id=1594 Cc: Ting Ye <ting.ye@intel.com> Cc: Jian Wang <jian.j.wang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
This commit is contained in:
Shenglei Zhang
Liming Gao
parent
94cf7d235a
commit
fcc61ca4b1
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php.
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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# Module Name:
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#
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# MathLShiftS64.S
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#
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# Abstract:
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#
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# 64-bit Math Worker Function.
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# Shifts a 64-bit signed value left by a certain number of bits.
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#
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#------------------------------------------------------------------------------
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.686:
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.code:
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ASM_GLOBAL ASM_PFX(__ashldi3)
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#------------------------------------------------------------------------------
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#
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# void __cdecl __ashldi3 (void)
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#
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#------------------------------------------------------------------------------
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ASM_PFX(__ashldi3):
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#
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# Handle shifting of 64 or more bits (return 0)
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#
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cmpb $64, %cl
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jae ReturnZero
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#
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# Handle shifting of between 0 and 31 bits
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#
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cmpb $32, %cl
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jae More32
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shld %cl, %eax, %edx
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shl %cl, %eax
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ret
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#
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# Handle shifting of between 32 and 63 bits
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#
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More32:
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movl %eax, %edx
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xor %eax, %eax
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and $31, %cl
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shl %cl, %edx
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ret
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ReturnZero:
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xor %eax, %eax
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xor %edx, %edx
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ret
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@ -1,66 +0,0 @@
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php.
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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# Module Name:
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#
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# MathRShiftU64.S
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#
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# Abstract:
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#
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# 64-bit Math Worker Function.
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# Shifts a 64-bit unsigned value right by a certain number of bits.
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#
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#------------------------------------------------------------------------------
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.686:
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.code:
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ASM_GLOBAL ASM_PFX(__ashrdi3)
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#------------------------------------------------------------------------------
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#
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# void __cdecl __ashrdi3 (void)
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#
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#------------------------------------------------------------------------------
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ASM_PFX(__ashrdi3):
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#
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# Checking: Only handle 64bit shifting or more
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#
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cmpb $64, %cl
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jae _Exit
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#
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# Handle shifting between 0 and 31 bits
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#
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cmpb $32, %cl
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jae More32
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shrd %cl, %edx, %eax
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shr %cl, %edx
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ret
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#
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# Handle shifting of 32-63 bits
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#
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More32:
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movl %edx, %eax
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xor %edx, %edx
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and $31, %cl
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shr %cl, %eax
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ret
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#
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# Invalid number (less then 32bits), return 0
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#
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_Exit:
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xor %eax, %eax
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xor %edx, %edx
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ret
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@ -39,8 +39,6 @@
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Ia32/MathLShiftS64.c | INTEL
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Ia32/MathLShiftS64.c | INTEL
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Ia32/MathRShiftU64.c | INTEL
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Ia32/MathRShiftU64.c | INTEL
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Ia32/MathLShiftS64.S | GCC
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Ia32/MathRShiftU64.S | GCC
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Ia32/MathLShiftS64.nasm | GCC
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Ia32/MathLShiftS64.nasm | GCC
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Ia32/MathRShiftU64.nasm | GCC
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Ia32/MathRShiftU64.nasm | GCC
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