mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/MpInitLib: Remove redundant microcode fields in CPU_MP_DATA
Previous commits have introduced below fields in structure CPU_AP_DATA: UINT32 ProcessorSignature; UINT8 PlatformId; UINT64 MicrocodeEntryAddr; which store the information of: A. CPUID B. Platform ID C. Detected microcode patch entry address (including the microcode patch header) for each processor within system. Therefore, the below fields in structure CPU_MP_DATA: UINT32 ProcessorSignature; UINT32 ProcessorFlags; UINT64 MicrocodeDataAddress; UINT32 MicrocodeRevision; which store the BSP's information of: A. CPUID B. Platform ID C. The address and revision of detected microcode patch are redundant and can be removed. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Siyuan Fu <siyuan.fu@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Hao A Wu <hao.a.wu@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
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88bd066166
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@ -85,6 +85,7 @@ MicrocodeDetect (
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UINTN Index;
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UINTN Index;
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UINT8 PlatformId;
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UINT8 PlatformId;
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CPUID_VERSION_INFO_EAX Eax;
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CPUID_VERSION_INFO_EAX Eax;
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CPU_AP_DATA *CpuData;
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UINT32 CurrentRevision;
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UINT32 CurrentRevision;
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UINT32 LatestRevision;
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UINT32 LatestRevision;
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UINTN TotalSize;
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UINTN TotalSize;
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@ -92,16 +93,9 @@ MicrocodeDetect (
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UINT32 InCompleteCheckSum32;
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UINT32 InCompleteCheckSum32;
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BOOLEAN CorrectMicrocode;
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BOOLEAN CorrectMicrocode;
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VOID *MicrocodeData;
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VOID *MicrocodeData;
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MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr;
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UINT32 ProcessorFlags;
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UINT32 ThreadId;
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UINT32 ThreadId;
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BOOLEAN IsBspCallIn;
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BOOLEAN IsBspCallIn;
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//
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// set ProcessorFlags to suppress incorrect compiler/analyzer warnings
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//
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ProcessorFlags = 0;
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if (CpuMpData->MicrocodePatchRegionSize == 0) {
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if (CpuMpData->MicrocodePatchRegionSize == 0) {
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//
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//
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// There is no microcode patches
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// There is no microcode patches
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@ -127,28 +121,25 @@ MicrocodeDetect (
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}
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}
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ExtendedTableLength = 0;
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ExtendedTableLength = 0;
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//
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Eax.Uint32 = CpuMpData->CpuData[ProcessorNumber].ProcessorSignature;
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// Here data of CPUID leafs have not been collected into context buffer, so
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PlatformId = CpuMpData->CpuData[ProcessorNumber].PlatformId;
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// GetProcessorCpuid() cannot be used here to retrieve CPUID data.
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//
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AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, NULL, NULL, NULL);
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//
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// The index of platform information resides in bits 50:52 of MSR IA32_PLATFORM_ID
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//
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PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);
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PlatformId = (UINT8) PlatformIdMsr.Bits.PlatformId;
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//
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//
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// Check whether AP has same processor with BSP.
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// Check whether AP has same processor with BSP.
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// If yes, direct use microcode info saved by BSP.
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// If yes, direct use microcode info saved by BSP.
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//
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//
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if (!IsBspCallIn) {
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if (!IsBspCallIn) {
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if ((CpuMpData->ProcessorSignature == Eax.Uint32) &&
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//
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(CpuMpData->ProcessorFlags & (1 << PlatformId)) != 0) {
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// Get the CPU data for BSP
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MicrocodeData = (VOID *)(UINTN) CpuMpData->MicrocodeDataAddress;
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//
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LatestRevision = CpuMpData->MicrocodeRevision;
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CpuData = &(CpuMpData->CpuData[CpuMpData->BspNumber]);
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goto Done;
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if ((CpuData->ProcessorSignature == Eax.Uint32) &&
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(CpuData->PlatformId == PlatformId) &&
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(CpuData->MicrocodeEntryAddr != 0)) {
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MicrocodeEntryPoint = (CPU_MICROCODE_HEADER *)(UINTN) CpuData->MicrocodeEntryAddr;
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MicrocodeData = (VOID *) (MicrocodeEntryPoint + 1);
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LatestRevision = MicrocodeEntryPoint->UpdateRevision;
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goto Done;
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}
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}
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}
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}
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@ -216,7 +207,6 @@ MicrocodeDetect (
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CheckSum32 += MicrocodeEntryPoint->Checksum;
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CheckSum32 += MicrocodeEntryPoint->Checksum;
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if (CheckSum32 == 0) {
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if (CheckSum32 == 0) {
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CorrectMicrocode = TRUE;
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CorrectMicrocode = TRUE;
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ProcessorFlags = MicrocodeEntryPoint->ProcessorFlags;
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}
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}
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} else if ((MicrocodeEntryPoint->DataSize != 0) &&
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} else if ((MicrocodeEntryPoint->DataSize != 0) &&
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(MicrocodeEntryPoint->UpdateRevision > LatestRevision)) {
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(MicrocodeEntryPoint->UpdateRevision > LatestRevision)) {
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@ -260,7 +250,6 @@ MicrocodeDetect (
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// Find one
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// Find one
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//
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//
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CorrectMicrocode = TRUE;
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CorrectMicrocode = TRUE;
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ProcessorFlags = ExtendedTable->ProcessorFlag;
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break;
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break;
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}
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}
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}
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}
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@ -332,18 +321,6 @@ Done:
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ReleaseSpinLock(&CpuMpData->MpLock);
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ReleaseSpinLock(&CpuMpData->MpLock);
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}
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}
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}
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}
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if (IsBspCallIn && (LatestRevision != 0)) {
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//
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// Save BSP processor info and microcode info for later AP use.
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//
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CpuMpData->ProcessorSignature = Eax.Uint32;
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CpuMpData->ProcessorFlags = ProcessorFlags;
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CpuMpData->MicrocodeDataAddress = (UINTN) MicrocodeData;
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CpuMpData->MicrocodeRevision = LatestRevision;
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DEBUG ((DEBUG_INFO, "BSP Microcode:: signature [0x%08x], ProcessorFlags [0x%08x], \
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MicroData [0x%08x], Revision [0x%08x]\n", Eax.Uint32, ProcessorFlags, (UINTN) MicrocodeData, LatestRevision));
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}
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}
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}
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/**
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/**
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@ -263,11 +263,6 @@ struct _CPU_MP_DATA {
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BOOLEAN PeriodicMode;
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BOOLEAN PeriodicMode;
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BOOLEAN TimerInterruptState;
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BOOLEAN TimerInterruptState;
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UINT32 ProcessorSignature;
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UINT32 ProcessorFlags;
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UINT64 MicrocodeDataAddress;
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UINT32 MicrocodeRevision;
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//
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//
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// Whether need to use Init-Sipi-Sipi to wake up the APs.
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// Whether need to use Init-Sipi-Sipi to wake up the APs.
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// Two cases need to set this value to TRUE. One is in HLT
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// Two cases need to set this value to TRUE. One is in HLT
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