mirror of https://github.com/acidanthera/audk.git
MdePkg: Update smbiosview type 9 with SMBIOS 3.5 fields
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3896 update smbiosview type 9 related fileds. Signed-off-by: Bo Chang Ke <bo-changx.ke@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Star Zeng <star.zeng@intel.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
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@ -1271,71 +1271,85 @@ typedef struct {
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/// System Slots - Slot Type
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///
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typedef enum {
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SlotTypeOther = 0x01,
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SlotTypeUnknown = 0x02,
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SlotTypeIsa = 0x03,
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SlotTypeMca = 0x04,
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SlotTypeEisa = 0x05,
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SlotTypePci = 0x06,
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SlotTypePcmcia = 0x07,
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SlotTypeVlVesa = 0x08,
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SlotTypeProprietary = 0x09,
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SlotTypeProcessorCardSlot = 0x0A,
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SlotTypeProprietaryMemoryCardSlot = 0x0B,
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SlotTypeIORiserCardSlot = 0x0C,
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SlotTypeNuBus = 0x0D,
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SlotTypePci66MhzCapable = 0x0E,
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SlotTypeAgp = 0x0F,
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SlotTypeApg2X = 0x10,
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SlotTypeAgp4X = 0x11,
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SlotTypePciX = 0x12,
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SlotTypeAgp8X = 0x13,
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SlotTypeM2Socket1_DP = 0x14,
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SlotTypeM2Socket1_SD = 0x15,
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SlotTypeM2Socket2 = 0x16,
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SlotTypeM2Socket3 = 0x17,
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SlotTypeMxmTypeI = 0x18,
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SlotTypeMxmTypeII = 0x19,
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SlotTypeMxmTypeIIIStandard = 0x1A,
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SlotTypeMxmTypeIIIHe = 0x1B,
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SlotTypeMxmTypeIV = 0x1C,
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SlotTypeMxm30TypeA = 0x1D,
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SlotTypeMxm30TypeB = 0x1E,
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SlotTypePciExpressGen2Sff_8639 = 0x1F,
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SlotTypePciExpressGen3Sff_8639 = 0x20,
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SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.
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SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.
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SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.
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SlotTypeCXLFlexbus10 = 0x30,
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SlotTypePC98C20 = 0xA0,
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SlotTypePC98C24 = 0xA1,
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SlotTypePC98E = 0xA2,
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SlotTypePC98LocalBus = 0xA3,
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SlotTypePC98Card = 0xA4,
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SlotTypePciExpress = 0xA5,
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SlotTypePciExpressX1 = 0xA6,
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SlotTypePciExpressX2 = 0xA7,
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SlotTypePciExpressX4 = 0xA8,
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SlotTypePciExpressX8 = 0xA9,
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SlotTypePciExpressX16 = 0xAA,
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SlotTypePciExpressGen2 = 0xAB,
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SlotTypePciExpressGen2X1 = 0xAC,
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SlotTypePciExpressGen2X2 = 0xAD,
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SlotTypePciExpressGen2X4 = 0xAE,
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SlotTypePciExpressGen2X8 = 0xAF,
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SlotTypePciExpressGen2X16 = 0xB0,
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SlotTypePciExpressGen3 = 0xB1,
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SlotTypePciExpressGen3X1 = 0xB2,
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SlotTypePciExpressGen3X2 = 0xB3,
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SlotTypePciExpressGen3X4 = 0xB4,
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SlotTypePciExpressGen3X8 = 0xB5,
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SlotTypePciExpressGen3X16 = 0xB6,
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SlotTypePciExpressGen4 = 0xB8,
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SlotTypePciExpressGen4X1 = 0xB9,
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SlotTypePciExpressGen4X2 = 0xBA,
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SlotTypePciExpressGen4X4 = 0xBB,
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SlotTypePciExpressGen4X8 = 0xBC,
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SlotTypePciExpressGen4X16 = 0xBD
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SlotTypeOther = 0x01,
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SlotTypeUnknown = 0x02,
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SlotTypeIsa = 0x03,
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SlotTypeMca = 0x04,
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SlotTypeEisa = 0x05,
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SlotTypePci = 0x06,
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SlotTypePcmcia = 0x07,
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SlotTypeVlVesa = 0x08,
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SlotTypeProprietary = 0x09,
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SlotTypeProcessorCardSlot = 0x0A,
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SlotTypeProprietaryMemoryCardSlot = 0x0B,
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SlotTypeIORiserCardSlot = 0x0C,
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SlotTypeNuBus = 0x0D,
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SlotTypePci66MhzCapable = 0x0E,
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SlotTypeAgp = 0x0F,
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SlotTypeApg2X = 0x10,
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SlotTypeAgp4X = 0x11,
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SlotTypePciX = 0x12,
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SlotTypeAgp8X = 0x13,
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SlotTypeM2Socket1_DP = 0x14,
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SlotTypeM2Socket1_SD = 0x15,
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SlotTypeM2Socket2 = 0x16,
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SlotTypeM2Socket3 = 0x17,
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SlotTypeMxmTypeI = 0x18,
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SlotTypeMxmTypeII = 0x19,
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SlotTypeMxmTypeIIIStandard = 0x1A,
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SlotTypeMxmTypeIIIHe = 0x1B,
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SlotTypeMxmTypeIV = 0x1C,
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SlotTypeMxm30TypeA = 0x1D,
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SlotTypeMxm30TypeB = 0x1E,
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SlotTypePciExpressGen2Sff_8639 = 0x1F,
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SlotTypePciExpressGen3Sff_8639 = 0x20,
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SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.
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SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.
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SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.
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SlotTypePCIExpressGen4SFF_8639 = 0x24, ///< U.2
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SlotTypePCIExpressGen5SFF_8639 = 0x25, ///< U.2
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SlotTypeOCPNIC30SmallFormFactor = 0x26, ///< SFF
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SlotTypeOCPNIC30LargeFormFactor = 0x27, ///< LFF
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SlotTypeOCPNICPriorto30 = 0x28,
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SlotTypeCXLFlexbus10 = 0x30,
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SlotTypePC98C20 = 0xA0,
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SlotTypePC98C24 = 0xA1,
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SlotTypePC98E = 0xA2,
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SlotTypePC98LocalBus = 0xA3,
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SlotTypePC98Card = 0xA4,
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SlotTypePciExpress = 0xA5,
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SlotTypePciExpressX1 = 0xA6,
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SlotTypePciExpressX2 = 0xA7,
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SlotTypePciExpressX4 = 0xA8,
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SlotTypePciExpressX8 = 0xA9,
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SlotTypePciExpressX16 = 0xAA,
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SlotTypePciExpressGen2 = 0xAB,
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SlotTypePciExpressGen2X1 = 0xAC,
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SlotTypePciExpressGen2X2 = 0xAD,
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SlotTypePciExpressGen2X4 = 0xAE,
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SlotTypePciExpressGen2X8 = 0xAF,
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SlotTypePciExpressGen2X16 = 0xB0,
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SlotTypePciExpressGen3 = 0xB1,
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SlotTypePciExpressGen3X1 = 0xB2,
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SlotTypePciExpressGen3X2 = 0xB3,
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SlotTypePciExpressGen3X4 = 0xB4,
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SlotTypePciExpressGen3X8 = 0xB5,
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SlotTypePciExpressGen3X16 = 0xB6,
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SlotTypePciExpressGen4 = 0xB8,
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SlotTypePciExpressGen4X1 = 0xB9,
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SlotTypePciExpressGen4X2 = 0xBA,
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SlotTypePciExpressGen4X4 = 0xBB,
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SlotTypePciExpressGen4X8 = 0xBC,
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SlotTypePciExpressGen4X16 = 0xBD,
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SlotTypePCIExpressGen5 = 0xBE,
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SlotTypePCIExpressGen5X1 = 0xBF,
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SlotTypePCIExpressGen5X2 = 0xC0,
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SlotTypePCIExpressGen5X4 = 0xC1,
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SlotTypePCIExpressGen5X8 = 0xC2,
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SlotTypePCIExpressGen5X16 = 0xC3,
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SlotTypePCIExpressGen6andBeyond = 0xC4,
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SlotTypeEnterpriseandDatacenter1UE1FormFactorSlot = 0xC5,
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SlotTypeEnterpriseandDatacenter3E3FormFactorSlot = 0xC6
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} MISC_SLOT_TYPE;
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///
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@ -1358,6 +1372,39 @@ typedef enum {
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SlotDataBusWidth32X = 0x0E ///< Or X32
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} MISC_SLOT_DATA_BUS_WIDTH;
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///
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/// System Slots - Slot Physical Width.
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///
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typedef enum {
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SlotPhysicalWidthOther = 0x01,
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SlotPhysicalWidthUnknown = 0x02,
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SlotPhysicalWidth8Bit = 0x03,
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SlotPhysicalWidth16Bit = 0x04,
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SlotPhysicalWidth32Bit = 0x05,
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SlotPhysicalWidth64Bit = 0x06,
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SlotPhysicalWidth128Bit = 0x07,
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SlotPhysicalWidth1X = 0x08, ///< Or X1
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SlotPhysicalWidth2X = 0x09, ///< Or X2
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SlotPhysicalWidth4X = 0x0A, ///< Or X4
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SlotPhysicalWidth8X = 0x0B, ///< Or X8
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SlotPhysicalWidth12X = 0x0C, ///< Or X12
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SlotPhysicalWidth16X = 0x0D, ///< Or X16
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SlotPhysicalWidth32X = 0x0E ///< Or X32
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} MISC_SLOT_PHYSICAL_WIDTH;
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///
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/// System Slots - Slot Information.
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///
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typedef enum {
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Others = 0x00,
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Gen1 = 0x01,
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Gen2 = 0x01,
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Gen3 = 0x03,
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Gen4 = 0x04,
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Gen5 = 0x05,
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Gen6 = 0x06
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} MISC_SLOT_INFORMATION;
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///
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/// System Slots - Current Usage.
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///
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