Clean up the hard code offset in MdePkg BaseLib Ia32 Thunk16.S and EcpPkg GlueLib BaseLib Ia32 Thunk16.S.

Signed-off-by: lgao4
Reviewed-by: rsun3

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12889 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
lgao4 2011-12-20 09:50:19 +00:00
parent 665e08a0ca
commit fe28761275
2 changed files with 99 additions and 53 deletions

View File

@ -24,6 +24,27 @@
.globl ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)
.globl ASM_PFX(InternalAsmThunk16)
# define the structure of IA32_REGS
.set _EDI, 0 #size 4
.set _ESI, 4 #size 4
.set _EBP, 8 #size 4
.set _ESP, 12 #size 4
.set _EBX, 16 #size 4
.set _EDX, 20 #size 4
.set _ECX, 24 #size 4
.set _EAX, 28 #size 4
.set _DS, 32 #size 2
.set _ES, 34 #size 2
.set _FS, 36 #size 2
.set _GS, 38 #size 2
.set _EFLAGS, 40 #size 4
.set _EIP, 44 #size 4
.set _CS, 48 #size 2
.set _SS, 50 #size 2
.set IA32_REGS_SIZE, 52
.text
ASM_PFX(m16Start):
SavedGdt: .space 6
@ -57,15 +78,17 @@ ASM_PFX(ThunkAttr): .space 4
2:
xorw %ax, %ax # xor eax, eax
movl %ss, %eax # mov ax, ss
.byte 0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66
mov %ebp, 0xffffffd8(%esi)
mov 0xfffffff8(%esi), %ebx
.byte 0x67
lea IA32_REGS_SIZE(%esp), %bp
.byte 0x66
mov %ebp, (_ESP - IA32_REGS_SIZE)(%esi)
mov (_EIP - IA32_REGS_SIZE)(%esi), %ebx
shlw $4, %ax # shl eax, 4
addw %ax, %bp # add ebp, eax
.byte 0x66, 0xb8 # mov eax, imm32
SavedCr4: .space 4
movl %eax, %cr4
lgdtw %cs:0xfffffff2(%edi)
lgdtw %cs:(SavedGdt - L_Base1)(%edi)
.byte 0x66, 0xb8 # mov eax, imm32
SavedCr0: .space 4
movl %eax, %cr0
@ -100,15 +123,15 @@ ASM_PFX(ToUserCode):
L_Base:
popw %bp # ebp <- offset L_Base
.byte 0x67; # address size override
push 54(%esp)
lea 0xc(%esi), %eax
push (IA32_REGS_SIZE + 2)(%esp)
lea (L_RealMode - L_Base)(%esi), %eax
push %eax
lret
L_RealMode:
mov %edx, %cs:0xffffffc5(%esi)
mov %bx, %cs:0xffffffcb(%esi)
lidtw %cs:0xffffffd7(%esi)
mov %edx, %cs:(SavedSs - L_Base)(%esi)
mov %bx, %cs:(SavedEsp - L_Base)(%esi)
lidtw %cs:(_16Idtr - L_Base)(%esi)
popaw # popad actually
pop %ds
pop %es
@ -135,8 +158,8 @@ _16DsDesc:
GdtEnd:
#
# @param RegSet Pointer to a IA32_DWORD_REGS structure
# @param Transition Pointer to the transition code
# @param RegSet The pointer to a IA32_DWORD_REGS structure
# @param Transition The pointer to the transition code
# @return The address of the 16-bit stack after returning from user code
#
ASM_PFX(InternalAsmThunk16):
@ -149,55 +172,55 @@ ASM_PFX(InternalAsmThunk16):
push %fs
push %gs
movl 36(%esp), %esi # esi <- RegSet
movzwl 0x32(%esi), %edx
mov 0xc(%esi), %edi
add $0xffffffc8, %edi
movzwl _SS(%esi), %edx
mov _ESP(%esi), %edi
add $(-(IA32_REGS_SIZE + 4)), %edi
movl %edi, %ebx # ebx <- stack offset
imul $0x10, %edx, %eax
push $0xd
push $(IA32_REGS_SIZE / 4)
addl %eax, %edi # edi <- linear address of 16-bit stack
pop %ecx
rep
movsl # copy RegSet
movl 40(%esp), %eax # eax <- address of transition code
movl %edx, %esi # esi <- 16-bit stack segment
lea 0x5e(%eax), %edx
lea (SavedCr0 - ASM_PFX(m16Start))(%eax), %edx
movl %eax, %ecx
andl $0xf, %ecx
shll $12, %eax
lea 0x6(%ecx), %ecx
lea (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%ecx), %ecx
movw %cx, %ax
stosl # [edi] <- return address of user code
sgdtl 0xffffffa2(%edx)
sgdtl (SavedGdt - SavedCr0)(%edx)
sidtl 0x24(%esp)
movl %cr0, %eax
movl %eax, (%edx) # save CR0 in SavedCr0
andl $0x7ffffffe, %eax # clear PE, PG bits
movl %cr4, %ebp
mov %ebp, 0xfffffff1(%edx)
mov %ebp, (SavedCr4 - SavedCr0)(%edx)
andl $0x300, %ebp # clear all but PCE and OSFXSR bits
pushl $0x10
pop %ecx # ecx <- selector for data segments
lgdtl 0x20(%edx)
lgdtl (_16Gdtr - SavedCr0)(%edx)
pushfl
lcall *0x14(%edx)
lcall *(_EntryPoint - SavedCr0)(%edx)
popfl
lidtl 0x24(%esp)
lea 0xffffffcc(%ebp), %eax
pop %gs
pop %fs
pop %es
pop %ds
pop %edi
pop %esi
pop %ebx
pop %ebp
lea -IA32_REGS_SIZE(%ebp), %eax
pop %gs
pop %fs
pop %es
pop %ds
pop %edi
pop %esi
pop %ebx
pop %ebp
ret
.const:
ASM_PFX(m16Size): .word _InternalAsmThunk16 - ASM_PFX(m16Start)
ASM_PFX(mThunk16Attr): .word _ThunkAttr - ASM_PFX(m16Start)
ASM_PFX(m16Size): .word ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)
ASM_PFX(mThunk16Attr): .word ASM_PFX(ThunkAttr) - ASM_PFX(m16Start)
ASM_PFX(m16Gdt): .word _NullSegDesc - ASM_PFX(m16Start)
ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start)
ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start)

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@ -24,6 +24,27 @@
ASM_GLOBAL ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)
ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
# define the structure of IA32_REGS
.set _EDI, 0 #size 4
.set _ESI, 4 #size 4
.set _EBP, 8 #size 4
.set _ESP, 12 #size 4
.set _EBX, 16 #size 4
.set _EDX, 20 #size 4
.set _ECX, 24 #size 4
.set _EAX, 28 #size 4
.set _DS, 32 #size 2
.set _ES, 34 #size 2
.set _FS, 36 #size 2
.set _GS, 38 #size 2
.set _EFLAGS, 40 #size 4
.set _EIP, 44 #size 4
.set _CS, 48 #size 2
.set _SS, 50 #size 2
.set IA32_REGS_SIZE, 52
.text
ASM_PFX(m16Start):
SavedGdt: .space 6
@ -57,15 +78,17 @@ ASM_PFX(ThunkAttr): .space 4
2:
xorw %ax, %ax # xor eax, eax
movl %ss, %eax # mov ax, ss
.byte 0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66
mov %ebp, 0xffffffd8(%esi)
mov 0xfffffff8(%esi), %ebx
.byte 0x67
lea IA32_REGS_SIZE(%esp), %bp
.byte 0x66
mov %ebp, (_ESP - IA32_REGS_SIZE)(%esi)
mov (_EIP - IA32_REGS_SIZE)(%esi), %ebx
shlw $4, %ax # shl eax, 4
addw %ax, %bp # add ebp, eax
.byte 0x66, 0xb8 # mov eax, imm32
SavedCr4: .space 4
movl %eax, %cr4
lgdtw %cs:0xfffffff2(%edi)
lgdtw %cs:(SavedGdt - L_Base1)(%edi)
.byte 0x66, 0xb8 # mov eax, imm32
SavedCr0: .space 4
movl %eax, %cr0
@ -100,15 +123,15 @@ ASM_PFX(ToUserCode):
L_Base:
popw %bp # ebp <- offset L_Base
.byte 0x67; # address size override
push 54(%esp)
lea 0xc(%esi), %eax
push (IA32_REGS_SIZE + 2)(%esp)
lea (L_RealMode - L_Base)(%esi), %eax
push %eax
lret
L_RealMode:
mov %edx, %cs:0xffffffc5(%esi)
mov %bx, %cs:0xffffffcb(%esi)
lidtw %cs:0xffffffd7(%esi)
mov %edx, %cs:(SavedSs - L_Base)(%esi)
mov %bx, %cs:(SavedEsp - L_Base)(%esi)
lidtw %cs:(_16Idtr - L_Base)(%esi)
popaw # popad actually
pop %ds
pop %es
@ -149,41 +172,41 @@ ASM_PFX(InternalAsmThunk16):
push %fs
push %gs
movl 36(%esp), %esi # esi <- RegSet
movzwl 0x32(%esi), %edx
mov 0xc(%esi), %edi
add $0xffffffc8, %edi
movzwl _SS(%esi), %edx
mov _ESP(%esi), %edi
add $(-(IA32_REGS_SIZE + 4)), %edi
movl %edi, %ebx # ebx <- stack offset
imul $0x10, %edx, %eax
push $0xd
push $(IA32_REGS_SIZE / 4)
addl %eax, %edi # edi <- linear address of 16-bit stack
pop %ecx
rep
movsl # copy RegSet
movl 40(%esp), %eax # eax <- address of transition code
movl %edx, %esi # esi <- 16-bit stack segment
lea 0x5f(%eax), %edx
lea (SavedCr0 - ASM_PFX(m16Start))(%eax), %edx
movl %eax, %ecx
andl $0xf, %ecx
shll $12, %eax
lea 0x6(%ecx), %ecx
lea (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%ecx), %ecx
movw %cx, %ax
stosl # [edi] <- return address of user code
sgdtl 0xffffffa1(%edx)
sgdtl (SavedGdt - SavedCr0)(%edx)
sidtl 0x24(%esp)
movl %cr0, %eax
movl %eax, (%edx) # save CR0 in SavedCr0
andl $0x7ffffffe, %eax # clear PE, PG bits
movl %cr4, %ebp
mov %ebp, 0xfffffff1(%edx)
mov %ebp, (SavedCr4 - SavedCr0)(%edx)
andl $0x300, %ebp # clear all but PCE and OSFXSR bits
pushl $0x10
pop %ecx # ecx <- selector for data segments
lgdtl 0x20(%edx)
lgdtl (_16Gdtr - SavedCr0)(%edx)
pushfl
lcall *0x14(%edx)
lcall *(_EntryPoint - SavedCr0)(%edx)
popfl
lidtl 0x24(%esp)
lea 0xffffffcc(%ebp), %eax
lea -IA32_REGS_SIZE(%ebp), %eax
pop %gs
pop %fs
pop %es