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OvmfPkg/PciHotPlugInitDxe: translate QEMU's resource reservation hints
Parse QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION from the bridges'
conventional config spaces. Translate the fields as follows:
* BusNumbers:
* 0 -- no reservation;
* (-1) -- firmware default, i.e. no reservation;
* otherwise -- reserve the requested value. (NB, bus number reservation
is not supposed to work before
<https://bugzilla.tianocore.org/show_bug.cgi?id=656> is fixed.)
* Io:
* 0 -- no reservation;
* (-1) -- keep our current default (512B);
* otherwise -- round up the requested value and reserve that.
* NonPrefetchable32BitMmio:
* 0 -- no reservation;
* (-1) -- keep our current default (2MB);
* otherwise -- round up the requested value and reserve that.
* Prefetchable32BitMmio:
* 0 -- no reservation, proceed to Prefetchable64BitMmio;
* (-1) -- firmware default, i.e. no reservation, proceed to
Prefetchable64BitMmio;
* otherwise -- round up the requested value and reserve that. (NB, if
Prefetchable32BitMmio is reserved in addition to
NonPrefetchable32BitMmio, then PciBusDxe currently runs into an
assertion failure. Refer to
<https://bugzilla.tianocore.org/show_bug.cgi?id=720>.)
* Prefetchable64BitMmio:
* only reached if Prefetchable32BitMmio was not reserved;
* 0 -- no reservation;
* (-1) -- firmware default, i.e. no reservation;
* otherwise -- round up the requested value and reserve that.
If QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION is missing, plus any
time the rounding fails, fall back to the current defaults.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
This commit is contained in:
Laszlo Ersek
parent
4776d5cb3a
commit
fe4049471b
@ -14,12 +14,14 @@
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**/
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**/
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#include <IndustryStandard/Acpi10.h>
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#include <IndustryStandard/Acpi10.h>
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#include <IndustryStandard/QemuPciBridgeCapabilities.h>
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#include <Library/BaseLib.h>
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#include <Library/BaseLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/DebugLib.h>
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#include <Library/DebugLib.h>
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#include <Library/DevicePathLib.h>
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#include <Library/DevicePathLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/PciLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Protocol/PciHotPlugInit.h>
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#include <Protocol/PciHotPlugInit.h>
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@ -246,6 +248,237 @@ HighBitSetRoundUp64 (
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}
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}
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/**
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Read a slice from conventional PCI config space at the given offset, then
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advance the offset.
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@param[in] PciAddress The address of the PCI Device -- Bus, Device, Function
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-- in UEFI (not PciLib) encoding.
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@param[in,out] Offset On input, the offset in conventional PCI config space
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to start reading from. On output, the offset of the
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first byte that was not read.
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@param[in] Size The number of bytes to read.
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@param[out] Buffer On output, the bytes read from PCI config space are
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stored in this object.
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**/
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STATIC
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VOID
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ReadConfigSpace (
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IN CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *PciAddress,
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IN OUT UINT8 *Offset,
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IN UINT8 Size,
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OUT VOID *Buffer
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)
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{
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PciReadBuffer (
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PCI_LIB_ADDRESS (
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PciAddress->Bus,
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PciAddress->Device,
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PciAddress->Function,
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*Offset
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),
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Size,
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Buffer
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);
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*Offset += Size;
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}
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/**
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Convenience wrapper macro for ReadConfigSpace().
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Given the following conditions:
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- HeaderField is the first field in the structure pointed-to by Struct,
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- Struct->HeaderField has been populated from the conventional PCI config
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space of the PCI device identified by PciAddress,
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- *Offset points one past HeaderField in the conventional PCI config space of
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the PCI device identified by PciAddress,
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populate the rest of *Struct from conventional PCI config space, starting at
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*Offset. Finally, increment *Offset so that it point one past *Struct.
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@param[in] PciAddress The address of the PCI Device -- Bus, Device, Function
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-- in UEFI (not PciLib) encoding. Type: pointer to
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CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
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@param[in,out] Offset On input, the offset in conventional PCI config space
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to start reading from; one past Struct->HeaderField.
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On output, the offset of the first byte that was not
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read; one past *Struct. Type: pointer to UINT8.
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@param[out] Struct The structure to complete. Type: pointer to structure
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object.
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@param[in] HeaderField The name of the first field in *Struct, after which
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*Struct should be populated. Type: structure member
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identifier.
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**/
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#define COMPLETE_CONFIG_SPACE_STRUCT(PciAddress, Offset, Struct, HeaderField) \
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ReadConfigSpace ( \
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(PciAddress), \
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(Offset), \
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(UINT8)(sizeof *(Struct) - sizeof ((Struct)->HeaderField)), \
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&((Struct)->HeaderField) + 1 \
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)
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/**
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Look up the QEMU-specific Resource Reservation capability in the conventional
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config space of a Hotplug Controller (that is, PCI Bridge).
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This function performs as few config space reads as possible.
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@param[in] HpcPciAddress The address of the PCI Bridge -- Bus, Device,
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Function -- in UEFI (not PciLib) encoding.
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@param[out] ReservationHint The caller-allocated capability structure to
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populate from the PCI Bridge's config space.
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@retval EFI_SUCCESS The capability has been found, ReservationHint has
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been populated.
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@retval EFI_NOT_FOUND The capability is missing. The contents of
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ReservationHint are now indeterminate.
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**/
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STATIC
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EFI_STATUS
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QueryReservationHint (
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IN CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *HpcPciAddress,
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OUT QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION *ReservationHint
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)
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{
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UINT16 PciVendorId;
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UINT16 PciStatus;
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UINT8 PciCapPtr;
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UINT8 Offset;
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//
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// Check the vendor identifier.
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//
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PciVendorId = PciRead16 (
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PCI_LIB_ADDRESS (
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HpcPciAddress->Bus,
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HpcPciAddress->Device,
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HpcPciAddress->Function,
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PCI_VENDOR_ID_OFFSET
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)
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);
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if (PciVendorId != QEMU_PCI_BRIDGE_VENDOR_ID_REDHAT) {
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return EFI_NOT_FOUND;
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}
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//
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// Check the Capabilities List bit in the PCI Status Register.
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//
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PciStatus = PciRead16 (
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PCI_LIB_ADDRESS (
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HpcPciAddress->Bus,
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HpcPciAddress->Device,
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HpcPciAddress->Function,
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PCI_PRIMARY_STATUS_OFFSET
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)
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);
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if ((PciStatus & EFI_PCI_STATUS_CAPABILITY) == 0) {
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return EFI_NOT_FOUND;
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}
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//
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// Fetch the start of the Capabilities List.
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//
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PciCapPtr = PciRead8 (
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PCI_LIB_ADDRESS (
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HpcPciAddress->Bus,
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HpcPciAddress->Device,
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HpcPciAddress->Function,
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PCI_CAPBILITY_POINTER_OFFSET
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)
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);
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//
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// Scan the Capabilities List until we find the terminator element, or the
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// Resource Reservation capability.
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//
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for (Offset = PciCapPtr & 0xFC;
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Offset > 0;
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Offset = ReservationHint->BridgeHdr.VendorHdr.Hdr.NextItemPtr & 0xFC) {
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BOOLEAN EnoughRoom;
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//
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// Check if the Resource Reservation capability would fit into config space
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// at this offset.
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//
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EnoughRoom = (BOOLEAN)(
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Offset <= PCI_MAX_CONFIG_OFFSET - sizeof *ReservationHint
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);
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//
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// Read the standard capability header so we can check the capability ID
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// (if necessary) and advance to the next capability.
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//
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ReadConfigSpace (
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HpcPciAddress,
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&Offset,
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(UINT8)sizeof ReservationHint->BridgeHdr.VendorHdr.Hdr,
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&ReservationHint->BridgeHdr.VendorHdr.Hdr
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);
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if (!EnoughRoom ||
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(ReservationHint->BridgeHdr.VendorHdr.Hdr.CapabilityID !=
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EFI_PCI_CAPABILITY_ID_VENDOR)) {
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continue;
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}
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//
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// Read the rest of the vendor capability header so we can check the
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// capability length.
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//
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COMPLETE_CONFIG_SPACE_STRUCT (
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HpcPciAddress,
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&Offset,
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&ReservationHint->BridgeHdr.VendorHdr,
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Hdr
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);
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if (ReservationHint->BridgeHdr.VendorHdr.Length !=
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sizeof *ReservationHint) {
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continue;
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}
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//
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// Read the rest of the QEMU bridge capability header so we can check the
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// capability type.
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//
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COMPLETE_CONFIG_SPACE_STRUCT (
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HpcPciAddress,
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&Offset,
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&ReservationHint->BridgeHdr,
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VendorHdr
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);
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if (ReservationHint->BridgeHdr.Type !=
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QEMU_PCI_BRIDGE_CAPABILITY_TYPE_RESOURCE_RESERVATION) {
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continue;
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}
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//
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// Read the body of the reservation hint.
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//
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COMPLETE_CONFIG_SPACE_STRUCT (
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HpcPciAddress,
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&Offset,
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ReservationHint,
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BridgeHdr
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);
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return EFI_SUCCESS;
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}
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return EFI_NOT_FOUND;
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}
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/**
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/**
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Returns a list of root Hot Plug Controllers (HPCs) that require
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Returns a list of root Hot Plug Controllers (HPCs) that require
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initialization during the boot process.
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initialization during the boot process.
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@ -402,16 +635,19 @@ GetResourcePadding (
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OUT EFI_HPC_PADDING_ATTRIBUTES *Attributes
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OUT EFI_HPC_PADDING_ATTRIBUTES *Attributes
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)
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)
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{
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{
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *Address;
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BOOLEAN DefaultIo;
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BOOLEAN DefaultIo;
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BOOLEAN DefaultMmio;
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BOOLEAN DefaultMmio;
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RESOURCE_PADDING ReservationRequest;
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RESOURCE_PADDING ReservationRequest;
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *FirstResource;
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *FirstResource;
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EFI_STATUS ReservationHintStatus;
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QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION ReservationHint;
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Address = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *)&HpcPciAddress;
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DEBUG_CODE (
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DEBUG_CODE (
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *Address;
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CHAR16 *DevicePathString;
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CHAR16 *DevicePathString;
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Address = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *)&HpcPciAddress;
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DevicePathString = ConvertDevicePathToText (HpcDevicePath, FALSE, FALSE);
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DevicePathString = ConvertDevicePathToText (HpcDevicePath, FALSE, FALSE);
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DEBUG ((EFI_D_VERBOSE, "%a: Address=%02x:%02x.%x DevicePath=%s\n",
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DEBUG ((EFI_D_VERBOSE, "%a: Address=%02x:%02x.%x DevicePath=%s\n",
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@ -440,8 +676,134 @@ GetResourcePadding (
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ARRAY_SIZE (ReservationRequest.Padding);
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ARRAY_SIZE (ReservationRequest.Padding);
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//
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//
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// (b) Reserve IO space.
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// Try to get the QEMU-specific Resource Reservation capability.
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//
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//
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ReservationHintStatus = QueryReservationHint (Address, &ReservationHint);
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if (!EFI_ERROR (ReservationHintStatus)) {
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INTN HighBit;
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DEBUG ((
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DEBUG_VERBOSE,
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"%a: BusNumbers=0x%x Io=0x%Lx NonPrefetchable32BitMmio=0x%x\n"
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"%a: Prefetchable32BitMmio=0x%x Prefetchable64BitMmio=0x%Lx\n",
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__FUNCTION__,
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ReservationHint.BusNumbers,
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ReservationHint.Io,
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ReservationHint.NonPrefetchable32BitMmio,
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__FUNCTION__,
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ReservationHint.Prefetchable32BitMmio,
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ReservationHint.Prefetchable64BitMmio
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));
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//
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// (a) Reserve bus numbers.
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//
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switch (ReservationHint.BusNumbers) {
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case 0:
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//
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// No reservation needed.
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//
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break;
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case MAX_UINT32:
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//
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// Firmware default (unspecified). Treat it as "no reservation needed".
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//
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break;
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default:
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//
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// Request the specified amount.
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//
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--FirstResource;
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FirstResource->ResType = ACPI_ADDRESS_SPACE_TYPE_BUS;
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FirstResource->AddrLen = ReservationHint.BusNumbers;
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break;
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}
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//
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// (b) Reserve IO space.
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//
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switch (ReservationHint.Io) {
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case 0:
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//
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// No reservation needed, disable our built-in.
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//
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DefaultIo = FALSE;
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break;
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case MAX_UINT64:
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//
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// Firmware default (unspecified). Stick with our built-in.
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//
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break;
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default:
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//
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// Round the specified amount up to the next power of two. If rounding is
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// successful, reserve the rounded value. Fall back to the default
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// otherwise.
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//
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HighBit = HighBitSetRoundUp64 (ReservationHint.Io);
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if (HighBit != -1) {
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SetIoPadding (--FirstResource, (UINTN)HighBit);
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DefaultIo = FALSE;
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}
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break;
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}
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//
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// (c) Reserve non-prefetchable MMIO space (32-bit only).
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//
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switch (ReservationHint.NonPrefetchable32BitMmio) {
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case 0:
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//
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// No reservation needed, disable our built-in.
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//
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DefaultMmio = FALSE;
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|
break;
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case MAX_UINT32:
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|
//
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// Firmware default (unspecified). Stick with our built-in.
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||||||
|
//
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
//
|
||||||
|
// Round the specified amount up to the next power of two. If rounding is
|
||||||
|
// successful, reserve the rounded value. Fall back to the default
|
||||||
|
// otherwise.
|
||||||
|
//
|
||||||
|
HighBit = HighBitSetRoundUp32 (ReservationHint.NonPrefetchable32BitMmio);
|
||||||
|
if (HighBit != -1) {
|
||||||
|
SetMmioPadding (--FirstResource, FALSE, TRUE, (UINTN)HighBit);
|
||||||
|
DefaultMmio = FALSE;
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
//
|
||||||
|
// (d) Reserve prefetchable MMIO space (either 32-bit or 64-bit, never
|
||||||
|
// both).
|
||||||
|
//
|
||||||
|
// For either space, we treat 0 as "no reservation needed", and the maximum
|
||||||
|
// value as "firmware default". The latter is unspecified, and we interpret
|
||||||
|
// it as the former.
|
||||||
|
//
|
||||||
|
// Otherwise, round the specified amount up to the next power of two. If
|
||||||
|
// rounding is successful, reserve the rounded value. Do not reserve
|
||||||
|
// prefetchable MMIO space otherwise.
|
||||||
|
//
|
||||||
|
if (ReservationHint.Prefetchable32BitMmio > 0 &&
|
||||||
|
ReservationHint.Prefetchable32BitMmio < MAX_UINT32) {
|
||||||
|
HighBit = HighBitSetRoundUp32 (ReservationHint.Prefetchable32BitMmio);
|
||||||
|
if (HighBit != -1) {
|
||||||
|
SetMmioPadding (--FirstResource, TRUE, TRUE, (UINTN)HighBit);
|
||||||
|
}
|
||||||
|
} else if (ReservationHint.Prefetchable64BitMmio > 0 &&
|
||||||
|
ReservationHint.Prefetchable64BitMmio < MAX_UINT64) {
|
||||||
|
HighBit = HighBitSetRoundUp64 (ReservationHint.Prefetchable64BitMmio);
|
||||||
|
if (HighBit != -1) {
|
||||||
|
SetMmioPadding (--FirstResource, TRUE, FALSE, (UINTN)HighBit);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
if (DefaultIo) {
|
if (DefaultIo) {
|
||||||
//
|
//
|
||||||
// Request defaults.
|
// Request defaults.
|
||||||
@ -449,9 +811,6 @@ GetResourcePadding (
|
|||||||
SetIoPadding (--FirstResource, (UINTN)HighBitSetRoundUp64 (512));
|
SetIoPadding (--FirstResource, (UINTN)HighBitSetRoundUp64 (512));
|
||||||
}
|
}
|
||||||
|
|
||||||
//
|
|
||||||
// (c) Reserve non-prefetchable MMIO space (32-bit only).
|
|
||||||
//
|
|
||||||
if (DefaultMmio) {
|
if (DefaultMmio) {
|
||||||
//
|
//
|
||||||
// Request defaults.
|
// Request defaults.
|
||||||
|
|||||||
@ -27,6 +27,7 @@
|
|||||||
[Packages]
|
[Packages]
|
||||||
MdeModulePkg/MdeModulePkg.dec
|
MdeModulePkg/MdeModulePkg.dec
|
||||||
MdePkg/MdePkg.dec
|
MdePkg/MdePkg.dec
|
||||||
|
OvmfPkg/OvmfPkg.dec
|
||||||
|
|
||||||
[LibraryClasses]
|
[LibraryClasses]
|
||||||
BaseLib
|
BaseLib
|
||||||
@ -34,6 +35,7 @@
|
|||||||
DebugLib
|
DebugLib
|
||||||
DevicePathLib
|
DevicePathLib
|
||||||
MemoryAllocationLib
|
MemoryAllocationLib
|
||||||
|
PciLib
|
||||||
UefiBootServicesTableLib
|
UefiBootServicesTableLib
|
||||||
UefiDriverEntryPoint
|
UefiDriverEntryPoint
|
||||||
|
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user