mirror of
https://github.com/acidanthera/audk.git
synced 2025-07-23 21:54:27 +02:00
Ring3: Refactored Ring3 initialization.
This commit is contained in:
Mikhail Krichanov
parent
ed1ee15c9c
commit
fe43687460
@ -2852,16 +2852,4 @@ EnableSMAP (
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VOID
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VOID
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);
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);
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VOID
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EFIAPI
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DisableSMEP (
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VOID
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);
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VOID
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EFIAPI
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EnableSMEP (
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VOID
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);
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#endif
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#endif
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@ -1590,6 +1590,113 @@ AllocateRing3CopyPages (
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return MemoryRing3;
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return MemoryRing3;
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}
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}
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VOID
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EFIAPI
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InitializeRing3 (
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IN EFI_HANDLE ImageHandle,
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IN LOADED_IMAGE_PRIVATE_DATA *Image
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)
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{
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VOID *BaseOfStack;
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VOID *TopOfStack;
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UINTN SizeOfStack;
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UINT64 Msr;
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IA32_CR4 Cr4;
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IA32_EFLAGS32 Eflags;
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UINT32 Ebx;
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UINT32 Edx;
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MSR_IA32_EFER_REGISTER MsrEfer;
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Ebx = 0;
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Edx = 0;
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//
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// Set Ring3 EntryPoint and BootServices.
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//
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mRing3Data = AllocateRing3CopyPages ((VOID *)Image->Info.SystemTable, sizeof (RING3_DATA));
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Image->Status = Image->EntryPoint (ImageHandle, (EFI_SYSTEM_TABLE *)mRing3Data);
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gRing3EntryPoint = mRing3Data->EntryPoint;
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mRing3Data->SystemTable.BootServices = mRing3Data->BootServices;
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//
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// Forbid supervisor-mode accesses to any user-mode pages.
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// SMEP and SMAP must be supported.
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//
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AsmCpuidEx (0x07, 0x0, NULL, &Ebx, NULL, NULL);
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//
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// SYSCALL and SYSRET must be also supported.
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//
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AsmCpuidEx (0x80000001, 0x0, NULL, NULL, NULL, &Edx);
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if (((Ebx & BIT20) != 0) && ((Ebx & BIT7) != 0) && ((Edx & BIT11) != 0)) {
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Cr4.UintN = AsmReadCr4 ();
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Cr4.Bits.SMAP = 1;
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Cr4.Bits.SMEP = 1;
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AsmWriteCr4 (Cr4.UintN);
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Eflags.UintN = AsmReadEflags ();
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Eflags.Bits.AC = 0;
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//
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// Allow user image to access ports.
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//
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Eflags.Bits.IOPL = 3;
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AsmWriteEflags (Eflags.UintN);
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//
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// Enable SYSCALL and SYSRET.
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//
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MsrEfer.Uint64 = AsmReadMsr64 (MSR_IA32_EFER);
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MsrEfer.Bits.SCE = 1;
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AsmWriteMsr64 (MSR_IA32_EFER, MsrEfer.Uint64);
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}
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SizeOfStack = EFI_SIZE_TO_PAGES (USER_STACK_SIZE) * EFI_PAGE_SIZE;
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//
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// Allocate 128KB for the Core SysCall Stack.
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//
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BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (USER_STACK_SIZE));
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ASSERT (BaseOfStack != NULL);
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//
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// Compute the top of the allocated stack. Pre-allocate a UINTN for safety.
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//
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TopOfStack = (VOID *)((UINTN)BaseOfStack + SizeOfStack - CPU_STACK_ALIGNMENT);
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TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
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gCoreSysCallStackTop = TopOfStack;
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SetUefiImageMemoryAttributes ((UINTN)BaseOfStack, SizeOfStack, EFI_MEMORY_XP);
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DEBUG ((DEBUG_ERROR, "Core: gCoreSysCallStackTop = %p\n", gCoreSysCallStackTop));
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//
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// Allocate 128KB for the User Stack.
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//
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BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (USER_STACK_SIZE));
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ASSERT (BaseOfStack != NULL);
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//
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// Compute the top of the allocated stack. Pre-allocate a UINTN for safety.
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//
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TopOfStack = (VOID *)((UINTN)BaseOfStack + SizeOfStack - CPU_STACK_ALIGNMENT);
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TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
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gRing3CallStackTop = TopOfStack;
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SetUefiImageMemoryAttributes ((UINTN)BaseOfStack, SizeOfStack, EFI_MEMORY_XP | EFI_MEMORY_USER);
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DEBUG ((DEBUG_ERROR, "Core: gRing3CallStackTop = %p\n", gRing3CallStackTop));
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//
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// Initialize MSR_IA32_STAR and MSR_IA32_LSTAR for SYSCALL and SYSRET.
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//
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Msr = ((((UINT64)RING3_CODE64_SEL - 16) << 16) | (UINT64)RING0_CODE64_SEL) << 32;
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AsmWriteMsr64 (MSR_IA32_STAR, Msr);
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Msr = (UINT64)(UINTN)CoreBootServices;
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AsmWriteMsr64 (MSR_IA32_LSTAR, Msr);
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}
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/**
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/**
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Transfer control to a loaded image's entry point.
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Transfer control to a loaded image's entry point.
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@ -1624,10 +1731,6 @@ CoreStartImage (
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UINTN SetJumpFlag;
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UINTN SetJumpFlag;
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EFI_HANDLE Handle;
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EFI_HANDLE Handle;
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UINT64 Attributes;
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UINT64 Attributes;
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VOID *BaseOfStack;
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VOID *TopOfStack;
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UINTN SizeOfStack;
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UINT64 Msr;
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Handle = ImageHandle;
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Handle = ImageHandle;
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@ -1720,63 +1823,12 @@ CoreStartImage (
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//
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//
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Image->Started = TRUE;
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Image->Started = TRUE;
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if (!Image->IsUserImage) {
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if (Image->IsRing3EntryPoint) {
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Image->Status = Image->EntryPoint (ImageHandle, Image->Info.SystemTable);
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InitializeRing3 (ImageHandle, Image);
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} else if (Image->IsRing3EntryPoint) {
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} else if (Image->IsUserImage) {
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gCpu->GetMemoryAttributes (gCpu, (EFI_PHYSICAL_ADDRESS)Image->EntryPoint, &Attributes);
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gCpu->GetMemoryAttributes (gCpu, (EFI_PHYSICAL_ADDRESS)Image->EntryPoint, &Attributes);
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ASSERT ((Attributes & EFI_MEMORY_USER) != 0);
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ASSERT ((Attributes & EFI_MEMORY_USER) != 0);
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mRing3Data = AllocateRing3CopyPages ((VOID *)Image->Info.SystemTable, sizeof (RING3_DATA));
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DisableSMAP ();
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DisableSMEP ();
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Image->Status = Image->EntryPoint (ImageHandle, (EFI_SYSTEM_TABLE *)mRing3Data);
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gRing3EntryPoint = mRing3Data->EntryPoint;
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mRing3Data->SystemTable.BootServices = mRing3Data->BootServices;
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EnableSMEP ();
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EnableSMAP ();
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} else {
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gCpu->GetMemoryAttributes (gCpu, (EFI_PHYSICAL_ADDRESS)Image->EntryPoint, &Attributes);
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ASSERT ((Attributes & EFI_MEMORY_USER) != 0);
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SizeOfStack = EFI_SIZE_TO_PAGES (USER_STACK_SIZE) * EFI_PAGE_SIZE;
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//
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// Allocate 128KB for the Core SysCall Stack.
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//
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BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (USER_STACK_SIZE));
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ASSERT (BaseOfStack != NULL);
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//
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// Compute the top of the allocated stack. Pre-allocate a UINTN for safety.
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//
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TopOfStack = (VOID *)((UINTN)BaseOfStack + SizeOfStack - CPU_STACK_ALIGNMENT);
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TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
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gCoreSysCallStackTop = TopOfStack;
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SetUefiImageMemoryAttributes ((UINTN)BaseOfStack, SizeOfStack, EFI_MEMORY_XP);
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DEBUG ((DEBUG_ERROR, "Core: gCoreSysCallStackTop = %p\n", gCoreSysCallStackTop));
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//
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// Allocate 128KB for the User Stack.
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//
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BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (USER_STACK_SIZE));
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ASSERT (BaseOfStack != NULL);
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//
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// Compute the top of the allocated stack. Pre-allocate a UINTN for safety.
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//
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TopOfStack = (VOID *)((UINTN)BaseOfStack + SizeOfStack - CPU_STACK_ALIGNMENT);
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TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
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gRing3CallStackTop = TopOfStack;
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SetUefiImageMemoryAttributes ((UINTN)BaseOfStack, SizeOfStack, EFI_MEMORY_XP | EFI_MEMORY_USER);
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DEBUG ((DEBUG_ERROR, "Core: gRing3CallStackTop = %p\n", gRing3CallStackTop));
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//
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//
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// Necessary fix for ProcessLibraryConstructorList() -> DxeCcProbeLibConstructor()
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// Necessary fix for ProcessLibraryConstructorList() -> DxeCcProbeLibConstructor()
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//
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//
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@ -1786,22 +1838,13 @@ CoreStartImage (
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EFI_MEMORY_XP | EFI_MEMORY_USER
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EFI_MEMORY_XP | EFI_MEMORY_USER
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);
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);
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DEBUG ((DEBUG_ERROR, "Core: BootServices = 0x%lx\n", (UINTN)Image->Info.SystemTable->BootServices));
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//
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// Initialize MSR_IA32_STAR and MSR_IA32_LSTAR for SYSCALL and SYSRET.
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//
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Msr = ((((UINT64)RING3_CODE64_SEL - 16) << 16) | (UINT64)RING0_CODE64_SEL) << 32;
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AsmWriteMsr64 (MSR_IA32_STAR, Msr);
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Msr = (UINT64)(UINTN)CoreBootServices;
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AsmWriteMsr64 (MSR_IA32_LSTAR, Msr);
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Image->Status = CallRing3 (
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Image->Status = CallRing3 (
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(VOID *)Image->EntryPoint,
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(VOID *)Image->EntryPoint,
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ImageHandle,
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ImageHandle,
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(EFI_SYSTEM_TABLE *)mRing3Data
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(EFI_SYSTEM_TABLE *)mRing3Data
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);
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);
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} else {
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Image->Status = Image->EntryPoint (ImageHandle, Image->Info.SystemTable);
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}
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}
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//
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//
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@ -11,34 +11,6 @@
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#include <Protocol/ComponentName.h>
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#include <Protocol/ComponentName.h>
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#include <Protocol/DevicePathUtilities.h>
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#include <Protocol/DevicePathUtilities.h>
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VOID
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EFIAPI
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DisableSMEP (
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VOID
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)
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{
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IA32_CR4 Cr4;
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Cr4.UintN = AsmReadCr4 ();
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Cr4.Bits.SMEP = 0;
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AsmWriteCr4 (Cr4.UintN);
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}
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VOID
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EFIAPI
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EnableSMEP (
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VOID
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)
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{
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IA32_CR4 Cr4;
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Cr4.UintN = AsmReadCr4 ();
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Cr4.Bits.SMEP = 1;
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AsmWriteCr4 (Cr4.UintN);
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}
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EFI_STATUS
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EFI_STATUS
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EFIAPI
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EFIAPI
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CallInstallMultipleProtocolInterfaces (
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CallInstallMultipleProtocolInterfaces (
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@ -705,13 +705,6 @@ CreateIdentityMappingPageTables (
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PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
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PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
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UINT64 AddressEncMask;
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UINT64 AddressEncMask;
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IA32_CR4 Cr4;
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IA32_CR4 Cr4;
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IA32_EFLAGS32 Eflags;
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UINT32 Ebx;
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UINT32 Edx;
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MSR_IA32_EFER_REGISTER MsrEfer;
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Ebx = 0;
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Edx = 0;
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//
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//
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// Set PageMapLevel5Entry to suppress incorrect compiler/analyzer warnings
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// Set PageMapLevel5Entry to suppress incorrect compiler/analyzer warnings
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@ -984,35 +977,5 @@ CreateIdentityMappingPageTables (
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EnableExecuteDisableBit ();
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EnableExecuteDisableBit ();
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}
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}
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//
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// Forbid supervisor-mode accesses to any user-mode pages.
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// SMEP and SMAP must be supported.
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//
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AsmCpuidEx (0x07, 0x0, NULL, &Ebx, NULL, NULL);
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//
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// SYSCALL and SYSRET must be also supported.
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//
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AsmCpuidEx (0x80000001, 0x0, NULL, NULL, NULL, &Edx);
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if (((Ebx & BIT20) != 0) && ((Ebx & BIT7) != 0) && ((Edx & BIT11) != 0)) {
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Cr4.UintN = AsmReadCr4 ();
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Cr4.Bits.SMAP = 1;
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Cr4.Bits.SMEP = 1;
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AsmWriteCr4 (Cr4.UintN);
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Eflags.UintN = AsmReadEflags ();
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Eflags.Bits.AC = 0;
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//
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// Allow user image to access ports.
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//
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Eflags.Bits.IOPL = 3;
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AsmWriteEflags (Eflags.UintN);
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//
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// Enable SYSCALL and SYSRET.
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//
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MsrEfer.Uint64 = AsmReadMsr64 (MSR_IA32_EFER);
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MsrEfer.Bits.SCE = 1;
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AsmWriteMsr64 (MSR_IA32_EFER, MsrEfer.Uint64);
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}
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return (UINTN)PageMap;
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return (UINTN)PageMap;
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}
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}
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