From fed6cf25b8eefccf302f90f1fa7e54bf4a91b124 Mon Sep 17 00:00:00 2001
From: Star Zeng <star.zeng@intel.com>
Date: Sun, 21 Oct 2018 12:12:39 +0800
Subject: [PATCH] MdeModulePkg XhciDxe: Assign Usb2Hc.XXXRevision based on SBRN

Current hard code Usb2Hc.XXXRevision may be not accurate.
This patch updates code to assign Usb2Hc.XXXRevision based on
SBRN (Serial Bus Release Number, PCI configuration space offset
0x60) although there is no code consuming them.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
---
 MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c    | 14 ++++++++++++++
 MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h |  2 ++
 2 files changed, 16 insertions(+)

diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
index 48eccf770a..4796d4611b 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
@@ -1770,6 +1770,7 @@ XhcCreateUsbHc (
   EFI_STATUS              Status;
   UINT32                  PageSize;
   UINT16                  ExtCapReg;
+  UINT8                   ReleaseNumber;
 
   Xhc = AllocateZeroPool (sizeof (USB_XHCI_INSTANCE));
 
@@ -1786,6 +1787,19 @@ XhcCreateUsbHc (
   Xhc->OriginalPciAttributes = OriginalPciAttributes;
   CopyMem (&Xhc->Usb2Hc, &gXhciUsb2HcTemplate, sizeof (EFI_USB2_HC_PROTOCOL));
 
+  Status = PciIo->Pci.Read (
+                        PciIo,
+                        EfiPciIoWidthUint8,
+                        XHC_PCI_SBRN_OFFSET,
+                        1,
+                        &ReleaseNumber
+                        );
+
+  if (!EFI_ERROR (Status)) {
+    Xhc->Usb2Hc.MajorRevision = (ReleaseNumber & 0xF0) >> 4;
+    Xhc->Usb2Hc.MinorRevision = (ReleaseNumber & 0x0F);
+  }
+
   InitializeListHead (&Xhc->AsyncIntTransfers);
 
   //
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
index 20e7ac0e8f..feef3a4bd5 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
@@ -26,6 +26,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #define XHC_PCI_BAR_OFFSET          0x10       // Memory Bar Register Offset
 #define XHC_PCI_BAR_MASK            0xFFFF     // Memory Base Address Mask
 
+#define XHC_PCI_SBRN_OFFSET         0x60       // Serial Bus Release Number Register Offset
+
 #define USB_HUB_CLASS_CODE          0x09
 #define USB_HUB_SUBCLASS_CODE       0x00