1. Add new API MigratePeiServicesTablePointer() in PeiServicesTablePointerLib class.

2. PeiCore will call this API to migrate the PEI Services Table pointer from temporary RAM to permanent RAM.

Signed-off-by: Gao, Liming <liming.gao@intel.com>
Reviewed-by: Kinney, Michael D <michael.d.kinney@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15114 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Gao, Liming 2014-01-15 02:16:57 +00:00 committed by lgao4
parent 2405af1993
commit ffdb421ca5
5 changed files with 120 additions and 42 deletions

View File

@ -1,7 +1,7 @@
/** @file
Provides a service to retrieve a pointer to the PEI Services Table.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -50,5 +50,24 @@ SetPeiServicesTablePointer (
IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer
);
/**
Perform CPU specific actions required to migrate the PEI Services Table
pointer from temporary RAM to permanent RAM.
For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
immediately preceding the Interrupt Descriptor Table (IDT) in memory.
For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
immediately preceding the Interrupt Descriptor Table (IDT) in memory.
For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
a dedicated CPU register. This means that there is no memory storage
associated with storing the PEI Services Table pointer, so no additional
migration actions are required for Itanium or ARM CPUs.
**/
VOID
EFIAPI
MigratePeiServicesTablePointer (
);
#endif

View File

@ -4,7 +4,7 @@
This library is used for PEIM which does executed from flash device directly but
executed in memory.
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -88,4 +88,28 @@ PeiServicesTablePointerLibConstructor (
return EFI_SUCCESS;
}
/**
Perform CPU specific actions required to migrate the PEI Services Table
pointer from temporary RAM to permanent RAM.
For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
immediately preceding the Interrupt Descriptor Table (IDT) in memory.
For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
immediately preceding the Interrupt Descriptor Table (IDT) in memory.
For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
a dedicated CPU register. This means that there is no memory storage
associated with storing the PEI Services Table pointer, so no additional
migration actions are required for Itanium or ARM CPUs.
**/
VOID
EFIAPI
MigratePeiServicesTablePointer (
)
{
//
// PEI Services Table pointer is cached in the global variable. No additional
// migration actions are required.
//
return;
}

View File

@ -4,7 +4,7 @@
According to PI specification, the peiservice pointer is stored prior at IDT
table in IA32 and x64 architecture.
Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -21,7 +21,6 @@
#include <Library/PeiServicesTablePointerLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
#include <Ppi/TemporaryRamSupport.h>
/**
Retrieves the cached value of the PEI Services Table pointer.
@ -70,42 +69,62 @@ SetPeiServicesTablePointer (
)
{
IA32_DESCRIPTOR Idtr;
EFI_PHYSICAL_ADDRESS IdtBase;
EFI_STATUS Status;
EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI *TemporaryRamSupportPpi;
ASSERT (PeiServicesTablePointer != NULL);
AsmReadIdtr (&Idtr);
if ((*(UINTN*)(Idtr.Base - sizeof (UINTN))) != (UINTN)PeiServicesTablePointer) {
(*(UINTN*)(Idtr.Base - sizeof (UINTN))) = (UINTN)PeiServicesTablePointer;
Status = (*PeiServicesTablePointer)->LocatePpi (
PeiServicesTablePointer,
&gEfiTemporaryRamSupportPpiGuid,
0,
NULL,
(VOID**)&TemporaryRamSupportPpi
);
if (EFI_ERROR (Status)) {
//
// If TemporaryRamSupportPpi is not found, Idt table needs to be migrated into memory.
//
Status = (*PeiServicesTablePointer)->AllocatePages (
PeiServicesTablePointer,
EfiBootServicesCode,
EFI_SIZE_TO_PAGES(Idtr.Limit + 1 + sizeof (UINTN)),
&IdtBase
);
if (!EFI_ERROR (Status)) {
//
// Migrate Idt table
//
CopyMem ((VOID *) (UINTN) IdtBase, (VOID *) (Idtr.Base - sizeof (UINTN)), Idtr.Limit + 1 + sizeof (UINTN));
Idtr.Base = (UINTN) IdtBase + sizeof (UINTN);
AsmWriteIdtr (&Idtr);
}
}
}
(*(UINTN*)(Idtr.Base - sizeof (UINTN))) = (UINTN)PeiServicesTablePointer;
}
/**
Perform CPU specific actions required to migrate the PEI Services Table
pointer from temporary RAM to permanent RAM.
For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
immediately preceding the Interrupt Descriptor Table (IDT) in memory.
For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
immediately preceding the Interrupt Descriptor Table (IDT) in memory.
For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
a dedicated CPU register. This means that there is no memory storage
associated with storing the PEI Services Table pointer, so no additional
migration actions are required for Itanium or ARM CPUs.
If The cached PEI Services Table pointer is NULL, then ASSERT().
If the permanent memory is allocated failed, then ASSERT().
**/
VOID
EFIAPI
MigratePeiServicesTablePointer (
)
{
EFI_STATUS Status;
IA32_DESCRIPTOR Idtr;
EFI_PHYSICAL_ADDRESS IdtBase;
CONST EFI_PEI_SERVICES **PeiServices;
//
// Get PEI Services Table pointer
//
AsmReadIdtr (&Idtr);
PeiServices = (CONST EFI_PEI_SERVICES **) (*(UINTN*)(Idtr.Base - sizeof (UINTN)));
ASSERT (PeiServices != NULL);
//
// Allocate the permanent memory.
//
Status = (*PeiServices)->AllocatePages (
PeiServices,
EfiBootServicesCode,
EFI_SIZE_TO_PAGES(Idtr.Limit + 1 + sizeof (UINTN)),
&IdtBase
);
ASSERT_EFI_ERROR (Status);
//
// Idt table needs to be migrated into memory.
//
CopyMem ((VOID *) (UINTN) IdtBase, (VOID *) (Idtr.Base - sizeof (UINTN)), Idtr.Limit + 1 + sizeof (UINTN));
Idtr.Base = (UINTN) IdtBase + sizeof (UINTN);
AsmWriteIdtr (&Idtr);
return;
}

View File

@ -4,7 +4,7 @@
# PEI Services Table Pointer Library implementation that retrieves a pointer to the PEI
# Services Table from the IDT on IA-32 and x64.
#
# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@ -40,6 +40,3 @@
DebugLib
BaseLib
BaseMemoryLib
[Ppis]
gEfiTemporaryRamSupportPpiGuid ## SOMETIMES_CONSUMES

View File

@ -2,7 +2,7 @@
PEI Services Table Pointer Library implementation for IPF that uses Kernel
Register 7 to store the pointer.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -66,6 +66,25 @@ SetPeiServicesTablePointer (
AsmWriteKr7 ((UINT64)(UINTN)PeiServicesTablePointer);
}
/**
Perform CPU specific actions required to migrate the PEI Services Table
pointer from temporary RAM to permanent RAM.
For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
immediately preceding the Interrupt Descriptor Table (IDT) in memory.
For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
immediately preceding the Interrupt Descriptor Table (IDT) in memory.
For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
a dedicated CPU register. This means that there is no memory storage
associated with storing the PEI Services Table pointer, so no additional
migration actions are required for Itanium or ARM CPUs.
**/
VOID
EFIAPI
MigratePeiServicesTablePointer (
)
{
return;
}