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IntelSiliconPkg/VTdDxe: Disable PMR 

When VTd translation is enabled, PMR can be disable.
Or the DMA will be blocked by PMR.

Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
This commit is contained in:
Jiewen Yao 2017-09-08 13:39:43 +08:00
parent 40cc227055
commit ffe77707a3
1 changed files with 50 additions and 1 deletions
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51
IntelSiliconPkg/IntelVTdDxe/VtdReg.c
View File

@ -195,6 +195,39 @@ PrepareVtdConfig (
return ;
}
/**
Disable PMR in all VTd engine.
**/
VOID
DisablePmr (
VOID
)
{
UINT32 Reg32;
VTD_CAP_REG CapReg;
UINTN Index;
DEBUG ((DEBUG_INFO,"DisablePmr\n"));
for (Index = 0; Index < mVtdUnitNumber; Index++) {
CapReg.Uint64 = MmioRead64 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_CAP_REG);
if (CapReg.Bits.PLMR == 0 || CapReg.Bits.PHMR == 0) {
continue ;
}
Reg32 = MmioRead32 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_PMEN_ENABLE_REG);
if ((Reg32 & BIT0) != 0) {
MmioWrite32 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_PMEN_ENABLE_REG, 0x0);
do {
Reg32 = MmioRead32 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_PMEN_ENABLE_REG);
} while((Reg32 & BIT0) != 0);
DEBUG ((DEBUG_INFO,"Pmr(%d) disabled\n", Index));
} else {
DEBUG ((DEBUG_INFO,"Pmr(%d) not enabled\n", Index));
}
}
return ;
}
/**
Enable DMAR translation.
@ -259,6 +292,11 @@ EnableDmar (
DEBUG ((DEBUG_INFO,"VTD (%d) enabled!<<<<<<\n",Index));
}
//
// Need disable PMR, since we already setup translation table.
//
DisablePmr ();
mVtdEnabled = TRUE;
return EFI_SUCCESS;
@ -502,7 +540,7 @@ DumpVtdIfError (
for (Index = 0; Index < (UINTN)CapReg.Bits.NFR + 1; Index++) {
FrcdReg.Uint64[0] = MmioRead64 (mVtdUnitInformation[Num].VtdUnitBaseAddress + ((CapReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG));
FrcdReg.Uint64[1] = MmioRead64 (mVtdUnitInformation[Num].VtdUnitBaseAddress + ((CapReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG + sizeof(UINT64)));
if ((FrcdReg.Uint64[0] != 0) || (FrcdReg.Uint64[1] != 0)) {
if (FrcdReg.Bits.F != 0) {
HasError = TRUE;
}
}
@ -511,6 +549,17 @@ DumpVtdIfError (
DEBUG((DEBUG_INFO, "\n#### ERROR ####\n"));
DumpVtdRegs (Num);
DEBUG((DEBUG_INFO, "#### ERROR ####\n\n"));
//
// Clear
//
for (Index = 0; Index < (UINTN)CapReg.Bits.NFR + 1; Index++) {
FrcdReg.Uint64[1] = MmioRead64 (mVtdUnitInformation[Num].VtdUnitBaseAddress + ((CapReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG + sizeof(UINT64)));
if (FrcdReg.Bits.F != 0) {
FrcdReg.Bits.F = 0;
MmioWrite64 (mVtdUnitInformation[Num].VtdUnitBaseAddress + ((CapReg.Bits.FRO * 16) + (Index * 16) + R_FRCD_REG + sizeof(UINT64)), FrcdReg.Uint64[1]);
}
MmioWrite32 (mVtdUnitInformation[Num].VtdUnitBaseAddress + R_FSTS_REG, MmioRead32 (mVtdUnitInformation[Num].VtdUnitBaseAddress + R_FSTS_REG));
}
}
}
}