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Commit Graph

29 Commits

Author SHA1 Message Date
Mikhail Krichanov
3664e7206d Ring3: Renamed Ring3 as UserSpace. 2025-04-14 13:17:36 +03:00
Mikhail Krichanov
7ecac413b2 Ring3: Fixed bug in Uart initialization. 2025-04-14 13:14:52 +03:00
Mikhail Krichanov
10cb3149cd Core/Dxe: Added sanity checks. 2025-04-14 13:12:14 +03:00
Mikhail Krichanov
519bffe4f9 Core/Dxe: Placed platform dependent code into separate files. 2025-04-14 13:12:14 +03:00
Mikhail Krichanov
b01769d4c0 SysCall: Refactored UserStackTop to allocate it anew for each CallRing3. 2025-04-14 13:12:14 +03:00
Mikhail Krichanov
b13baeb518 Ring3: Refactored out SysCallStackTop. 2025-04-14 13:12:14 +03:00
Mikhail Krichanov
2601648b32 Ring3: Refactored out CoreRsp and UserStackTop. 2025-04-14 13:12:14 +03:00
Mikhail Krichanov
79d8607366 Ring3: Refactored out gCoreSysCallStackTop and gRing3CallStackTop. 2025-04-14 13:06:18 +03:00
Mikhail Krichanov
99b902bde1 Ring3: Refactored User and SysCall stacks allocation. 2025-04-14 13:06:18 +03:00
Mikhail Krichanov
f323165c69 SysCall: Fixed line endings. 2025-04-14 13:06:17 +03:00
Mikhail Krichanov
2ca7937d11 Ring3: Added support for AARCH64 User page table. 2025-04-14 13:05:02 +03:00
Mikhail Krichanov
1135998eae SysCall: Refactored MakeUserPageTableTemplate(). 2025-04-14 13:00:53 +03:00
Mikhail Krichanov
0e14a53096 Ring3: Added Idt to User page table. 2025-04-14 13:00:53 +03:00
Mikhail Krichanov
b6db1dd9ac Core/Dxe: Fixed memory type in Ring3AllocatePages(), and code alignment. 2025-04-14 12:54:02 +03:00
Mikhail Krichanov
70b97bff7c Ring3: Added necessary Core pages to User page table. 2025-04-14 12:54:02 +03:00
Mikhail Krichanov
6ad66cc634 Ring3: Split Page Table template construction and initialization, 
removed ChangeUefiImageRing(), added GetUefiImageRecord().
 2025-04-14 12:54:02 +03:00
Mikhail Krichanov
51447148b0 Ring3: Added support for separate User address space. 2025-04-14 12:50:53 +03:00
Mikhail Krichanov
0113d46aee Ring3: Fixed Uart bug. 2025-04-14 12:12:47 +03:00
Mikhail Krichanov
c01a188058 CpuExceptionHandlerLib: Added PcdSerialUseMmio condition. 2025-04-14 12:12:47 +03:00
Mikhail Krichanov
0baa0bcac3 Ring3: Added DebugLibFdtPL011UartUser without HOB dependancy. 2025-04-14 12:12:47 +03:00
Mikhail Krichanov
52fec299ed Core/Dxe: Changed line ending to Windows style. 2025-04-14 12:12:47 +03:00
Mikhail Krichanov
ea5ad0fb34 Ring3: Summarized all known problems for AARCH64. 2025-04-14 11:54:33 +03:00
Mikhail Krichanov
1eac0a2ed3 Ring3: Fixed some page faults caused by wrong memory attribution. 2025-04-14 11:52:51 +03:00
Mikhail Krichanov
a60692fa72 Ring3: Initialized DxeRing3 with Supervisor privileges. 2025-04-14 11:49:21 +03:00
Mikhail Krichanov
89a87a3ae4 SysCall: Fixed memory corruption in IA32. 2025-04-14 11:36:10 +03:00
Mikhail Krichanov
8ca773c920 Ring3: Moved platform dependant initialization to separate files. 2025-04-14 11:36:10 +03:00
Mikhail Krichanov
099a6e9e64 MdeModulePkg: Fixed MdeModulePkg compilation. 2025-04-14 11:36:10 +03:00
Mikhail Krichanov
507435e9f5 Ring3: Properly freed Ring3 resources. 2025-04-14 11:36:10 +03:00
Mikhail Krichanov
cac7056c3e Ring3: Moved InitializeRing3() to SysCall directory. 2025-04-14 11:36:10 +03:00