1772 Commits

Author SHA1 Message Date
Mikhail Krichanov
6a38507512 CpuExceptionHandlerLib: Saved UserPageTable on stack,
used CS saved on stack instead of DS for CPL extraction.
2025-04-14 13:12:14 +03:00
Mikhail Krichanov
a37ef161b6 Ring3: Fixed line endings. 2025-04-14 13:12:14 +03:00
Mikhail Krichanov
ca7d3c96c0 CpuExceptionHandlerLib: Refactored out mSwitchCr3Flag. 2025-04-14 13:12:14 +03:00
Mikhail Krichanov
7a0bb88360 Ring3: Fixed line endings. 2025-04-14 13:06:18 +03:00
Mikhail Krichanov
bf581dc3ce CpuArchLib: Fixed CpuGetMemoryAttributes(). 2025-04-14 13:00:53 +03:00
Mikhail Krichanov
98f13417fb CpuArchLib: Specified IdtTable size precisely. 2025-04-14 13:00:53 +03:00
Mikhail Krichanov
41c813f55f Ring3: Added support for IA32 User page table. 2025-04-14 13:00:53 +03:00
Mikhail Krichanov
1d3f665282 Ring3: Added support for User page table to AllocatePages(), FreePages(). 2025-04-14 13:00:53 +03:00
Mikhail Krichanov
0fd0e992d0 Ring3: Set 1G User pages as not present by default, fixed padding. 2025-04-14 13:00:53 +03:00
Mikhail Krichanov
0e14a53096 Ring3: Added Idt to User page table. 2025-04-14 13:00:53 +03:00
Mikhail Krichanov
3615418a84 Ring3: Added SetExceptionAddresses(), aligned exceptions' stacks. 2025-04-14 13:00:38 +03:00
Mikhail Krichanov
70b97bff7c Ring3: Added necessary Core pages to User page table. 2025-04-14 12:54:02 +03:00
Mikhail Krichanov
51447148b0 Ring3: Added support for separate User address space. 2025-04-14 12:50:53 +03:00
Mikhail Krichanov
c01a188058 CpuExceptionHandlerLib: Added PcdSerialUseMmio condition. 2025-04-14 12:12:47 +03:00
Mikhail Krichanov
1f1ce7241c CpuExceptionHandlerLib: Refactored IO Bit Map initialization. 2025-04-14 12:12:47 +03:00
Mikhail Krichanov
cca1e841e8 CpuExceptionHandlerLib: Added a separate stack for timer. 2025-04-14 12:12:47 +03:00
Mikhail Krichanov
213d1fdf18 Ring3: Refactored I/O Map initialization using PcdUartBase and PcdDebugIoPort. 2025-04-14 12:12:47 +03:00
Mikhail Krichanov
82dce45831 Ring3: Fixed buggy timer interrupt handling for X64. 2025-04-14 12:12:47 +03:00
Mikhail Krichanov
4a57dc0509 Ring3: Fixed buggy timer interrupt handling for IA32. 2025-04-14 12:12:47 +03:00
Mikhail Krichanov
755baf7951 Ring3: Fixed interrupts handling for IA32. 2025-04-14 11:36:10 +03:00
Mikhail Krichanov
3107ac82d5 Ring3: Fixed TSS initialization. 2025-04-14 11:36:10 +03:00
Mikhail Krichanov
8ca773c920 Ring3: Moved platform dependant initialization to separate files. 2025-04-14 11:36:10 +03:00
Mikhail Krichanov
cf3bb4d68b Ring3: Refactored exception handling. 2025-04-14 11:36:09 +03:00
Mikhail Krichanov
6c8b19286d Ring3: Forbade Ring3 accsess to all ports but for UART
to allow DEBUG printing.
2025-04-14 11:36:09 +03:00
Mikhail Krichanov
0822b7e12a Ring3: Fixed interrrupts handling. 2025-04-14 11:36:09 +03:00
Mikhail Krichanov
e36fd7b639 Ring3: Added SYSCALL draft. 2025-04-14 11:23:04 +03:00
Mikhail Krichanov
51e2c2a3e8 Ring3: Added EnterUserImage(). 2025-04-14 11:23:01 +03:00
Mikhail Krichanov
2fa2894bbd Ring3: Added GetMemoryAttributes() into EFI_CPU_ARCH_PROTOCOL. 2025-04-14 11:21:17 +03:00
Mikhail Krichanov
1a88ba5afc Ring3: Set USER bit in all page table structures. 2025-04-14 11:21:17 +03:00
Mikhail Krichanov
33f15b44de Ring3: Added EFI_MEMORY_USER attribute. 2025-04-14 11:21:14 +03:00
Mikhail Krichanov
a322c0acac Ring3: Some drafts. 2025-04-14 11:15:00 +03:00
Mikhail Krichanov
b3fb40092d UefiCpuPkg: Added segment descriptors' data structures. 2025-04-14 11:15:00 +03:00
Mikhail Krichanov
2068113e8b UefiCpuPkg: Fixed stack corruption. 2025-04-07 13:55:29 +03:00
Mikhail Krichanov
b3bf2495f3 UefiCpuPkg: Fixed OpenCorePkg/Utilities compilation. 2025-04-07 13:55:29 +03:00
Mikhail Krichanov
709984a981 Fixed compilation of all packages tracked by CI after rebasing upon edk2-stable202502 tag. 2025-04-07 13:54:15 +03:00
Mike Beaton
9cdba17a1a IntrinsicLib: Move from CryptoPkg to MdePkg 2025-04-07 12:32:50 +03:00
Mikhail Krichanov
ba561ef7ff Fixed compilation of all packages tracked by CI after rebasing upon edk2-stable202405 tag. 2025-04-07 12:32:50 +03:00
Mikhail Krichanov
0d9d6f987b Fixed compilation of all packages tracked by CI after rebasing upon edk2-stable202311. 2025-04-07 12:32:50 +03:00
Mikhail Krichanov
992385e15e SecurePE: Defined new PcdImageProtectionPolicy. 2025-04-07 12:30:28 +03:00
Mikhail Krichanov
48b806f46f UE: Support UE generation and consumption. 2025-04-07 12:24:28 +03:00
Mikhail Krichanov
1fef202932 MdePkg/UefiImageLib: Introduce DebugAddress
Signed-off-by: Marvin Häuser <mhaeuser@posteo.de>
2025-04-07 12:24:27 +03:00
Mikhail Krichanov
e46d356fc9 MdePkg/UefiImageLib: Support multi-format and multi-source architecture
Signed-off-by: Marvin Häuser <mhaeuser@posteo.de>
2025-04-07 12:24:27 +03:00
Mikhail Krichanov
20dd836214 MdeModulePkg/Core/Dxe: Integrate CPU Architectural producer
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3223

In the current design, memory protection is not available till CpuDxe
is loaded. To resolve this, introduce CpuArchLib to move the
CPU Architectural initialization to DxeCore.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Vitaly Cheptsov <vit9696@protonmail.com>
Signed-off-by: Marvin Häuser <mhaeuser@posteo.de>
2025-04-07 12:23:28 +03:00
Mikhail Krichanov
bc87d7b430 Drop support for the TE format 2025-04-07 12:18:22 +03:00
Mikhail Krichanov
27ffa568f5 UefiCpuPkg/CpuExceptionHandlerLib: Creates unified ExceptionHandlerAsm
This change removes Xcode5ExceptionHandlerAsm and merge it's
functionality into ExceptionHandlerAsm.
Also decreases number of vectors to 32 for:
- 64-bit PeiCpuExceptionHandlerLib
- 32-bit PeiCpuExceptionHandlerLib, SecPeiCpuExceptionHandlerLib

Signed-off-by: Savva Mitrofanov <savvamtr@gmail.com>
2025-04-07 12:18:22 +03:00
Mikhail Krichanov
6b652ab025 MdePkg/MemoryAllocationLib: Add Allocate(Aligned)CodePages 2025-04-07 12:16:51 +03:00
Marvin Häuser
72aa61ce91 UefiCpuPkg/MtrrLib: Add missing PcdLib.h include
MtrrLib does not include PcdLib.h despite explicitly using its
definitions. Add the include to fix compilation for modules that do not
utilize AutoGen.

Signed-off-by: Marvin Häuser <mhaeuser@posteo.de>
2025-04-07 12:13:58 +03:00
Savva Mitrofanov
85d905ee56 UefiCpuPkg/CpuPageTableLib: Add intrinsic lib to fix MSVC build
For the bitfield access, MSVC apparently uses a right shift of the base type of the bitfield member. In our case, is is cased by IA32_PTE_4K and
IA32_PAGE_LEAF_ENTRY_BIG_PAGESIZE and other structures which uses uint64
bitfields and 32-bit x86 doesn't have a 64-bit integer shift (except using MMX or SSE2). With -Od (NOOPT) even for constant counts it puts
the data in EDX:EAX, the shift count in cl and calls __aullshr.

Signed-off-by: Savva Mitrofanov <savvamtr@gmail.com>
2025-04-07 12:13:58 +03:00
Savva Mitrofanov
292e5ed762 UefiCpuPkg/UnitTest: Fixes CLANGDWARF build
Adds missing EFIAPI modifiers. Fixes calling conventions by defining as
ms_abi

Signed-off-by: Savva Mitrofanov <savvamtr@gmail.com>
2025-04-07 12:13:57 +03:00
Mikhail Krichanov
5d894921a3 BaseTools: Replaced GenFw with ImageTool and MicroTool. 2025-04-07 12:13:57 +03:00