Commit Graph

382 Commits

Author SHA1 Message Date
Ard Biesheuvel 34a4ddda4d BaseTools/Conf: disable DTC legacy phandle format
By default, the device tree compiler emits phandle properties twice:
once called 'phandle' and again called 'linux,phandle'. Given that
Linux was updated in early 2010 [0] to accept the former (which is
what is specified in the ePAPR and device tree specifications), there
is no point in emitting both when compiling device trees for UEFI
platforms.

[0] 04b954a673dd02f585a2769c4945a43880faa989
"of/flattree: Make the kernel accept ePAPR style phandle information"

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-02-06 09:58:31 +00:00
Ard Biesheuvel faf0475b13 BaseTools/tools_def CLANG3x: ignore unknown warning options
Ironically, disabling warnings in the OpensslLib library build is
causing breakage when using the CLANG35 toolchain to build for ARM:

error: unknown warning option '-Werror=maybe-uninitialized'; did you mean '-Werror=uninitialized'? [-Werror,-Wunknown-warning-option]

So let's add -Wno-unknown-warning-option to the list of warnings to
ignore when using Clang 3.5, and move the same option from the x86
specific list to the shared list for Clang 3.8.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-01-22 11:17:04 +00:00
Liming Gao 2583352f24 BaseTools: Use nasm as the preferred assembly source files for XCODE5 tool
https://bugzilla.tianocore.org/show_bug.cgi?id=850

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2018-01-16 23:29:55 +08:00
Liming Gao db408fa3c1 BaseTools: Disable -Wno-unused-const-variable in XCODE5 RELEASE target
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Andrew Fish <afish@apple.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2018-01-16 23:29:37 +08:00
Liming Gao 24a105a7d8 BaseTools: Disable warning varargs in XCODE5 align to CLANG38
https://bugzilla.tianocore.org/show_bug.cgi?id=741

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2018-01-16 23:29:29 +08:00
Ard Biesheuvel 06c8a34cc4 BaseTool/tools_def GCC5: enable optimization for ARM/AARCH64 DEBUG builds
Enable optimization for DEBUG builds, to make it more usable in terms of
performance, and to give more coverage to the LTO builds. Also, some
diagnostics are only enabled when optimization is enabled.
NOOPT builds can now also be created, which will retain the behavior DEBUG
builds had previously.

Note that this aligns ARM and AARCH64 with the x86 architectures, which
already use optimization for DEBUG builds.

In order to preserve existing behavior for users of older toolchains,
keep GCC49 and older as-is.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-12-08 15:04:42 +00:00
Ard Biesheuvel 1a21d339cd BaseTools/tools_def CLANG38: add -Wno-unused-const-variable
Commit 8b6366f875 ("BaseTools/GCC: set -Wno-unused-const-variable
on RELEASE builds") suppresses warnings about unused constant
variables in RELEASE builds when building with GCC, given that they
break the build under our warnings-as-errors policy.

Do the same for CLANG38.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=790
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Shi Steven <steven.shi@intel.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-12-08 15:02:44 +00:00
Ard Biesheuvel f2a3131fbe BaseTools/tools_def: add CLANG38 LTO versions for AARCH64 and ARM
Extend the CLANG38 toolchain definition so it can be used for
ARM and AARCH64 as well. Note that this requires llvm-ar and
the LLVMgold.so linker plugin.

In preparation of doing the same for GCC5, this toolchain version
also departs from the custom of using -O0 for DEBUG builds, which
makes them needlessly slow. Instead, let's add a NOOPT flavor as
well, and enable optimization for DEBUG like the other architectures
do. (Note that this will require some trivial changes to the platform
description files)

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-12-08 15:02:12 +00:00
Liming Gao 1d0d15522a BaseTools: Add VS2017 tool chain in BaseTools tools_def.template
VS2017 tool chain enables /WHOLEARCHIVE linker option
Split host-related and arch-related elements

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2017-11-29 16:03:11 +08:00
Ard Biesheuvel 14ca435fb6 BaseTools/tools_def AARCH64 ARM: suppres PIE sections via linker script
Recent distro builds of GCC 6 enable PIE linking by default, and allow
the previous behavior to be restored by passing the -no-pie command line
argument. Support for this was implemented by commits 1894a7c64c and
3380a59123 but unfortunately, it turns out that GCC 5 does not support
this command line argument, and exits with an error.

To avoid the need for yet another toolchain tag, to distinguish between
GCC 5 and GCC 6, let's use our GCC linker scripts when building objects
from .aslc files. This will ensure that the extra sections that are added
by the PIE linker are discarded from the ELF binary, and so they will not
corrupt the resulting .acpi file.

This reverts

1894a7c64c BaseTools/tools_def AARCH64 ARM: disable PIE linking
3380a59123 BaseTools/tools_def AARCH64 ARM: disable PIE linking for .aslc sources

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-11-23 10:44:53 +00:00
Ard Biesheuvel 3380a59123 BaseTools/tools_def AARCH64 ARM: disable PIE linking for .aslc sources
Commit 1894a7c64c ("BaseTools/tools_def AARCH64 ARM: disable PIE
linking") works around an issue that was caught due to the fact that
PIE linking produces broken .acpi files. However, v2 of that fix
inadvertently only applied the workaround to the normal linker command
line, and not to the ASLD one, so the issue still persists.

So add the missing -no-pie options for ASLD on ARM and AARCH64.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-11-01 15:18:10 +00:00
Ard Biesheuvel 8512fc5731 BaseTools/tools_def: suppress GCC predefined macros in DTB compilation
The standard GCC preprocessor we use to preprocess device tree source
files has a whole bunch of macros predefined, among which

  #define __linux 1
  #define __linux__ 1
  #define __gnu_linux__ 1
  #define linux 1

This causes a property like 'linux,code' to be converted into '1,code'
which is obviously wrong. So let's get rid of all the predefined macros
by passing -undef to the preprocessor command line.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-10-27 13:53:00 +01:00
Ard Biesheuvel 1894a7c64c BaseTools/tools_def AARCH64 ARM: disable PIE linking
Some prebuilt GCC toolchains targeting aarch64 (e.g., the Debian Stretch
one) will default to building PIE executables. This has been observed to
corrupt ACPI tables built from .aslc sources, so disable PIE linking
altogether when using the GCC toolchain to build for AARCH64 or ARM.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-10-27 13:49:40 +01:00
Ard Biesheuvel 424a5ec33b BaseTools/tools_def AARCH64: enable frame pointers for RELEASE builds
Commit 8f0b62a5da ("BaseTools/tools_def AARCH64: enable frame pointers
for DEBUG builds") removed the -fomit-frame-pointer switch from the CFLAGS
definitions that are shared between AARCH64 DEBUG and RELEASE builds, and
moved it to the RELEASE specific ones, so that DEBUG builds can produce a
backtrace when a crash occurs.

This is actually a useful thing to have for RELEASE builds as well. AArch64
has 30 general purpose registers, and so the performance hit of having a
frame pointer is unlikely to be noticeable, nor are the additional 8 bytes
of stack space likely to present a problem.

So remove -fomit-frame-pointer altogether this time.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-09-19 09:39:48 -07:00
Thomas Lamprecht 8b6366f875 BaseTools/GCC: set -Wno-unused-const-variable on RELEASE builds
TianoCore BZ#700 [1]

Set the '-Wno-unused-const-variables' in RELEASE builds with the
GGC49 and GCC5 toolchain.

This fixes the RELEASE build of OVMF with GCC in version 6 or newer.
GCC 6 added the '-Wunused-const-variable' warning, which gets
activated by '-Wunused-variable' and has the following behavior:
"Warn whenever a constant static variable is unused aside from its
declaration" [2]

Commit 2ad6ba80a1 introduced a case
where exactly this happens on a RELEASE build. All uses of the static
const variable are located in debug code only, which gets thrown out
by the compiler on RELEASE builds and thus triggers the
unused-const-variable warning.

There is currently no GCC 6 toolchain target defined and doing so
would add a lot of boilerplate code. Instead, use the fact that GCC
ignores unknown '-Wno-*' options:

"[...] if the -Wno- form is used [...] no diagnostic is produced for
-Wno-unknown-warning unless other diagnostics are being produced"

This behavior is available in GCC 4.9 [3] (and also earlier, for that
matter), so add the flag to the GCC49 and GCC5 toolchain, even if
both GCC versions do not supports it.
GCC49 doesn't enables LTO whereas GCC5 does. As GCC 6.0 through 6.2
had bugs relating to LTO there can be desire to use the GCC49 target
even if compiling with GCC 6, see 432f1d83f7.

Orient the changes on 20d00edf21 which moved the
'-Wno-unused-but-set-variable' flag to RELEASE builds only, as there
it ensure that it does not gets raised if the only usage of a
variable is in (then collapsed) debug code.

[1] https://bugzilla.tianocore.org/show_bug.cgi?id=700
[2] https://gcc.gnu.org/onlinedocs/gcc-6.4.0/gcc/Warning-Options.html#index-Wunused-const-variable
[3] https://gcc.gnu.org/onlinedocs/gcc-4.9.0/gcc/Warning-Options.html

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
[lersek@redhat.com: fix typo in subject]
2017-09-08 20:58:54 +02:00
Ard Biesheuvel f29ca8e8b9 BaseTools/Gcc ARM AARCH64: add support for building device tree binaries
While modern AARCH64 server systems use ACPI for describing the platform
topology to the OS, ARM systems and AARCH64 outside of the server space
mostly use device tree binaries, which are compiled from device tree
source files using the device tree compiler.

Currently, such source files and binaries may be kept in the EDK2 platform
trees, but are not integrated with the build, which means they need to be
kept in sync and recompiled manually, which is cumbersome.

So let's wire up BaseTools support for them: add tool definitions for the
DTC compiler and preprocessor flags that allow these source files to use
FixedPcd expressions and other macros defined by AutoGen.h

This way, a device tree binary can be built from source and emitted into
a FFS file automatically using something like:

  DeviceTree.inf:
    [Defines]
      INF_VERSION    = 0x00010019
      BASE_NAME      = SomePlatformDeviceTree
      FILE_GUID      = 25462CDA-221F-47DF-AC1D-259CFAA4E326 # gDtPlatformDefaultDtbFileGuid
      MODULE_TYPE    = USER_DEFINED
      VERSION_STRING = 1.0

    [Sources]
      SomePlatform.dts

    [Packages]
      MdePkg/MdePkg.dec

  SomePlatform.fdf:
    INF RuleOverride = DTB xxx/yyy/DeviceTree.inf

    [Rule.Common.USER_DEFINED.DTB]
      FILE FREEFORM = $(NAMED_GUID) {
        RAW BIN                |.dtb
      }

where it can be picked at runtime by the DTB loader that may refer to it
using gDtPlatformDefaultDtbFileGuid.

Note that this is very similar to how ACPI tables may be emitted into a
FFS file with a known GUID and picked up by AcpiTableDxe at runtime.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-08-31 08:59:00 +01:00
Liming Gao f3f0bd168f BaseTools: Enable --whole-archive in GCC tool chain as the default option
https://bugzilla.tianocore.org/show_bug.cgi?id=581

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2017-08-31 15:18:59 +08:00
Shi, Steven 47bfbd7f80 BaseTools/Conf: Support LLVM39 and LLVM40 in CLANG38 toolchain
https://bugzilla.tianocore.org/show_bug.cgi?id=676
Add LLVM39 and LLVM40 support in CLANG38 toolchain

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-08-29 09:30:33 +08:00
Liming Gao 578211b882 BaseTools: Support /WHOLEARCHIVE option in VS2015 tool chain
https://bugzilla.tianocore.org/show_bug.cgi?id=582

Don't enable this option in the default setting, because it may cause VS2015
linker crash. Platform can enable this option in PlatformPkg.dsc like below:
[BuildOptions]
*_*_*_DLINK2_FLAGS = /WHOLEARCHIVE

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2017-08-29 09:30:31 +08:00
Liming Gao 02739b0f41 BaseTools: Update tools_def to remove /Gw option in VS NOOPT target
To remove /Gw option is to disable size optimization.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2017-08-25 11:20:54 +08:00
Liming Gao 2f7f1e73c1 BaseTools: Add the missing -pie link option in GCC tool chain
https://bugzilla.tianocore.org/show_bug.cgi?id=671
GCC tool chain uses -fpie in CC_FLAGS. So, add -pie in DLINK_FLAGS.
More discussion in
https://lists.01.org/pipermail/edk2-devel/2017-August/013508.html

3.13 Options for Linking
========================
'-pie'
     Produce a position independent executable on targets that support
     it.  For predictable results, you must also specify the same set
     of options used for compilation ('-fpie', '-fPIE', or model
     suboptions) when you specify this linker option.

3.18 Options for Code Generation Conventions
============================================
'-fpie'
'-fPIE'
     These options are similar to '-fpic' and '-fPIC', but generated
     position independent code can be only linked into executables.
     Usually these options are used when '-pie' GCC option is used
     during linking.
     '-fpie' and '-fPIE' both define the macros '__pie__' and
     '__PIE__'. The macros have the value 1 for '-fpie' and 2 for
     '-fPIE'.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2017-08-25 11:19:56 +08:00
Chris Ruffin 8853c2afc5 BaseTools/Conf: apply nasmb, asm16 build rule order
Prioritize nasmb rule over asm16 where both source types are specified.

Change-Id: I33ec348dab66b313ddb05cb15f2d8407a648c320
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chris Ruffin <chris.ruffin@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-08-07 13:33:34 +08:00
Ard Biesheuvel 0df6c8c157 BaseTools/tools_def AARCH64: avoid SIMD registers in XIP code
XIP code may execute with the MMU off, in which case all memory accesses
should be strictly aligned to their size. Some versions of GCC violate
this restriction even when -mstrict-align is passed, when performing
loads and stores that involve SIMD registers. This is clearly a bug in
the compiler, but we can easily work around it by avoiding SIMD registers
altogether when building code that may execute in such a context. So add
-mgeneral-regs-only to the AARCH64 XIP CC flags.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-07-14 17:28:49 +01:00
Ard Biesheuvel 6d73863b54 BaseTools/tools_def AARCH64: mark register x18 as reserved
The AArch64 ABI classifies register x18 as a platform register, which
means it should not be used unless the code is guaranteed to run on a
platform that doesn't use it in such a capacity.

GCC does not honour this requirement by default, and so we need to tell
it not to touch it explicitly, by passing the -ffixed-x18 command line
option.

Link: https://bugzilla.tianocore.org/show_bug.cgi?id=625
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-07-14 17:28:49 +01:00
Liming Gao f7bd152c2a BaseTools: Update tools_def.template to remove old XCLANG and XCODE32
https://bugzilla.tianocore.org/show_bug.cgi?id=562
https://bugzilla.tianocore.org/show_bug.cgi?id=563

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2017-07-05 13:22:46 +08:00
Yonghong Zhu 75f0094ef7 BaseTools: add /Gw to CC_FLAGS for VS2013 and higher tool chain tags
The /Gw flag does a better job at size optimization than use of the
GLOBAL_REMOVE_IF_UNREFERENCED macro that is currently used for VS20xx
tool chains to remove unreferenced global variables.
This patch add /Gw to CC_FLAGS for VS2013 and higher tool chain tags.

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2017-06-23 12:24:49 +08:00
Ard Biesheuvel 9ba8baae15 BaseTools/tools_def: AARCH64: disable LTO type mismatch warnings
On AARCH64, any code that may execute with the MMU off needs to be built
with -mstrict-align, given that unaligned accesses are not allowed unless
the MMU is enabled. This does not only affect SEC and PEI modules, but
also static libraries of the BASE type, which may be linked into such
modules, as well as into modules of other types. As it turns out, the
presence of -mstrict-align is reflected in the internal representations
of the types defined in those libraries.

When -fstrict-aliasing is passed to GCC, it assumes that pointers to
objects of different types cannot refer to the same memory location, and
attempts to exploit this fact when optimizing the code. Since such
assumptions are only valid under very strict conditions which are not
guaranteed to be met in EDK2, we disable this optimization by passing
-fno-strict-aliasing by default. [*]

When LTO is in effect, this applies equally to the code generation that
may occur at link time, which is why the linker warns about unexpected
differences in type definitions between the intermediate representations
that are present in the object files being linked. This may result in
warnings such as the one below, even if -fno-strict-aliasing is used:

  MdePkg/Include/Library/BaseLib.h:1712:1:
  warning: type of 'StrToGuid' does not match original declaration
  [-Wlto-type-mismatch]
   StrToGuid (
   ^
  MdePkg/Library/BaseLib/SafeString.c:1506:1:
  note: 'StrToGuid' was previously declared here
   StrToGuid (
   ^
  MdePkg/Library/BaseLib/SafeString.c:1506:1:
  note: code may be misoptimized unless -fno-strict-aliasing is used

This warning is inadvertently triggered when linking BASE libraries built
with -mstrict-align into modules of types other than SEC or PEI, since the
types are subtly different, even though the use of code that maintains
strict alignment in a module that does not care about this is unlikely to
cause problems. And even if it did, it would still only affect code built
with -fstrict-aliasing enabled, which we disable unconditionally. So let's
just silence the warning by passing -Wno-lto-type-mismatch.

[*] Leif adds: "-fstrict-aliasing is GCC default, because it is a
    restriction in the C language. Because it's a bit non-obvious, things
    can go hilariously wrong in very non-obvious ways, and the potential
    optimization gains are unlikely to be generally relevant,
    -fno-strict-aliasing is a sensible thing to always have set (like we
    do)."

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-06-22 11:07:02 +00:00
Ard Biesheuvel fa6080138c BaseTools/tools_def GCC: ARM/AARCH64: drop -save-temps from command line
For historical reasons, GCC builds for ARM and AARCH64 pass the
-save-temps command line option to GCC, which instructs the compiler
to preserve intermediate files, i.e., preprocessor output and generated
assembler. Given that this clutters up the Build directory, and slows
down the build, let's remove it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-06-22 11:06:49 +00:00
dann frazier a6b5380642 BaseTools/GCC ARM/AARCH64: Force disable PIE
After Debian's toolchain switched to PIE by default, our edk2 builds began
to fail to build (GCC49 w/ gcc 6.3). This patch fixes the build by forcing
off PIE for both ARM and AARCH64 builds.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: dann frazier <dannf@debian.org>

Add -fno-pic as well for ARM.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-06-01 08:30:23 +00:00
Michael Kinney 3e1d93c32e BaseTools: Clean up tools_def.template for XCODE5
Reorganize the statements for XCODE5 to match other tool
chains and remove dependency on XCLANG and XCODE32

Cc: Andrew Fish <afish@apple.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2017-05-19 15:05:33 -07:00
Michael Kinney bdaced0bcf BaseTools: Add -D NO_MSABI_VARGS to X64 XCODE5 CC_FLAGS
https://bugzilla.tianocore.org/show_bug.cgi?id=561

Update BaseTools/Conf/tools_def.template to add the define

-D NO_MSABI_VAARGS

To CC_FLAGS for X64 XCODE5 builds.

The llvm/clang compiler used in XCODE5 builds supports the
_ms_ versions of the vararg builtins, but the compiler
generates build errors.

The recommendation from the XCODE5 experts is to never use
the _ms_ version of the vararg builtins.  The define
NO_MSABI_VARARGS is already supported in MdePkg/Include/Base.h
and forces the use the standard vararg builtins.

Cc: Andrew Fish <afish@apple.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2017-05-19 15:05:25 -07:00
Liming Gao ab200776cd BaseTools: Add option in CLANG38 to disable warning unknown-warning-option
https://bugzilla.tianocore.org/show_bug.cgi?id=466

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2017-04-11 14:21:34 +08:00
Liming Gao 90defe7198 BaseTools: Update tools_def.template to add -fno-builtin in GCC tool chain
Now, -fno-builtin option is added for the specific GCC tool chain.
It is a generic option. It can be moved to common GCC option to keep
the consistent compiler option.

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Suggested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
2017-04-06 16:03:33 +08:00
Ard Biesheuvel c2d56a894b BaseTools/GCC AARCH64: force disable PIC code generation
As a security measure, some distro toolchains now default to PIC code
generation, allowing executables (as opposed to shared libraries) using
the objects to be built as PIE binaries, which can be loaded at a random
virtual offset.

However, our ELF to PE/COFF generation code does not deal with the
resulting relocation types (i.e., GOT based), and so the use of PIC code
leads to GenFw errors.

Given that
a) our non-PIC PE/COFF executables are already relocatable,
b) PIC code leads to all symbol references to be indirected via GOT
   entries containing absolute addresses, each requiring an entry in the
   relocation table,
c) the AArch64 ISA makes it perfectly feasible to built PIE executables
   from non-PIC code,

there is absolutely no upside to using PIC code for building EDK2 modules,
and so we're better off simply disabling it unconditionally.

Note that when running under the OS, the GOT has an additional advantage,
i.e., that all .text/.rodata pages remain clean and so can be shared between
processes. This does not apply to the UEFI environment, however.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2017-03-31 10:34:34 +01:00
Song, BinX 87d97b6a77 BaseTools: Add Brotli algorithm tool
- Add Brotli algorithm tool support

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Bell Song <binx.song@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-03-29 12:14:43 +08:00
Marvin Haeuser b88aa9c3d3 BaseTools/tools_def: Use armv7-a for CLANG35 ARM compilations.
Define "-march=armv7-a" - which is used by the GCC toolchains - for
ARM CLAMNG35 builds to fix compilation of the MemoryFence ASM.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Marvin Haeuser <Marvin.Haeuser@outlook.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2017-03-22 12:54:49 +08:00
Liming Gao 296153c5bf BaseTools: Add NOOPT target in CLANG38 tool chain
https://bugzilla.tianocore.org/show_bug.cgi?id=310

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2017-02-13 15:25:25 +08:00
Liming Gao 86a1eca210 BaseTools tools_def.txt: Include AutoGen.h in GCC ASLPP_FLAGS
https://bugzilla.tianocore.org/show_bug.cgi?id=227
Refer to VS ASLPP_FLAGS, force include AutoGen.h so that ASL code
can use FixedPcdGetXX to get FixedPcd value.

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2016-11-16 09:50:11 +08:00
Liming Gao 8ccd619c74 BaseTools tools_def.txt: Remove -P option in GCC ASLPP_FLAGS
https://bugzilla.tianocore.org/show_bug.cgi?id=227

After -P option is removed, the generated preprocessed ASL file will have
line markers. The extra information can be removed by Trim script. ASL code
can refer to the definition in C source file. This has been supported in
VS and XCODE tool chains.

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2016-11-16 09:50:07 +08:00
Yonghong Zhu 90a4021967 BaseTools:introduce PREFIX env for VS tool path
This patch introduce PREFIX env for VS tool path for tools_def.template
file.

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-11-02 10:00:31 +08:00
Yonghong Zhu 4b8234d054 BaseTools: support the NOOPT target with the GCC tool chains
Update the tools_def.template to add NOOPT support with GCC tool chains.
Also disable -flto and -Os in NOOPT target for GCC5.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Bruce Cran <bruce.cran@sandisk.com>
2016-10-12 07:17:00 +08:00
Yonghong Zhu 333ba578fe BaseTools: support generating image package from BMP/JPEG/PNG files
BaseTools add support to generating image package from BMP/JPEG/PNG
files.
1) New file type *.idf Image definition file to describe HII image
resource. It is the ASCII text file, and includes one or more "#image
IMAGE_ID [TRANSPARENT] ImageFileName".
2) New IMAGE_TOKEN macro is used to refer to IMAGE_ID.
3) New AutoGen header file $(MODULE_NAME)ImgDefs.h to include the
generated ImageId definition.
4) New $(MODULE_NAME)Idf.hpk or $(MODULE_NAME)Images are generated
as the output binary HII image package.

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-09-27 09:43:28 +08:00
Ard Biesheuvel 8f0b62a5da BaseTools/tools_def AARCH64: enable frame pointers for DEBUG builds
Enable frame pointers on DEBUG builds so we can support backtraces in
crash dumps.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-09-07 17:22:27 +01:00
Yonghong Zhu cd1c960469 BaseTools: Add the PKCS7 tool
Provide the PKCS7 Tool to support the CertType - EFI_CERT_TYPE_PKCS7_GUID,
then user can use this tool to add EFI_FIRMWARE_IMAGE_AUTHENTICATION
for a binary.

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-19 15:33:25 +08:00
Shi, Steven 6d732bbbc2 BaseTools-CLANG38: Add -O3 in DLINK2 flag
CLANG38 build fail after CC_FLAG is added in the link rule.
This failure is because the CLANG38 enable the LTO through LLVMgold.so
linker plugin, but the LLVMgold.so plugin cannot accept the clang -Oz
CC flag as build option. After CC_FLAG is added in the link rule,
the LLVMgold.so plugin reports linking error. LLVMgold.so only accept
-O0 ~ -O3, and you can see it in the LLVM gold plugin source code
in below:

http://llvm.org/svn/llvm-project/llvm/tags/RELEASE_380/final/tools/gold/
gold-plugin.cpp line173:

if (opt[1] < '0' || opt[1] > '3')
   message(LDPL_FATAL, "Optimization level must be between 0 and 3");

Add -O3 in the *_CLANG38_*_DLINK2_FLAGS to override the -Oz flag in
*_CLANG38_*_CC_FLAGS to pass LLVMgold.so linking.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-19 12:58:37 +08:00
Ard Biesheuvel d977ba4406 BaseTools RVCT: ignore various RVC diagnostics
This updates the RVCT CC flags so various diagnostics that trigger
warnings-as-errors are silenced. In particular, RVCT complains about
missing newlines at the end of source files, mixing of enums and int
values and return statements followed by a break, all of which occur
in the Tianocore codebase, but none of which are actual errors in the
code. So just silence them.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-12 09:04:13 +02:00
Ard Biesheuvel ff59570f41 BaseTools ARM AARCH64: drop redundant compiler arguments
The ARM and AARCH64 CC_FLAGS definitions include both GCC_ALL_CC_FLAGS
and GCC44_ALL_CC_FLAGS, resulting in many of the compiler arguments
being passed twice. Since the CLANG35 definitions do not refer to
GCC44_ALL_CC_FLAGS, drop the reference for GCCx as well.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-12 09:02:20 +02:00
Ard Biesheuvel 6f8ecc41d7 BaseTools ARM AARCH64: pass CC flags to linker for XIP modules as well
Commit 478f50990a ("BaseTools GCC: add the compiler flags to the linker
command line") added the compiler flags to the linker command line,
which is required for LTO to function correctly, since it involves code
generation at link time.

This patch failed to update the build rules for XIP modules on AARCH64,
which not only requires the ordinary CC flags but also the XIP CC flags
to prevent the LTO backend to, e.g., emit code that does not adhere to
the strict alignment rules we impose for code that may execute with the
MMU off.

So update the XIP link rules as well. Since AARCH64 and ARM are not
supported by any toolchains in the GCCLD build rule family, drop the
reference to GCCLD while we're at it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-12 09:01:58 +02:00
Shi, Steven 6f756db5ea BaseTools-Conf:Introduce CLANG38 new toolchain for x86
This adds support for LLVM 3.8.x in LTO mode for IA32 and X64.
CLANG38 enable LLVM Link Time Optimization (LTO) and code size
optimization flag (-Oz) by default for aggressive code size
improvement. CLANG38 X64 code is small code model + PIE.

CLANG LTO needs PIE in link flags to generate PIE code correctly,
otherwise the PIE is not really enabled. (e.g. OvmfPkgX64 will
hang in 64bits SEC at high address because of small model code
displacement overflow).

Test pass platforms: OVMF (OvmfPkgIa32.dsc, OvmfPkgX64.dsc and
OvmfPkgIa32X64.dsc).
Test compiler and linker version: LLVM 3.8, GNU ld 2.26.

Example steps to use the CLANG38 tool chain to build OVMF platform:
1. Download and extract the llvm 3.8.0 Pre-Built Binaries from
http://www.llvm.org/releases/ (e.g. http://www.llvm.org/releases/
3.8.0/clang+llvm-3.8.0-x86_64-linux-gnu-ubuntu-16.04.tar.xz and
extract it as ~/clang38).
2. Copy LLVMgold.so from https://github.com/shijunjing/edk2/blob/
llvm/BaseTools/Bin/LLVMgold.so to above clang lib folder (e.g.
~/clang38/lib/LLVMgold.so)
3. Install new version linker with plugin support (e.g. ld 2.26 in
GNU Binutils 2.26 or Ubuntu16.04)
$ cd edk2
$ git checkout llvm
$ export CLANG38_BIN=path/to/your/clang38/
(e.g. export CLANG38_BIN=~/clang38/bin/)
$ source edksetup.sh
$ make -C BaseTools/Source/C
$ build -t CLANG38 -a X64 -p OvmfPkg/OvmfPkgX64.dsc -n 5 -b DEBUG
-DDEBUG_ON_SERIAL_PORT
$ cd edk2/Build/OvmfX64/DEBUG_CLANG38/FV
$ qemu-system-x86_64.exe -bios OVMF.fd -serial file:serial.log -m 4096
 -hda fat:.

If you want, you can build and install GNU Binutils 2.26 as below steps
in Ubuntu:
Download binutils-2.26 source code from http://ftp.gnu.org/gnu/binutils/
 and extract it to ~/binutils-2.26
$sudo apt-get install bison
$sudo apt-get install flex
Install other necessary binutils build tools if missing
$ mkdir build
$ cd build
$ ../binutils-2.26/configure --enable-gold --enable-plugins
--disable-werror --prefix=/usr
$ make -j 5
$ sudo make install

If you want, you can build LLVMgold.so as below steps
Download llvm-3.8.0 source code from http://www.llvm.org/releases/
3.8.0/llvm-3.8.0.src.tar.xz and extract it to ~/llvm-3.8.0.src
Download clang3.8.0 source code from http://www.llvm.org/releases/
3.8.0/cfe-3.8.0.src.tar.xz and extract it to ~/llvm-3.8.0.src/tools/clang
Refer http://clang.llvm.org/get_started.html to Install other necessary
clang build tools if missing
$ mkdir llvm38build
$ cd llvm38build
If your GNU Binutils 2.26 is in /home/jshi19/binutils-2.26,
$ cmake ../llvm-3.8.0.src -G "Unix Makefiles" -DCMAKE_BUILD_TYPE="Release"
-DLLVM_TARGETS_TO_BUILD="X86" -DCMAKE_VERBOSE_MAKEFILE=ON
-DCMAKE_CXX_COMPILER="/usr/bin/g++" -DCMAKE_C_COMPILER="/usr/bin/gcc"
-DLLVM_BINUTILS_INCDIR=/home/jshi19/binutils-2.26/include
$ make -j 5 LLVMgold The LLVMgold.so is in ~/llvm38build/lib/LLVMgold.so

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-10 12:56:34 +08:00
Shi, Steven b5e006edb9 BaseTools-Conf:Remove short dash in ar flag for LLVM
Both binutils ar and LLVM ar support "cr", but LLVM ar doens't
support add "-" in the flags, and llvm-ar cannot accept "-cr".
So remove the short dash "-" to make llvm archives work.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2016-08-10 12:56:27 +08:00
Ard Biesheuvel 0f73cca02b BaseTools ARM: impose strict alignment only for XIP modules
Given that we only support ARMv7 and up in Tianocore (due to the fact
that the PI spec mandates that the PEI services table pointer be stored
in the TPIDRURW register, which is not available on earlier CPUs), we can
assume that any code executing with the MMU on may perform unaligned
accesses (since the AArch32 bindings in the UEFI spec stipulate that
unaligned accesses should be allowed if supported by the CPU)

So relax the alignment restrictions to XIP modules only, i.e., BASE, SEC,
PEI_CORE and PEIM type modules, exactly like we do for AARCH64 already.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-09 09:50:05 +02:00
Ard Biesheuvel 3cdbd7528b BaseTools CLANG35: add missing XIP flags for AARCH64
When building for AARCH64, code that may execute with the MMU off should
not perform unaligned accesses, which is why we set -mstrict-align for
BASE, SEC, PEI_CORE and PEIM modules when building with GCCx. However,
this setting is missing from CLANG35 so set it there as well.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-09 09:49:57 +02:00
Ard Biesheuvel 0667e98527 BaseTools GCC/ARM: add -fno-builtin to CC flags
Avoid build errors when including OpensslLib, which may throw
undefined reference errors for builtin functions if -fno-builtin
is not specified (and it is already set for IA32, X64 and AARCH64)
So set it for ARM as well.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-05 16:32:36 +02:00
Ard Biesheuvel 478f50990a BaseTools GCC: add the compiler flags to the linker command line
Now that we invoke GCC as the linker for the GCC toolchain family,
we can pass the CC flags to the linker as well. This is only
required for LTO (which may involve code generation during the link
stage), but does not interfere with non-LTO builds.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-03 17:41:59 +02:00
Ard Biesheuvel f8d0b96629 BaseTools GCC5: disable warnings-as-errors for now
GCC5 runs in LTO mode, which means it may generate code from an
intermediate representation during the link stage, at which time
additional diagnostics are run that may emit warnings.

Some of these warnings seem to be spurious, e.g., the following
warning which is emitted when building OVMF for IA32 or ArmVirtQemu
for ARM (but not for X64 resp. AARCH64)

  .../MdeModulePkg/Library/UefiHiiLib/HiiLib.c:
                 In function 'HiiCreateGuidOpCode.constprop':
  .../MdeModulePkg/Library/UefiHiiLib/HiiLib.c:3228:10:
                 error: function may return address of local variable
                                            [-Werror=return-local-addr]
     return (UINT8 *)OpCodePointer;
            ^
  .../MdeModulePkg/Library/UefiHiiLib/HiiLib.c:3208:17: note: declared here
     EFI_IFR_GUID  OpCode;
                   ^
  lto1: all warnings being treated as errors
  lto-wrapper: fatal error: gcc returned 1 exit status

So before adding the contents of CC_FLAGS to the linker command line,
defuse the default '-Werror' by adding '-Wno-error' to DLINK2_FLAGS
for GCC5.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-03 17:41:54 +02:00
Ard Biesheuvel 108c5b6018 BaseTools GCC: move -c compiler flag to build rules
In order to be able to share the compiler flags with the linker (which
is required for LTO since it involves the linker doing code generation
based on the LTO bytecode), move the -c GCC argument to the build rules,
and drop it from the GCC CC_FLAGS definitions in tools_def.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-03 17:41:41 +02:00
Ard Biesheuvel b89919ee8f BaseTools AARCH64: override XIP module linker alignment to 32 bytes
Now that GenFw converts small code model ADRP instructions to ADR on
the fly, we can reduce the alignment for XIP modules, where large
alignment values may cause considerable waste of flash space due to
excessive padding. This limits the module size to 1 MB, but this is
not a concern in practice.

So set the XIP section alignment to 0x20 for DEBUG_GCC49, DEBUG_GCC5
and *_CLANG35, all of which use the small code model.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-08-02 10:58:25 +02:00
Ard Biesheuvel 4a8466d4ba BaseTools GCC: introduce GCC5 toolchain to support GCC v5.x in LTO mode
This adds support for GCC 5.x in LTO mode for IA32, X64, ARM and
AARCH64. Due to the fact that the GCC project switched to a new
numbering scheme where the first digit is now incremented for every
major release, the new toolchain is simply called 'GCC5', and is
intended to support all GCC v5.x releases.

Since IA32 and X64 enable compiler optimizations (-Os) for both DEBUG
and RELEASE builds, LTO support is equally enabled for both targets.
On ARM and AARCH64, DEBUG builds are not optimized, and so the LTO
optimizations are only enabled for RELEASE.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-02 10:54:11 +02:00
Ard Biesheuvel a1b8baccc3 BaseTools GCC: use 'gcc' as the linker command for GCC44 and later
To accommodate upcoming GCCx toolchain versions that require 'gcc' to
be used as the linker in order to support LTO, switch GCC44 and later
(including CLANG35) to a new DLINK build rule that invokes 'gcc' as the
linker instead of 'ld'. Since gcc expects its command line arguments in
a different format, and expects arguments that it needs to pass to the
linker to be prefixed with '-Wl,', this involves changes to most of the
DLINK_FLAGS definitions in tools_def.template, as well as some changes to
module .INF files that set their own linker options.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-02 08:40:43 +02:00
Ard Biesheuvel befb3ba515 BaseTools UNIXGCC ELFGCC CYGGCC: clone GCC build rule family into GCCLD
Before we can make non-backward compatible changes to the GCC build rules
regarding the use of the 'gcc' binary as the linker, clone the existing
GCC build rules into a 'GCCLD' build rule family, and move the legacy
toolchains UNIXGCC, CYGGCC, CYGGCCxASL and ELFGCC over to it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-02 08:40:31 +02:00
Ard Biesheuvel 1c63516075 BaseTools CLANG35: drop problematic use-movt and save-temps options
Some versions of Clang fail on every input file when using the
-save-temps options, and produces the following heplful error message:

  <unknown>:0: error: Undefined temporary symbol

Simply dropping the option for CLANG35 is the simplest way around this,
since the value of storing .i and .s files is dubious anyway.

Also, drop the arm-use-movt option, which does not appear to be
supported anymore by recent versions of clang.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
2016-08-02 08:21:46 +02:00
Ard Biesheuvel f49513f666 BaseTools/tools_def: switch GCC/X64 to the PIE small model
The ordinary small code model for x86_64 cannot be used in UEFI, since
it assumes the executable is loaded in the first 2 GB of memory.
Therefore, we use the large model instead, which can execute anywhere,
but uses absolute 64-bit wide quantities for all symbol references,
which is costly in terms of code size.

So switch to the PIE small code model, this uses 32-bit relative
references where possible, but does not make any assumptions about the
load address (i.e., all absolute symbol references are 64-bits wide).
Note that, due to the 'protected' visibility pragma introduced in an
earlier patch, there is no need for the EDK2 build system to deal with
GOT related ELF relocation types.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-By: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-07-21 13:32:09 +02:00
Ard Biesheuvel 247093f45d BaseTools/tools_def: enable Os optimization for GCC X64 builds
Now that we switched to the __builtin_ms_va_list VA_LIST type for
GCC/X64, we can trust the compiler to do the right thing even under
optimization, and so we can enable -Os optimization all the way back
to GCC44, and drop the -D define that prevents the use of the __builtin
VA_LIST types. Note that this requires the -maccumulate-outgoing-args
switch as well.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-By: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-07-21 13:32:09 +02:00
Laszlo Ersek 9c4dbdff1d BaseTools/tools_def.template: bump minimum required NASM versions
NASM had been unable to assemble segment register operations before the
following git commit:

  http://repo.or.cz/nasm.git/commitdiff/21d4ccc3c338

That commit was first released in NASM 2.10:

  http://repo.or.cz/nasm.git/commitdiff/ff62f33da0a2

This makes NASM 2.07 unusable for edk2 in general, because now we have a
lot of X64 assembly code that works with segment registers. For example
in:

  UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm

Bump the minimum required version to 2.10, for use with GCC toolchains.

Furthermore, list NASM 2.12.01 as a requirement for all other toolchains.
In particular, for source level debugging, VS20xx requires CodeView 8
debug symbols, and only NASM 2.12.01 and later produce those. (Suggested
by Liming, Mike, and Andrew.)

Cc: Andrew Fish <afish@apple.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: http://thread.gmane.org/gmane.comp.bios.edk2.devel/14612
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-07-18 19:22:58 +02:00
Leif Lindholm 3f7f287178 BaseTools: use unsigned chars on ARM architectures
By default, the ARM architectures have unsigned chars, whereas the other
architectures supported by EDK2 by default have signed chars.
However, EDK2 uses -funsigned-chars on those architectures to change the
default behaviour.

Unfortunately, the ARM architectures explicitly break their default
behaviour by specifying -fsigned-chars (I presume in a pre-emptive
attempt at avoiding incompatibility).

Since this situation is already confusing enough, switch the ARM
architectures to also specify -funsigned-chars explicitly rather than
just dropping the current parameter.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-04-12 13:19:38 +08:00
Cinnamon Shia 716132efb1 BaseTools: Remove /Oi from Visual Studio tool chains.
Remove /Oi from Visual Studio tool chains. because of the following reasons:
1. Intrinsic is Compiler-dependent.
2. Adding /Oi (Generate Intrinsic Functions) doesn't promise 100% replacing
   the function call with inline functions.
   /Oi is only a request, but doesn't force, the compilers to use the intrinsic.
   The visual studio optimizer can still use the library version.
3. Since EDK2 doesn't include Visual Studio header files, intrinsic function
   should not be used.

Built Nt32Pkg, OvmfPkg, ShellPkg, MdeModulePkg and CryptoPkg successfully.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Cinnamon Shia <cinnamon.shia@hpe.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Qin Long <qin.long@intel.com>
2016-04-08 11:23:27 +08:00
Ard Biesheuvel f37d891c1b BaseTools AARCH64: move DEBUG GCC49 to the small code model
When building AARCH64 platforms that include a Shell binary built from
source, we run into trouble when using the tiny code model for DEBUG
builds. The reason is that the Shell binary built in DEBUG mode exceeds
the 1 MB range of the ADR instruction, so anything that gets pulled into
the final link of the Shell binary either needs to be built with the small
or large model, or needs to be sorted in some way to put the ADR references
close to their targets.

Since code size is not a big concern for DEBUG builds anyway, let's move
to the small code model for all modules when using DEBUG GCC49. This way,
there is no need for workarounds that are specific to UEFI_APPLICATION
modules in general, or the Shell application in particular.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-03-25 12:37:47 +01:00
Ard Biesheuvel 20d00edf21 BaseTools/GCC: set -Wno-unused-but-set-variables only on RELEASE builds
This aligns the GCC definitions for 4.6 and up to align with the ARM and
AARCH64 definitions, which is to ignore unused but set variables only on
RELEASE builds. This allows us to find instances of unused variables that
are left behind after refactoring. It also allows us to find bad new code,
which, due to the EDK2 coding style which disallows initialized automatic
variables, may contain such variables without having been noticed by other
toolchains.

(Slightly edited) observation from Jordan Justen
<jordan.l.justen@intel.com>: RELEASE builds must keep the flag because
debug code (such as assertions) may collapse to nothing -- e.g. if a
platform defines MDEPKG_NDEBUG for RELEASE -- and therefore trigger the
warning.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
[lersek@redhat.com: incorporate commit message update from Jordan]
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
2016-03-25 10:53:02 +01:00
Michael Kinney c261c27dce BaseTools/tools_def.txt: Add -march=i586 for IA32 GCC targets
Newer GCC compilers use a default of march higher than i586
for -m32 (IA32 configuration) and this is causing generation of
instructions that are not compatible with all IA32 targets.
Specically Galileo platform support in the QuarkPlatformPkg does
not boot if GCC48 or higher is used.

This is similar to the following checkin that was done to address
this same issue for VS2012 and higher tool chains:

SHA-1: 71028ba2c4

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leroy Leahy <leroy.p.leahy@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-02-24 20:28:07 -08:00
Larry Hauch cbf14fa084 BaseTools/Conf/XMLSchema: Reformat XML using Visual Studio 2013
There are no functional changes in this patch.
The only change is to the XML format, updated using Visual Studio
Edit->Advanced->Format Document.

Different XML Schema editors use different formats for indentation and
line breaks. Visual Studio 2013 uses a two space indentation for content.

Cc: Zhu Yonghong <yonghong.zhu@intel.com>

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Larry Hauch <larry.hauch@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2016-02-19 09:44:32 +08:00
Ard Biesheuvel d764d59849 BaseTools AARCH64: build XIP modules with strict alignment
GCC for AARCH64 recognizes byte swapping load and store sequences
and may replace them with wider loads or stores combined with rev
instructions. In some cases (i.e., with GCC version 5 and later)
this may result in unaligned accesses, which are not allowed before
we turn the MMU on.

So build any modules or static libraries that may execute with the MMU
off with -mstrict-align. Other modules don't need this switch, so we
can remove it from the CLANG35/AARCH64 common CC flags.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19638 6f19259b-4bc3-4df7-8a09-765794883524
2016-01-11 08:50:49 +00:00
Ard Biesheuvel 3a02a87f9f BaseTools AARCH64: add separate GCC build rule for XIP objects
This introduces a special .c to .obj build rule for GCC/AARCH64 that
takes into account additional compiler flags that have been specified
via *_*_*_CC_XIPFLAGS. These will be passed after (and in addition to)
the ordinary CC_FLAGS.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19637 6f19259b-4bc3-4df7-8a09-765794883524
2016-01-11 08:50:39 +00:00
Ard Biesheuvel c2a892d7c8 BaseTools CLANG35: use -target in PP flags as well
The Clang preprocessor may rely on builtin defines that are target
dependent, so we should add the -target argument also when invoking
the preprocessor directly.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19584 6f19259b-4bc3-4df7-8a09-765794883524
2016-01-04 09:31:42 +00:00
Ard Biesheuvel d4dcd5542a BaseTools CLANG35: use linux-gnu target triplets explicitly
Since we are combining Clang with the GNU linker, make that explicit in
the target triplet. This affects certain builtin defines and other compiler
behavior that may be unspecified otherwise.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19583 6f19259b-4bc3-4df7-8a09-765794883524
2016-01-04 09:31:33 +00:00
Ard Biesheuvel b9f7890c47 BaseTools ARM: add CLANG35 support
This extends the existing CLANG35 toolchain definition with support for
building for the ARM architecture. In order to be able to reuse the existing
ARM GCC definitions as much as possible, the following changes have been
made to the existing ARM GCC support:
- the -mapcs option has been removed; it is a no-op under Thumb (our default)
  and we use AAPCS (-mabi=aapcs) anyway
- the -mword-relocations option has been moved from GCC_ARM_CC_FLAGS to
  the GCC4x specific option: CLANG does not support it, and uses '-mllvm
  -marm-use-movt=0' instead.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19284 6f19259b-4bc3-4df7-8a09-765794883524
2015-12-15 15:02:24 +00:00
Ard Biesheuvel b12ef6b964 BaseTools RVCT: use scatter file to enforce minimum section alignment
Up until SVN r18540, GenFw created invalid PE/COFF binaries for the ARM
architecture, by allowing PE/COFF .data sections to appear at offsets
that were not aligned to the global PE/COFF section alignment. The
reason for this was that the relocation metadata emitted by RVCT's
armlink only contains dynamic absolute relocations, so it is impossible
to recalculate relative relocations between .text and .data, and so the
relative offset between the two needs to be preserved.

Since r18540, we do align .data to the PE/COFF section alignment,
resulting in potentially corrupt PE/COFF binaries unless .data happens
to appear at a 32-byte aligned offset. So let's introduce a RVCT scatter
file that sets this alignment for the ELF .data section (and subsequent
.bss section).

At the same time, set the start offset to 0x220 bytes (which is the size
of our 32-bit PE/COFF header) so that the memory layouts are identical
between ELF and PE/COFF. Also add a 4 KB aligned version that can be
used to build DXE_RUNTIME_DRIVER modules with runtime memory protection
enabled.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19235 6f19259b-4bc3-4df7-8a09-765794883524
2015-12-14 07:55:46 +00:00
Ard Biesheuvel 214a3b7941 BaseTools GCC: avoid the use of COMMON symbols
The default behavior of the GCC compiler is to emit uninitialized globals
with external linkage into a COMMON section, where duplicate definitions
are merged. This may result in unexpected behavior, since global variables
defined under the same name in different C files may not refer to the same
logical data item.

For instance, the definitions of EFI_EVENT mVirtualAddressChangeEvent that
[used to] appear in the following files:

  CryptoPkg/Library/BaseCryptLib/SysCall/RuntimeMemAllocation.c
  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableDxe.c

will be folded into a single instance of the variable when the latter
module includes the former library, which can lead to unexpected results.

Even if some may argue that there are legal uses for COMMON allocation, the
high modularity of EDK2 combined with the low level of awareness of the
intracicies surrounding common allocation and the generally poor EDK2
developer discipline regarding the use of the STATIC keyword* make a strong
case for disabling it by default, and re-enabling it explicitly for packages
that depend on it.

So prevent GCC from emitting variables into the COMMON section, by passing
-fno-common to the compiler, and discarding the section in the GNU ld linker
script.

* Any function or variable that is only referenced from the translation unit
  that defines it could be made STATIC. This does not only prevent issues
  like the above, it also allows the compiler to generate better code, e.g.,
  drop out of line function definitions after inlining all invocations or
  perform constant propagation on variables.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19164 6f19259b-4bc3-4df7-8a09-765794883524
2015-12-08 07:40:12 +00:00
Wang Yu 5d9cd24ede BaseTools: Add VS2015 tool chain in tools_def.template
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Wang Yu <yu.wang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19101 6f19259b-4bc3-4df7-8a09-765794883524
2015-12-03 03:19:01 +00:00
Eugene Cohen 8e18fbd70d BaseTools RVCT: add preprocessor preinclude for AutoGen.h
Ensure that AutoGen.h is force-included when the RVCT preprocessor
is invoked.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19097 6f19259b-4bc3-4df7-8a09-765794883524
2015-12-02 16:11:33 +00:00
Ard Biesheuvel 67b3c0f958 BaseTools GCC: move PECOFF_HEADER_SIZE definition before LD script
Older versions of binutils need all symbols to be defined when consuming
the linker script passed via the command line. So move the definition
'--defsym=PECOFF_HEADER_SIZE=...' before the '--script=...' command line
argument.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18747 6f19259b-4bc3-4df7-8a09-765794883524
2015-11-09 08:39:28 +00:00
Ard Biesheuvel 63e1c23b22 BaseTools/AARCH64: use large code model for GCC <= 4.8
As it turns out, upstream GCC only supports the AArch64 'tiny' code
model as of version 4.9. Since the default 'small' code model requires
4 KB section alignment (which is undesirable for the XIP modules),
revert GCC 4.7 and 4.8 to using the 'large' code model instead.

Reported-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18569 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-02 14:48:30 +00:00
Ard Biesheuvel 64a63d6942 BaseTools/ARM: move to unified GCC linker script
Instead of using the ARM builtin linker script for GNU ld, use the
new unified one instead. This will allow us to increase the section
alignment for DXE_RUNTIME_MODULEs, which is a prerequisite for
enabling the UEFIv2.5 Properties Table memory protection feature.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Michael Zimmermann <sigmaepsilon92@gmail.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18565 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-01 14:01:07 +00:00
Ard Biesheuvel 0bd0d6dff6 BaseTools/GenFw: disable RVCT linker size optimization
Disable the RVCT size optimization that may put sections at an offset
that is not aligned to their own alignment, by adding the --no_legacyalign
switch to the RVCT linker command line. This is necessary since such sections
cannot be correctly converted into PE/COFF sections without padding them at
the front, which defeats the purpose of the optimization anyway.

With the optimization gone, we can also remove the special case for ARM in
GenFw that could result in corrupt PE/COFF images to be emitted. Instead,
sections whose base address is not aligned correctly are outright rejected.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18540 6f19259b-4bc3-4df7-8a09-765794883524
2015-09-24 19:35:16 +00:00
Ard Biesheuvel 06cd723125 BaseTools AARCH64: use tiny code model by default
The AARCH64 tiny code model produces more efficient code, since it
uses relative symbol references rather than absolute references, i.e.,
an emitted relative reference refers to the symbol directly rather
than a literal containing its 64-bit absolute address. This saves
space in the binary, and reduces the number of relocation fixups that
need to be applied by the PE/COFF loader.

So now that we support relative relocations in GenFw, move to the
tiny code model by default. Note that the large model can still be
selected by individual modules by adding -mcmodel=large to the
appropriate CC_FLAGS.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18242 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-20 06:39:12 +00:00
Liming Gao 71028ba2c4 BaseTools: Add /arch:IA32 option in VS2012 and VS2013
VS2012 and VS2013 turn on optimizations by default that generate the
use of CMOV instruction. This is a change from previous version VS2008.
This means when you build with VS2012 or VS2013, it will generate UD
exceptions on Quark.

To resolve it, add /arch:IA32 options to not use enhanced instructions.
https://msdn.microsoft.com/en-us/library/7t5yh4fd(v=vs.140).aspx

Update the default options of VS2012 & VS2013 tool chain IA32 arch in
BaseTools\Conf\tools_def.template to make sure the generated Quark
compatibility driver.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18230 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-18 02:52:32 +00:00
Ard Biesheuvel 70bd69912a BaseTools GCC: prevent unaligned memory accesses on ARM GCC 4.6
In GCC 4.7, a feature was added to the ARM backend that allows
unaligned loads and stores to be emitted. Since it is enabled by
default on ARMv6 and later CPUs, and since such code is not suitable
in our case (i.e., bare metal code), we must disable it by passing the
-mno-unaligned-access option if we are using GCC 4.7 or later.

However, this particular feature and its enabling by default have been
backported to version 4.6 by Linaro. Since the Linaro toolchains are
widely used for ARM development, and also shipped by distros such as
Ubuntu, we should disable the feature on version 4.6 as well.
Unfortunately, since the upstream version does not support the feature,
it also does not understand the -mno-unaligned-access option.

Since GCC sets the builtin #define __ARM_FEATURE_UNALIGNED to 1 when
-munaligned-access is in effect, we can force the build to fail in this
case by passing -D__ARM_FEATURE_UNALIGNED=0 on the GCC command line.

This will produce the following error message:

  <command-line>:0:0: error: "__ARM_FEATURE_UNALIGNED" redefined [-Werror]
  <built-in>:0:0: note: this is the location of the previous definition

and terminate the build.

This patch may cause some existing builds to fail, but they will be
builds that were previously at risk of unexpected runtime exceptions.
Those builds can also easily be switched to the GCC47 profile instead,
generating safe binaries.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18228 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-17 12:02:50 +00:00
Ard Biesheuvel 26ecc55c02 BaseTools IA32/X64: prevent .eh_frame sections from being generated
After the recent GNU linker script changes, the following warning is
emitted many times during the OVMF build:

BFD: <...>: warning: Empty loadable segment detected, is this intentional ?

This is caused by the fact that, now that the section layout has changed
somewhat, the .eh_frame section is assigned an ELF segment of its own,
which ends up with no contents at all after we strip the .eh_frame
section from the output. (Note that the program headers that contain the
segment information are completely irrelevant to us since the PE/COFF
conversion does not rely on them.)

Since we only retain the .eh_frame data for external debugging, and not
for things like stack unwinding or generating backtraces at runtime, we
can remedy the situation by passing -fno-asynchronous-unwind-tables on
the GCC command line. This option instructs the compiler to emit the
unwind data into a debug section called .debug_frame instead of into
.eh_frame.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Build-tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18217 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-13 06:02:00 +00:00
Ard Biesheuvel 64ffb95441 BaseTools: remove ARMGCC and ARMLINUXGCC toolchains
The ARMGCC and ARMLINUXGCC toolchains are specific to the ARM and
AARCH64 architectures, and overlap with the toolchain configuration
that is provided by the GCC44 - GCC49 toolchains, which are defined
for all architectures.

To reduce the maintenance burden, and make it easier to keep these
different architectures aligned, remove the ARMGCC and ARMLINUXGCC
toolchains entirely.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18212 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-12 05:25:48 +00:00
Ard Biesheuvel 5c02fc49ae BaseTools: add CLANG35 toolchain with AARCH64 support
This adds support for building the AARCH64 platforms using the
Clang compiler and assembler combined with the GNU (cross-)linker.

The chosen name CLANG35 is based on version 3.5 being the oldest
supported version, but no issues are known that should prevent its
use with any later version.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18198 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-10 07:55:26 +00:00
Yingke Liu 55668ca245 BaseTools/Trim: Fixed a bug that cannot trim long values
The long value substitution must move to the front of
HEX substitution, and updated build_rule to add --trim-long

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yingke Liu <yingke.d.liu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18170 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-06 08:05:59 +00:00
Ard Biesheuvel c4a59af8c1 BaseTools IA32/X64: Use GccBase.lds instead of gcc*-ld-script
These scripts all now have the same contents, so we only need to use
GccBase.lds. Therefore we can delete gcc-4K-align-ld-script,
gcc4.4-ld-script and gcc4.9-ld-script.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18142 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03 08:23:59 +00:00
Ard Biesheuvel 6b3720e438 BaseTools AARCH64: move to unified GCC linker script
Drop the GCC AARCH64 specific linker script and use the new
unified one instead.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18138 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03 08:23:05 +00:00
Ard Biesheuvel c28a4ab663 BaseTools IA32/X64: get header size and alignment from ld commandline
Instead of hardcoding the values for the PE/COFF header size and the
section alignment, set them on the linker command line. This factors
out these values from the various linker scripts, which will allow us
to unify them in a subsequent patch.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18134 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03 08:22:16 +00:00
Leif Lindholm 28e80befa4 BaseTools: aarch64: add -fno-asynchronous-unwind-tables to gcc cflags
Some toolchains, at least Fedora GCC, generate inline unwind tables in
object files. These confuses GenFw to no end, leading to build failures:
  GenFw: ERROR 3000: Invalid WriteSections64(): ...
         unsupported ELF EM_AARCH64 relocation 0x105.
  GenFw: ERROR 3000: Invalid WriteSections64(): ...
         unsupported ELF EM_AARCH64 relocation 0x0.

I am aware of no current use of these tables, so explicitly disable
their generation for aarch64.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Wei Huang <wei@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17905 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-09 16:29:44 +00:00
Ard Biesheuvel 64a910f3da BaseTools: AArch64: use explicit linker scripts
Instead of relying on the builtin linker script of GNU ld, which
may vary based on binutils version (which is not tightly coupled to
the GCC version) and linker command line options, introduce a linker
script for AArch64 to be used by all GCC/binutils versions.

The script is laid out such that two ELF sections .text and .data are
created that map onto the PE/COFF with the same names. By aligning
.data to the minimum alignment of .text, and by not adding any
additional padding -which is what LD's builtin linker script does- the
relative offset between .text and .data is retained after the PE/COFF
conversion. This should prevent problems with debuggers and other
tooling that are ELF based.

Also provided is an overlay linker script that increases the alignment
of .text and .data to 64 KB. This is intended for DXE_RUNTIME_DRIVER
modules, to make them compatible with the newly introduced
Properties Table feature.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <Olivier.Martin@arm.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17824 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-06 15:57:50 +00:00
Jordan Justen 288ed59079 Revert tree to r17801
Revert r17802 "BaseTools: AArch64: use explicit linker scripts"
Revert r17803 "ArmVirtPkg: build runtime drivers with 64 KB section alignment"
Revert r17804 "IntelFrameworkModulePkg: AcpiS3SaveDxe: prepare for End-of-Dxe callback"
Revert r17805 "IntelFrameworkModulePkg: AcpiS3SaveDxe: call S3Ready() at End-of-Dxe"
Revert r17806 "OvmfPkg: AcpiS3SaveDxe: prepare for End-of-Dxe callback"

Requested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17807 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-02 07:23:33 +00:00
Ard Biesheuvel f0dbe9fa0a BaseTools: AArch64: use explicit linker scripts
Instead of relying on the builtin linker script of GNU ld, which
may vary based on binutils version (which is not tightly coupled to
the GCC version) and linker command line options, introduce a linker
script for AArch64 to be used by all GCC/binutils versions.

The script is laid out such that two ELF sections .text and .data are
created that map onto the PE/COFF with the same names. By aligning
.data to the minimum alignment of .text, and by not adding any
additional padding -which is what LD's builtin linker script does- the
relative offset between .text and .data is retained after the PE/COFF
conversion. This should prevent problems with debuggers and other
tooling that are ELF based.

Also provided is an overlay linker script that increases the alignment
of .text and .data to 64 KB. This is intended for DXE_RUNTIME_DRIVER
modules, to make them compatible with the newly introduced
Properties Table feature.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17802 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-02 06:36:00 +00:00
Yingke Liu bbb6369486 BaseTools: Updated tool_def to support 4K alignment.
Replace '/MERGE:.data=.text /MERGE:.rdata=.text' with /MERGE:.rdata=.data

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yingke Liu <yingke.d.liu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17726 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-29 03:14:33 +00:00
Yingke Liu 061eb5c31d BaseTools: Update IASL download link and remove specific version info.
The version of IASL compiler in the tools_def.template file no longer exists on the acpica.org site.
Update download link and remove the specific version info from the tools_def.template file.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yingke Liu <yingke.d.liu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17725 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-29 03:10:25 +00:00
Yingke Liu 867d1cd4cd BaseTools: Append FILE_GUID to BaseName.
This patch makes sure the EFI file in $(BIN_DIR) is unique. If there are modules with same BaseName, the FILE_GUID is appended.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yingke Liu <yingke.d.liu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17608 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-10 07:50:59 +00:00