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54 Commits

Author SHA1 Message Date
mdkinney
58b23d903e Use atomic AsmDisableCache() and AsmDisableCache() functions instead of AsmWriteCr0() and AsmWbinvd() calls 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9998 6f19259b-4bc3-4df7-8a09-765794883524
 2010-02-14 00:44:27 +00:00
jyao1
3ba736f39c Revert incompatible change: 
1) No API change from old version.
2) Change MACRO:
#define  MTRR_NUMBER_OF_VARIABLE_MTRR  32 // the semantics are changed from NUMBER to MAX_NUMBER.
#define  FIRMWARE_VARIABLE_MTRR_NUMBER  6 // wrong and deprecated
#define  MTRR_LIB_IA32_VARIABLE_MTRR_END 0x20F // wrong and deprecated
#define  RESERVED_FIRMWARE_VARIABLE_MTRR_NUMBER  2 // add new one.


git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9941 6f19259b-4bc3-4df7-8a09-765794883524
 2010-02-05 22:27:07 +00:00
jyao1
3b9be4164b Original MTRR lib hardcode VARIABLE_MTRR as 8. But it is 7 in Core2 if SMRR enabled, and 10 in latest Corei7. 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9935 6f19259b-4bc3-4df7-8a09-765794883524
 2010-02-05 06:33:42 +00:00
jljusten
e50466da24 Add MTRR library for IA32 & X64 processor architectures. 
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8394 6f19259b-4bc3-4df7-8a09-765794883524
 2009-05-27 21:09:39 +00:00