Clang's preprocessor behaves differently from GCC's, and produces
intermediate device tree source that still contains #pragma pack()
and other directives that the device tree compiler chokes on.
For assembling device tree sources, it matters very little which
preprocessor is being used, so let's just use GNU CPP explicitly.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
when MAX_CONCURRENT_THREAD_NUMBER is not specified, tool will
automatically detect number of processor threads.
Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=775
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
We duplicate the Assembly-Code-File section from build_rule.template
because --convert-hex cannot be used with the MSFT ARM assembler.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>
By default, the device tree compiler emits phandle properties twice:
once called 'phandle' and again called 'linux,phandle'. Given that
Linux was updated in early 2010 [0] to accept the former (which is
what is specified in the ePAPR and device tree specifications), there
is no point in emitting both when compiling device trees for UEFI
platforms.
[0] 04b954a673dd02f585a2769c4945a43880faa989
"of/flattree: Make the kernel accept ePAPR style phandle information"
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Ironically, disabling warnings in the OpensslLib library build is
causing breakage when using the CLANG35 toolchain to build for ARM:
error: unknown warning option '-Werror=maybe-uninitialized'; did you mean '-Werror=uninitialized'? [-Werror,-Wunknown-warning-option]
So let's add -Wno-unknown-warning-option to the list of warnings to
ignore when using Clang 3.5, and move the same option from the x86
specific list to the shared list for Clang 3.8.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Enable optimization for DEBUG builds, to make it more usable in terms of
performance, and to give more coverage to the LTO builds. Also, some
diagnostics are only enabled when optimization is enabled.
NOOPT builds can now also be created, which will retain the behavior DEBUG
builds had previously.
Note that this aligns ARM and AARCH64 with the x86 architectures, which
already use optimization for DEBUG builds.
In order to preserve existing behavior for users of older toolchains,
keep GCC49 and older as-is.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Commit 8b6366f875 ("BaseTools/GCC: set -Wno-unused-const-variable
on RELEASE builds") suppresses warnings about unused constant
variables in RELEASE builds when building with GCC, given that they
break the build under our warnings-as-errors policy.
Do the same for CLANG38.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=790
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Shi Steven <steven.shi@intel.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Extend the CLANG38 toolchain definition so it can be used for
ARM and AARCH64 as well. Note that this requires llvm-ar and
the LLVMgold.so linker plugin.
In preparation of doing the same for GCC5, this toolchain version
also departs from the custom of using -O0 for DEBUG builds, which
makes them needlessly slow. Instead, let's add a NOOPT flavor as
well, and enable optimization for DEBUG like the other architectures
do. (Note that this will require some trivial changes to the platform
description files)
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Recent distro builds of GCC 6 enable PIE linking by default, and allow
the previous behavior to be restored by passing the -no-pie command line
argument. Support for this was implemented by commits 1894a7c64c and
3380a59123 but unfortunately, it turns out that GCC 5 does not support
this command line argument, and exits with an error.
To avoid the need for yet another toolchain tag, to distinguish between
GCC 5 and GCC 6, let's use our GCC linker scripts when building objects
from .aslc files. This will ensure that the extra sections that are added
by the PIE linker are discarded from the ELF binary, and so they will not
corrupt the resulting .acpi file.
This reverts
1894a7c64c BaseTools/tools_def AARCH64 ARM: disable PIE linking
3380a59123 BaseTools/tools_def AARCH64 ARM: disable PIE linking for .aslc sources
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Commit 1894a7c64c ("BaseTools/tools_def AARCH64 ARM: disable PIE
linking") works around an issue that was caught due to the fact that
PIE linking produces broken .acpi files. However, v2 of that fix
inadvertently only applied the workaround to the normal linker command
line, and not to the ASLD one, so the issue still persists.
So add the missing -no-pie options for ASLD on ARM and AARCH64.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
The standard GCC preprocessor we use to preprocess device tree source
files has a whole bunch of macros predefined, among which
#define __linux 1
#define __linux__ 1
#define __gnu_linux__ 1
#define linux 1
This causes a property like 'linux,code' to be converted into '1,code'
which is obviously wrong. So let's get rid of all the predefined macros
by passing -undef to the preprocessor command line.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Some prebuilt GCC toolchains targeting aarch64 (e.g., the Debian Stretch
one) will default to building PIE executables. This has been observed to
corrupt ACPI tables built from .aslc sources, so disable PIE linking
altogether when using the GCC toolchain to build for AARCH64 or ARM.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Commit 8f0b62a5da ("BaseTools/tools_def AARCH64: enable frame pointers
for DEBUG builds") removed the -fomit-frame-pointer switch from the CFLAGS
definitions that are shared between AARCH64 DEBUG and RELEASE builds, and
moved it to the RELEASE specific ones, so that DEBUG builds can produce a
backtrace when a crash occurs.
This is actually a useful thing to have for RELEASE builds as well. AArch64
has 30 general purpose registers, and so the performance hit of having a
frame pointer is unlikely to be noticeable, nor are the additional 8 bytes
of stack space likely to present a problem.
So remove -fomit-frame-pointer altogether this time.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
TianoCore BZ#700 [1]
Set the '-Wno-unused-const-variables' in RELEASE builds with the
GGC49 and GCC5 toolchain.
This fixes the RELEASE build of OVMF with GCC in version 6 or newer.
GCC 6 added the '-Wunused-const-variable' warning, which gets
activated by '-Wunused-variable' and has the following behavior:
"Warn whenever a constant static variable is unused aside from its
declaration" [2]
Commit 2ad6ba80a1 introduced a case
where exactly this happens on a RELEASE build. All uses of the static
const variable are located in debug code only, which gets thrown out
by the compiler on RELEASE builds and thus triggers the
unused-const-variable warning.
There is currently no GCC 6 toolchain target defined and doing so
would add a lot of boilerplate code. Instead, use the fact that GCC
ignores unknown '-Wno-*' options:
"[...] if the -Wno- form is used [...] no diagnostic is produced for
-Wno-unknown-warning unless other diagnostics are being produced"
This behavior is available in GCC 4.9 [3] (and also earlier, for that
matter), so add the flag to the GCC49 and GCC5 toolchain, even if
both GCC versions do not supports it.
GCC49 doesn't enables LTO whereas GCC5 does. As GCC 6.0 through 6.2
had bugs relating to LTO there can be desire to use the GCC49 target
even if compiling with GCC 6, see 432f1d83f7.
Orient the changes on 20d00edf21 which moved the
'-Wno-unused-but-set-variable' flag to RELEASE builds only, as there
it ensure that it does not gets raised if the only usage of a
variable is in (then collapsed) debug code.
[1] https://bugzilla.tianocore.org/show_bug.cgi?id=700
[2] https://gcc.gnu.org/onlinedocs/gcc-6.4.0/gcc/Warning-Options.html#index-Wunused-const-variable
[3] https://gcc.gnu.org/onlinedocs/gcc-4.9.0/gcc/Warning-Options.html
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
[lersek@redhat.com: fix typo in subject]
While modern AARCH64 server systems use ACPI for describing the platform
topology to the OS, ARM systems and AARCH64 outside of the server space
mostly use device tree binaries, which are compiled from device tree
source files using the device tree compiler.
Currently, such source files and binaries may be kept in the EDK2 platform
trees, but are not integrated with the build, which means they need to be
kept in sync and recompiled manually, which is cumbersome.
So let's wire up BaseTools support for them: add tool definitions for the
DTC compiler and preprocessor flags that allow these source files to use
FixedPcd expressions and other macros defined by AutoGen.h
This way, a device tree binary can be built from source and emitted into
a FFS file automatically using something like:
DeviceTree.inf:
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = SomePlatformDeviceTree
FILE_GUID = 25462CDA-221F-47DF-AC1D-259CFAA4E326 # gDtPlatformDefaultDtbFileGuid
MODULE_TYPE = USER_DEFINED
VERSION_STRING = 1.0
[Sources]
SomePlatform.dts
[Packages]
MdePkg/MdePkg.dec
SomePlatform.fdf:
INF RuleOverride = DTB xxx/yyy/DeviceTree.inf
[Rule.Common.USER_DEFINED.DTB]
FILE FREEFORM = $(NAMED_GUID) {
RAW BIN |.dtb
}
where it can be picked at runtime by the DTB loader that may refer to it
using gDtPlatformDefaultDtbFileGuid.
Note that this is very similar to how ACPI tables may be emitted into a
FFS file with a known GUID and picked up by AcpiTableDxe at runtime.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=676
Add LLVM39 and LLVM40 support in CLANG38 toolchain
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=582
Don't enable this option in the default setting, because it may cause VS2015
linker crash. Platform can enable this option in PlatformPkg.dsc like below:
[BuildOptions]
*_*_*_DLINK2_FLAGS = /WHOLEARCHIVE
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=671
GCC tool chain uses -fpie in CC_FLAGS. So, add -pie in DLINK_FLAGS.
More discussion in
https://lists.01.org/pipermail/edk2-devel/2017-August/013508.html
3.13 Options for Linking
========================
'-pie'
Produce a position independent executable on targets that support
it. For predictable results, you must also specify the same set
of options used for compilation ('-fpie', '-fPIE', or model
suboptions) when you specify this linker option.
3.18 Options for Code Generation Conventions
============================================
'-fpie'
'-fPIE'
These options are similar to '-fpic' and '-fPIC', but generated
position independent code can be only linked into executables.
Usually these options are used when '-pie' GCC option is used
during linking.
'-fpie' and '-fPIE' both define the macros '__pie__' and
'__PIE__'. The macros have the value 1 for '-fpie' and 2 for
'-fPIE'.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
XIP code may execute with the MMU off, in which case all memory accesses
should be strictly aligned to their size. Some versions of GCC violate
this restriction even when -mstrict-align is passed, when performing
loads and stores that involve SIMD registers. This is clearly a bug in
the compiler, but we can easily work around it by avoiding SIMD registers
altogether when building code that may execute in such a context. So add
-mgeneral-regs-only to the AARCH64 XIP CC flags.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
The AArch64 ABI classifies register x18 as a platform register, which
means it should not be used unless the code is guaranteed to run on a
platform that doesn't use it in such a capacity.
GCC does not honour this requirement by default, and so we need to tell
it not to touch it explicitly, by passing the -ffixed-x18 command line
option.
Link: https://bugzilla.tianocore.org/show_bug.cgi?id=625
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
The /Gw flag does a better job at size optimization than use of the
GLOBAL_REMOVE_IF_UNREFERENCED macro that is currently used for VS20xx
tool chains to remove unreferenced global variables.
This patch add /Gw to CC_FLAGS for VS2013 and higher tool chain tags.
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
On AARCH64, any code that may execute with the MMU off needs to be built
with -mstrict-align, given that unaligned accesses are not allowed unless
the MMU is enabled. This does not only affect SEC and PEI modules, but
also static libraries of the BASE type, which may be linked into such
modules, as well as into modules of other types. As it turns out, the
presence of -mstrict-align is reflected in the internal representations
of the types defined in those libraries.
When -fstrict-aliasing is passed to GCC, it assumes that pointers to
objects of different types cannot refer to the same memory location, and
attempts to exploit this fact when optimizing the code. Since such
assumptions are only valid under very strict conditions which are not
guaranteed to be met in EDK2, we disable this optimization by passing
-fno-strict-aliasing by default. [*]
When LTO is in effect, this applies equally to the code generation that
may occur at link time, which is why the linker warns about unexpected
differences in type definitions between the intermediate representations
that are present in the object files being linked. This may result in
warnings such as the one below, even if -fno-strict-aliasing is used:
MdePkg/Include/Library/BaseLib.h:1712:1:
warning: type of 'StrToGuid' does not match original declaration
[-Wlto-type-mismatch]
StrToGuid (
^
MdePkg/Library/BaseLib/SafeString.c:1506:1:
note: 'StrToGuid' was previously declared here
StrToGuid (
^
MdePkg/Library/BaseLib/SafeString.c:1506:1:
note: code may be misoptimized unless -fno-strict-aliasing is used
This warning is inadvertently triggered when linking BASE libraries built
with -mstrict-align into modules of types other than SEC or PEI, since the
types are subtly different, even though the use of code that maintains
strict alignment in a module that does not care about this is unlikely to
cause problems. And even if it did, it would still only affect code built
with -fstrict-aliasing enabled, which we disable unconditionally. So let's
just silence the warning by passing -Wno-lto-type-mismatch.
[*] Leif adds: "-fstrict-aliasing is GCC default, because it is a
restriction in the C language. Because it's a bit non-obvious, things
can go hilariously wrong in very non-obvious ways, and the potential
optimization gains are unlikely to be generally relevant,
-fno-strict-aliasing is a sensible thing to always have set (like we
do)."
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
For historical reasons, GCC builds for ARM and AARCH64 pass the
-save-temps command line option to GCC, which instructs the compiler
to preserve intermediate files, i.e., preprocessor output and generated
assembler. Given that this clutters up the Build directory, and slows
down the build, let's remove it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
After Debian's toolchain switched to PIE by default, our edk2 builds began
to fail to build (GCC49 w/ gcc 6.3). This patch fixes the build by forcing
off PIE for both ARM and AARCH64 builds.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: dann frazier <dannf@debian.org>
Add -fno-pic as well for ARM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reorganize the statements for XCODE5 to match other tool
chains and remove dependency on XCLANG and XCODE32
Cc: Andrew Fish <afish@apple.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=561
Update BaseTools/Conf/tools_def.template to add the define
-D NO_MSABI_VAARGS
To CC_FLAGS for X64 XCODE5 builds.
The llvm/clang compiler used in XCODE5 builds supports the
_ms_ versions of the vararg builtins, but the compiler
generates build errors.
The recommendation from the XCODE5 experts is to never use
the _ms_ version of the vararg builtins. The define
NO_MSABI_VARARGS is already supported in MdePkg/Include/Base.h
and forces the use the standard vararg builtins.
Cc: Andrew Fish <afish@apple.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
Now, -fno-builtin option is added for the specific GCC tool chain.
It is a generic option. It can be moved to common GCC option to keep
the consistent compiler option.
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Suggested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
As a security measure, some distro toolchains now default to PIC code
generation, allowing executables (as opposed to shared libraries) using
the objects to be built as PIE binaries, which can be loaded at a random
virtual offset.
However, our ELF to PE/COFF generation code does not deal with the
resulting relocation types (i.e., GOT based), and so the use of PIC code
leads to GenFw errors.
Given that
a) our non-PIC PE/COFF executables are already relocatable,
b) PIC code leads to all symbol references to be indirected via GOT
entries containing absolute addresses, each requiring an entry in the
relocation table,
c) the AArch64 ISA makes it perfectly feasible to built PIE executables
from non-PIC code,
there is absolutely no upside to using PIC code for building EDK2 modules,
and so we're better off simply disabling it unconditionally.
Note that when running under the OS, the GOT has an additional advantage,
i.e., that all .text/.rodata pages remain clean and so can be shared between
processes. This does not apply to the UEFI environment, however.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Define "-march=armv7-a" - which is used by the GCC toolchains - for
ARM CLAMNG35 builds to fix compilation of the MemoryFence ASM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Marvin Haeuser <Marvin.Haeuser@outlook.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
https://bugzilla.tianocore.org/show_bug.cgi?id=227
Refer to VS ASLPP_FLAGS, force include AutoGen.h so that ASL code
can use FixedPcdGetXX to get FixedPcd value.
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=227
After -P option is removed, the generated preprocessed ASL file will have
line markers. The extra information can be removed by Trim script. ASL code
can refer to the definition in C source file. This has been supported in
VS and XCODE tool chains.
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
BaseTools add support to generating image package from BMP/JPEG/PNG
files.
1) New file type *.idf Image definition file to describe HII image
resource. It is the ASCII text file, and includes one or more "#image
IMAGE_ID [TRANSPARENT] ImageFileName".
2) New IMAGE_TOKEN macro is used to refer to IMAGE_ID.
3) New AutoGen header file $(MODULE_NAME)ImgDefs.h to include the
generated ImageId definition.
4) New $(MODULE_NAME)Idf.hpk or $(MODULE_NAME)Images are generated
as the output binary HII image package.
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Provide the PKCS7 Tool to support the CertType - EFI_CERT_TYPE_PKCS7_GUID,
then user can use this tool to add EFI_FIRMWARE_IMAGE_AUTHENTICATION
for a binary.
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
CLANG38 build fail after CC_FLAG is added in the link rule.
This failure is because the CLANG38 enable the LTO through LLVMgold.so
linker plugin, but the LLVMgold.so plugin cannot accept the clang -Oz
CC flag as build option. After CC_FLAG is added in the link rule,
the LLVMgold.so plugin reports linking error. LLVMgold.so only accept
-O0 ~ -O3, and you can see it in the LLVM gold plugin source code
in below:
http://llvm.org/svn/llvm-project/llvm/tags/RELEASE_380/final/tools/gold/
gold-plugin.cpp line173:
if (opt[1] < '0' || opt[1] > '3')
message(LDPL_FATAL, "Optimization level must be between 0 and 3");
Add -O3 in the *_CLANG38_*_DLINK2_FLAGS to override the -Oz flag in
*_CLANG38_*_CC_FLAGS to pass LLVMgold.so linking.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This updates the RVCT CC flags so various diagnostics that trigger
warnings-as-errors are silenced. In particular, RVCT complains about
missing newlines at the end of source files, mixing of enums and int
values and return statements followed by a break, all of which occur
in the Tianocore codebase, but none of which are actual errors in the
code. So just silence them.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
The ARM and AARCH64 CC_FLAGS definitions include both GCC_ALL_CC_FLAGS
and GCC44_ALL_CC_FLAGS, resulting in many of the compiler arguments
being passed twice. Since the CLANG35 definitions do not refer to
GCC44_ALL_CC_FLAGS, drop the reference for GCCx as well.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Ard Biesheuvel
Yonghong Zhu
Pete Batard
Liming Gao
Thomas Lamprecht
Shi, Steven
Chris Ruffin
dann frazier
Michael Kinney
Song, BinX
Marvin Haeuser