This protocol introduces an abstraction to access the VirtIo
Configuration and Device spaces.
The registers in these spaces are located at a different offset and have
a different width whether the transport layer is either PCI or MMIO. This
protocol would also allow to support VirtIo PCI devices with MSI-X
capability in a transparent way (Device space is at a different offset
when a PCIe device has MSI-X capability).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
v5:
- add disclaimer (two instances) about the protocol being work in progress
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14963 6f19259b-4bc3-4df7-8a09-765794883524
LibWchar is now a standalone library which can be used independent of the rest of StdLib.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daryl McDaniel <daryl.mcdaniel@intel.com>
Reviewed-by: Matthew Stanbro <Matthew.A.Stanbro@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14959 6f19259b-4bc3-4df7-8a09-765794883524
This moves some logic for handling command lines with pipe ‘|’ into a separate function.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14958 6f19259b-4bc3-4df7-8a09-765794883524
'inline' keyword is not supported by the C89 (version used by EDK2).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14957 6f19259b-4bc3-4df7-8a09-765794883524
Signed-off-by: Elvin Li <elvin.li@intel.com>
Reviewed-by: Leahy Leroy P <leroy.p.leahy@intel.com>
Reviewed-by: Lin Jie <jie.lin@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14952 6f19259b-4bc3-4df7-8a09-765794883524
There was an assumption that this API would never fail. That is not true and the return value is checked just a few lines later.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14951 6f19259b-4bc3-4df7-8a09-765794883524
This allows for the user to get out of answering a question with CTRL-C
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14950 6f19259b-4bc3-4df7-8a09-765794883524
This patch sets PcdPciDisableBusEnumeration to true then makes use of
PublishPeiMemory and XenMemMapInitialization to construct memory map for
Xen guest.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14946 6f19259b-4bc3-4df7-8a09-765794883524
MemDetect actully does too many things, the underlying platform might
want to have more control over memory layout.
Extract the functionality of publishing PEI memory to a dedicated
function.
Also fixed wrong comment while I was there.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14944 6f19259b-4bc3-4df7-8a09-765794883524
This is useful for initializing memory map.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14943 6f19259b-4bc3-4df7-8a09-765794883524
EFI_XEN_OVMF_INFO is defined to accept configurations from hvmloader. It
must match the definition on Xen side.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14942 6f19259b-4bc3-4df7-8a09-765794883524
Platforms such as Xen already enumerates PCI bridges and devices. Use
this PCD to control EDK2 behavior.
PcdPciDisableBusEnumeration is placed under [PcdsFixedAtBuild,
PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx], so that it is
possible to alter it during runtime.
The default setting of this PCD is false (allow full PCI enumeration) to
preserve the same behavior before this change.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14940 6f19259b-4bc3-4df7-8a09-765794883524
We do not have (Secure) Monitor mode on AArch64.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14939 6f19259b-4bc3-4df7-8a09-765794883524
To make the code platform independent we should not use PcdArmPrimaryCore
in libraries other than the platform specific libraries.
Some platforms allow to change the primary core with external registers.
These platforms do not use PcdArmPrimaryCore to identify the primary CPU.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14938 6f19259b-4bc3-4df7-8a09-765794883524
- Used correct PCD
- Implement the function for AArch64, BeagleBoard, CTA15A7
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14937 6f19259b-4bc3-4df7-8a09-765794883524
In GetLocalTokenNumber () of Service.c(DXE), the TokenNumber is wrong to call GetPtrTypeSize ().
GetPtrTypeSize need the original TokenNumber.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Bob C Feng <bob.c.feng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14936 6f19259b-4bc3-4df7-8a09-765794883524
The SmmLockBox driver in
"MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf" currently
specifies a DepEx on EFI_SMM_SW_DISPATCH2_PROTOCOL.
However, the driver doesn't use this protocol at all, either directly or
indirectly. It calls SmiHandlerRegister()
[MdeModulePkg/Core/PiSmmCore/Smi.c] to register SmmLockBoxHandler()
(which serves LockBox requests).
In turn, the SMM Core function SmiHandlerRegister() is also implemented
without EFI_SMM_SW_DISPATCH2_PROTOCOL.
The DepEx has been present since the initial commit of the SmmLockBox
driver (SVN r12029); it is probably superfluous. Let's remove it.
(Alternatively, we could extend OvmfPkg/EmuSmmDxe to fake this protocol,
and return EFI_UNSUPPORTED when any member is called.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14930 6f19259b-4bc3-4df7-8a09-765794883524
When the Device Tree was loaded above the 32bit address space the operation:
*RelocatedFdt = ALIGN ((UINT64)*RelocatedFdt, (UINT32)FdtAlignment);
was returning an incorrect address.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14915 6f19259b-4bc3-4df7-8a09-765794883524
This change introduces default values for the PCDs PcdPrePiCpuMemorySize & PcdPrePiCpuIoSize.
These values are for the architectures ARM, AARCH64, IA32 and X64.
The redefinition of these PCDs (with the same default values) have been removed from the DSC files.
Note: the default value for AARCH64 was 32. It was preventing to allocate buffer above the 32bit
address space.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14914 6f19259b-4bc3-4df7-8a09-765794883524
Olivier Martin
Elvin Li
Liming Gao
Daryl McDaniel
Jaben Carsey
Fu Siyuan
Eric Dong
Shumin Qiu
Wei Liu
Star Zeng
Olivier Martin olivier.martin
Jeff Fan
Feng Tian
Ruiyu Ni
Laszlo Ersek
Chris Phillips
Dong Guo