This updates the RVCT CC flags so various diagnostics that trigger
warnings-as-errors are silenced. In particular, RVCT complains about
missing newlines at the end of source files, mixing of enums and int
values and return statements followed by a break, all of which occur
in the Tianocore codebase, but none of which are actual errors in the
code. So just silence them.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
The ARM and AARCH64 CC_FLAGS definitions include both GCC_ALL_CC_FLAGS
and GCC44_ALL_CC_FLAGS, resulting in many of the compiler arguments
being passed twice. Since the CLANG35 definitions do not refer to
GCC44_ALL_CC_FLAGS, drop the reference for GCCx as well.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Commit 478f50990a ("BaseTools GCC: add the compiler flags to the linker
command line") added the compiler flags to the linker command line,
which is required for LTO to function correctly, since it involves code
generation at link time.
This patch failed to update the build rules for XIP modules on AARCH64,
which not only requires the ordinary CC flags but also the XIP CC flags
to prevent the LTO backend to, e.g., emit code that does not adhere to
the strict alignment rules we impose for code that may execute with the
MMU off.
So update the XIP link rules as well. Since AARCH64 and ARM are not
supported by any toolchains in the GCCLD build rule family, drop the
reference to GCCLD while we're at it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This adds support for LLVM 3.8.x in LTO mode for IA32 and X64.
CLANG38 enable LLVM Link Time Optimization (LTO) and code size
optimization flag (-Oz) by default for aggressive code size
improvement. CLANG38 X64 code is small code model + PIE.
CLANG LTO needs PIE in link flags to generate PIE code correctly,
otherwise the PIE is not really enabled. (e.g. OvmfPkgX64 will
hang in 64bits SEC at high address because of small model code
displacement overflow).
Test pass platforms: OVMF (OvmfPkgIa32.dsc, OvmfPkgX64.dsc and
OvmfPkgIa32X64.dsc).
Test compiler and linker version: LLVM 3.8, GNU ld 2.26.
Example steps to use the CLANG38 tool chain to build OVMF platform:
1. Download and extract the llvm 3.8.0 Pre-Built Binaries from
http://www.llvm.org/releases/ (e.g. http://www.llvm.org/releases/
3.8.0/clang+llvm-3.8.0-x86_64-linux-gnu-ubuntu-16.04.tar.xz and
extract it as ~/clang38).
2. Copy LLVMgold.so from https://github.com/shijunjing/edk2/blob/
llvm/BaseTools/Bin/LLVMgold.so to above clang lib folder (e.g.
~/clang38/lib/LLVMgold.so)
3. Install new version linker with plugin support (e.g. ld 2.26 in
GNU Binutils 2.26 or Ubuntu16.04)
$ cd edk2
$ git checkout llvm
$ export CLANG38_BIN=path/to/your/clang38/
(e.g. export CLANG38_BIN=~/clang38/bin/)
$ source edksetup.sh
$ make -C BaseTools/Source/C
$ build -t CLANG38 -a X64 -p OvmfPkg/OvmfPkgX64.dsc -n 5 -b DEBUG
-DDEBUG_ON_SERIAL_PORT
$ cd edk2/Build/OvmfX64/DEBUG_CLANG38/FV
$ qemu-system-x86_64.exe -bios OVMF.fd -serial file:serial.log -m 4096
-hda fat:.
If you want, you can build and install GNU Binutils 2.26 as below steps
in Ubuntu:
Download binutils-2.26 source code from http://ftp.gnu.org/gnu/binutils/
and extract it to ~/binutils-2.26
$sudo apt-get install bison
$sudo apt-get install flex
Install other necessary binutils build tools if missing
$ mkdir build
$ cd build
$ ../binutils-2.26/configure --enable-gold --enable-plugins
--disable-werror --prefix=/usr
$ make -j 5
$ sudo make install
If you want, you can build LLVMgold.so as below steps
Download llvm-3.8.0 source code from http://www.llvm.org/releases/
3.8.0/llvm-3.8.0.src.tar.xz and extract it to ~/llvm-3.8.0.src
Download clang3.8.0 source code from http://www.llvm.org/releases/
3.8.0/cfe-3.8.0.src.tar.xz and extract it to ~/llvm-3.8.0.src/tools/clang
Refer http://clang.llvm.org/get_started.html to Install other necessary
clang build tools if missing
$ mkdir llvm38build
$ cd llvm38build
If your GNU Binutils 2.26 is in /home/jshi19/binutils-2.26,
$ cmake ../llvm-3.8.0.src -G "Unix Makefiles" -DCMAKE_BUILD_TYPE="Release"
-DLLVM_TARGETS_TO_BUILD="X86" -DCMAKE_VERBOSE_MAKEFILE=ON
-DCMAKE_CXX_COMPILER="/usr/bin/g++" -DCMAKE_C_COMPILER="/usr/bin/gcc"
-DLLVM_BINUTILS_INCDIR=/home/jshi19/binutils-2.26/include
$ make -j 5 LLVMgold The LLVMgold.so is in ~/llvm38build/lib/LLVMgold.so
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Both binutils ar and LLVM ar support "cr", but LLVM ar doens't
support add "-" in the flags, and llvm-ar cannot accept "-cr".
So remove the short dash "-" to make llvm archives work.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Given that we only support ARMv7 and up in Tianocore (due to the fact
that the PI spec mandates that the PEI services table pointer be stored
in the TPIDRURW register, which is not available on earlier CPUs), we can
assume that any code executing with the MMU on may perform unaligned
accesses (since the AArch32 bindings in the UEFI spec stipulate that
unaligned accesses should be allowed if supported by the CPU)
So relax the alignment restrictions to XIP modules only, i.e., BASE, SEC,
PEI_CORE and PEIM type modules, exactly like we do for AARCH64 already.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
When building for AARCH64, code that may execute with the MMU off should
not perform unaligned accesses, which is why we set -mstrict-align for
BASE, SEC, PEI_CORE and PEIM modules when building with GCCx. However,
this setting is missing from CLANG35 so set it there as well.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Avoid build errors when including OpensslLib, which may throw
undefined reference errors for builtin functions if -fno-builtin
is not specified (and it is already set for IA32, X64 and AARCH64)
So set it for ARM as well.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Now that we invoke GCC as the linker for the GCC toolchain family,
we can pass the CC flags to the linker as well. This is only
required for LTO (which may involve code generation during the link
stage), but does not interfere with non-LTO builds.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
GCC5 runs in LTO mode, which means it may generate code from an
intermediate representation during the link stage, at which time
additional diagnostics are run that may emit warnings.
Some of these warnings seem to be spurious, e.g., the following
warning which is emitted when building OVMF for IA32 or ArmVirtQemu
for ARM (but not for X64 resp. AARCH64)
.../MdeModulePkg/Library/UefiHiiLib/HiiLib.c:
In function 'HiiCreateGuidOpCode.constprop':
.../MdeModulePkg/Library/UefiHiiLib/HiiLib.c:3228:10:
error: function may return address of local variable
[-Werror=return-local-addr]
return (UINT8 *)OpCodePointer;
^
.../MdeModulePkg/Library/UefiHiiLib/HiiLib.c:3208:17: note: declared here
EFI_IFR_GUID OpCode;
^
lto1: all warnings being treated as errors
lto-wrapper: fatal error: gcc returned 1 exit status
So before adding the contents of CC_FLAGS to the linker command line,
defuse the default '-Werror' by adding '-Wno-error' to DLINK2_FLAGS
for GCC5.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
In order to be able to share the compiler flags with the linker (which
is required for LTO since it involves the linker doing code generation
based on the LTO bytecode), move the -c GCC argument to the build rules,
and drop it from the GCC CC_FLAGS definitions in tools_def.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Now that GenFw converts small code model ADRP instructions to ADR on
the fly, we can reduce the alignment for XIP modules, where large
alignment values may cause considerable waste of flash space due to
excessive padding. This limits the module size to 1 MB, but this is
not a concern in practice.
So set the XIP section alignment to 0x20 for DEBUG_GCC49, DEBUG_GCC5
and *_CLANG35, all of which use the small code model.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This adds support for GCC 5.x in LTO mode for IA32, X64, ARM and
AARCH64. Due to the fact that the GCC project switched to a new
numbering scheme where the first digit is now incremented for every
major release, the new toolchain is simply called 'GCC5', and is
intended to support all GCC v5.x releases.
Since IA32 and X64 enable compiler optimizations (-Os) for both DEBUG
and RELEASE builds, LTO support is equally enabled for both targets.
On ARM and AARCH64, DEBUG builds are not optimized, and so the LTO
optimizations are only enabled for RELEASE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
To accommodate upcoming GCCx toolchain versions that require 'gcc' to
be used as the linker in order to support LTO, switch GCC44 and later
(including CLANG35) to a new DLINK build rule that invokes 'gcc' as the
linker instead of 'ld'. Since gcc expects its command line arguments in
a different format, and expects arguments that it needs to pass to the
linker to be prefixed with '-Wl,', this involves changes to most of the
DLINK_FLAGS definitions in tools_def.template, as well as some changes to
module .INF files that set their own linker options.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Before we can make non-backward compatible changes to the GCC build rules
regarding the use of the 'gcc' binary as the linker, clone the existing
GCC build rules into a 'GCCLD' build rule family, and move the legacy
toolchains UNIXGCC, CYGGCC, CYGGCCxASL and ELFGCC over to it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Some versions of Clang fail on every input file when using the
-save-temps options, and produces the following heplful error message:
<unknown>:0: error: Undefined temporary symbol
Simply dropping the option for CLANG35 is the simplest way around this,
since the value of storing .i and .s files is dubious anyway.
Also, drop the arm-use-movt option, which does not appear to be
supported anymore by recent versions of clang.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
The ordinary small code model for x86_64 cannot be used in UEFI, since
it assumes the executable is loaded in the first 2 GB of memory.
Therefore, we use the large model instead, which can execute anywhere,
but uses absolute 64-bit wide quantities for all symbol references,
which is costly in terms of code size.
So switch to the PIE small code model, this uses 32-bit relative
references where possible, but does not make any assumptions about the
load address (i.e., all absolute symbol references are 64-bits wide).
Note that, due to the 'protected' visibility pragma introduced in an
earlier patch, there is no need for the EDK2 build system to deal with
GOT related ELF relocation types.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-By: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Now that we switched to the __builtin_ms_va_list VA_LIST type for
GCC/X64, we can trust the compiler to do the right thing even under
optimization, and so we can enable -Os optimization all the way back
to GCC44, and drop the -D define that prevents the use of the __builtin
VA_LIST types. Note that this requires the -maccumulate-outgoing-args
switch as well.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-By: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
NASM had been unable to assemble segment register operations before the
following git commit:
http://repo.or.cz/nasm.git/commitdiff/21d4ccc3c338
That commit was first released in NASM 2.10:
http://repo.or.cz/nasm.git/commitdiff/ff62f33da0a2
This makes NASM 2.07 unusable for edk2 in general, because now we have a
lot of X64 assembly code that works with segment registers. For example
in:
UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
Bump the minimum required version to 2.10, for use with GCC toolchains.
Furthermore, list NASM 2.12.01 as a requirement for all other toolchains.
In particular, for source level debugging, VS20xx requires CodeView 8
debug symbols, and only NASM 2.12.01 and later produce those. (Suggested
by Liming, Mike, and Andrew.)
Cc: Andrew Fish <afish@apple.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: http://thread.gmane.org/gmane.comp.bios.edk2.devel/14612
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
By default, the ARM architectures have unsigned chars, whereas the other
architectures supported by EDK2 by default have signed chars.
However, EDK2 uses -funsigned-chars on those architectures to change the
default behaviour.
Unfortunately, the ARM architectures explicitly break their default
behaviour by specifying -fsigned-chars (I presume in a pre-emptive
attempt at avoiding incompatibility).
Since this situation is already confusing enough, switch the ARM
architectures to also specify -funsigned-chars explicitly rather than
just dropping the current parameter.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Remove /Oi from Visual Studio tool chains. because of the following reasons:
1. Intrinsic is Compiler-dependent.
2. Adding /Oi (Generate Intrinsic Functions) doesn't promise 100% replacing
the function call with inline functions.
/Oi is only a request, but doesn't force, the compilers to use the intrinsic.
The visual studio optimizer can still use the library version.
3. Since EDK2 doesn't include Visual Studio header files, intrinsic function
should not be used.
Built Nt32Pkg, OvmfPkg, ShellPkg, MdeModulePkg and CryptoPkg successfully.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Cinnamon Shia <cinnamon.shia@hpe.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Qin Long <qin.long@intel.com>
When building AARCH64 platforms that include a Shell binary built from
source, we run into trouble when using the tiny code model for DEBUG
builds. The reason is that the Shell binary built in DEBUG mode exceeds
the 1 MB range of the ADR instruction, so anything that gets pulled into
the final link of the Shell binary either needs to be built with the small
or large model, or needs to be sorted in some way to put the ADR references
close to their targets.
Since code size is not a big concern for DEBUG builds anyway, let's move
to the small code model for all modules when using DEBUG GCC49. This way,
there is no need for workarounds that are specific to UEFI_APPLICATION
modules in general, or the Shell application in particular.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This aligns the GCC definitions for 4.6 and up to align with the ARM and
AARCH64 definitions, which is to ignore unused but set variables only on
RELEASE builds. This allows us to find instances of unused variables that
are left behind after refactoring. It also allows us to find bad new code,
which, due to the EDK2 coding style which disallows initialized automatic
variables, may contain such variables without having been noticed by other
toolchains.
(Slightly edited) observation from Jordan Justen
<jordan.l.justen@intel.com>: RELEASE builds must keep the flag because
debug code (such as assertions) may collapse to nothing -- e.g. if a
platform defines MDEPKG_NDEBUG for RELEASE -- and therefore trigger the
warning.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
[lersek@redhat.com: incorporate commit message update from Jordan]
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Newer GCC compilers use a default of march higher than i586
for -m32 (IA32 configuration) and this is causing generation of
instructions that are not compatible with all IA32 targets.
Specically Galileo platform support in the QuarkPlatformPkg does
not boot if GCC48 or higher is used.
This is similar to the following checkin that was done to address
this same issue for VS2012 and higher tool chains:
SHA-1: 71028ba2c4
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leroy Leahy <leroy.p.leahy@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
There are no functional changes in this patch.
The only change is to the XML format, updated using Visual Studio
Edit->Advanced->Format Document.
Different XML Schema editors use different formats for indentation and
line breaks. Visual Studio 2013 uses a two space indentation for content.
Cc: Zhu Yonghong <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Larry Hauch <larry.hauch@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
GCC for AARCH64 recognizes byte swapping load and store sequences
and may replace them with wider loads or stores combined with rev
instructions. In some cases (i.e., with GCC version 5 and later)
this may result in unaligned accesses, which are not allowed before
we turn the MMU on.
So build any modules or static libraries that may execute with the MMU
off with -mstrict-align. Other modules don't need this switch, so we
can remove it from the CLANG35/AARCH64 common CC flags.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19638 6f19259b-4bc3-4df7-8a09-765794883524
This introduces a special .c to .obj build rule for GCC/AARCH64 that
takes into account additional compiler flags that have been specified
via *_*_*_CC_XIPFLAGS. These will be passed after (and in addition to)
the ordinary CC_FLAGS.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19637 6f19259b-4bc3-4df7-8a09-765794883524
The Clang preprocessor may rely on builtin defines that are target
dependent, so we should add the -target argument also when invoking
the preprocessor directly.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19584 6f19259b-4bc3-4df7-8a09-765794883524
Since we are combining Clang with the GNU linker, make that explicit in
the target triplet. This affects certain builtin defines and other compiler
behavior that may be unspecified otherwise.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19583 6f19259b-4bc3-4df7-8a09-765794883524
This extends the existing CLANG35 toolchain definition with support for
building for the ARM architecture. In order to be able to reuse the existing
ARM GCC definitions as much as possible, the following changes have been
made to the existing ARM GCC support:
- the -mapcs option has been removed; it is a no-op under Thumb (our default)
and we use AAPCS (-mabi=aapcs) anyway
- the -mword-relocations option has been moved from GCC_ARM_CC_FLAGS to
the GCC4x specific option: CLANG does not support it, and uses '-mllvm
-marm-use-movt=0' instead.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19284 6f19259b-4bc3-4df7-8a09-765794883524
Up until SVN r18540, GenFw created invalid PE/COFF binaries for the ARM
architecture, by allowing PE/COFF .data sections to appear at offsets
that were not aligned to the global PE/COFF section alignment. The
reason for this was that the relocation metadata emitted by RVCT's
armlink only contains dynamic absolute relocations, so it is impossible
to recalculate relative relocations between .text and .data, and so the
relative offset between the two needs to be preserved.
Since r18540, we do align .data to the PE/COFF section alignment,
resulting in potentially corrupt PE/COFF binaries unless .data happens
to appear at a 32-byte aligned offset. So let's introduce a RVCT scatter
file that sets this alignment for the ELF .data section (and subsequent
.bss section).
At the same time, set the start offset to 0x220 bytes (which is the size
of our 32-bit PE/COFF header) so that the memory layouts are identical
between ELF and PE/COFF. Also add a 4 KB aligned version that can be
used to build DXE_RUNTIME_DRIVER modules with runtime memory protection
enabled.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19235 6f19259b-4bc3-4df7-8a09-765794883524
The default behavior of the GCC compiler is to emit uninitialized globals
with external linkage into a COMMON section, where duplicate definitions
are merged. This may result in unexpected behavior, since global variables
defined under the same name in different C files may not refer to the same
logical data item.
For instance, the definitions of EFI_EVENT mVirtualAddressChangeEvent that
[used to] appear in the following files:
CryptoPkg/Library/BaseCryptLib/SysCall/RuntimeMemAllocation.c
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableDxe.c
will be folded into a single instance of the variable when the latter
module includes the former library, which can lead to unexpected results.
Even if some may argue that there are legal uses for COMMON allocation, the
high modularity of EDK2 combined with the low level of awareness of the
intracicies surrounding common allocation and the generally poor EDK2
developer discipline regarding the use of the STATIC keyword* make a strong
case for disabling it by default, and re-enabling it explicitly for packages
that depend on it.
So prevent GCC from emitting variables into the COMMON section, by passing
-fno-common to the compiler, and discarding the section in the GNU ld linker
script.
* Any function or variable that is only referenced from the translation unit
that defines it could be made STATIC. This does not only prevent issues
like the above, it also allows the compiler to generate better code, e.g.,
drop out of line function definitions after inlining all invocations or
perform constant propagation on variables.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19164 6f19259b-4bc3-4df7-8a09-765794883524
Older versions of binutils need all symbols to be defined when consuming
the linker script passed via the command line. So move the definition
'--defsym=PECOFF_HEADER_SIZE=...' before the '--script=...' command line
argument.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18747 6f19259b-4bc3-4df7-8a09-765794883524
As it turns out, upstream GCC only supports the AArch64 'tiny' code
model as of version 4.9. Since the default 'small' code model requires
4 KB section alignment (which is undesirable for the XIP modules),
revert GCC 4.7 and 4.8 to using the 'large' code model instead.
Reported-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18569 6f19259b-4bc3-4df7-8a09-765794883524
Instead of using the ARM builtin linker script for GNU ld, use the
new unified one instead. This will allow us to increase the section
alignment for DXE_RUNTIME_MODULEs, which is a prerequisite for
enabling the UEFIv2.5 Properties Table memory protection feature.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Michael Zimmermann <sigmaepsilon92@gmail.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18565 6f19259b-4bc3-4df7-8a09-765794883524
Disable the RVCT size optimization that may put sections at an offset
that is not aligned to their own alignment, by adding the --no_legacyalign
switch to the RVCT linker command line. This is necessary since such sections
cannot be correctly converted into PE/COFF sections without padding them at
the front, which defeats the purpose of the optimization anyway.
With the optimization gone, we can also remove the special case for ARM in
GenFw that could result in corrupt PE/COFF images to be emitted. Instead,
sections whose base address is not aligned correctly are outright rejected.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18540 6f19259b-4bc3-4df7-8a09-765794883524
The AARCH64 tiny code model produces more efficient code, since it
uses relative symbol references rather than absolute references, i.e.,
an emitted relative reference refers to the symbol directly rather
than a literal containing its 64-bit absolute address. This saves
space in the binary, and reduces the number of relocation fixups that
need to be applied by the PE/COFF loader.
So now that we support relative relocations in GenFw, move to the
tiny code model by default. Note that the large model can still be
selected by individual modules by adding -mcmodel=large to the
appropriate CC_FLAGS.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18242 6f19259b-4bc3-4df7-8a09-765794883524
VS2012 and VS2013 turn on optimizations by default that generate the
use of CMOV instruction. This is a change from previous version VS2008.
This means when you build with VS2012 or VS2013, it will generate UD
exceptions on Quark.
To resolve it, add /arch:IA32 options to not use enhanced instructions.
https://msdn.microsoft.com/en-us/library/7t5yh4fd(v=vs.140).aspx
Update the default options of VS2012 & VS2013 tool chain IA32 arch in
BaseTools\Conf\tools_def.template to make sure the generated Quark
compatibility driver.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18230 6f19259b-4bc3-4df7-8a09-765794883524
In GCC 4.7, a feature was added to the ARM backend that allows
unaligned loads and stores to be emitted. Since it is enabled by
default on ARMv6 and later CPUs, and since such code is not suitable
in our case (i.e., bare metal code), we must disable it by passing the
-mno-unaligned-access option if we are using GCC 4.7 or later.
However, this particular feature and its enabling by default have been
backported to version 4.6 by Linaro. Since the Linaro toolchains are
widely used for ARM development, and also shipped by distros such as
Ubuntu, we should disable the feature on version 4.6 as well.
Unfortunately, since the upstream version does not support the feature,
it also does not understand the -mno-unaligned-access option.
Since GCC sets the builtin #define __ARM_FEATURE_UNALIGNED to 1 when
-munaligned-access is in effect, we can force the build to fail in this
case by passing -D__ARM_FEATURE_UNALIGNED=0 on the GCC command line.
This will produce the following error message:
<command-line>:0:0: error: "__ARM_FEATURE_UNALIGNED" redefined [-Werror]
<built-in>:0:0: note: this is the location of the previous definition
and terminate the build.
This patch may cause some existing builds to fail, but they will be
builds that were previously at risk of unexpected runtime exceptions.
Those builds can also easily be switched to the GCC47 profile instead,
generating safe binaries.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18228 6f19259b-4bc3-4df7-8a09-765794883524
After the recent GNU linker script changes, the following warning is
emitted many times during the OVMF build:
BFD: <...>: warning: Empty loadable segment detected, is this intentional ?
This is caused by the fact that, now that the section layout has changed
somewhat, the .eh_frame section is assigned an ELF segment of its own,
which ends up with no contents at all after we strip the .eh_frame
section from the output. (Note that the program headers that contain the
segment information are completely irrelevant to us since the PE/COFF
conversion does not rely on them.)
Since we only retain the .eh_frame data for external debugging, and not
for things like stack unwinding or generating backtraces at runtime, we
can remedy the situation by passing -fno-asynchronous-unwind-tables on
the GCC command line. This option instructs the compiler to emit the
unwind data into a debug section called .debug_frame instead of into
.eh_frame.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Build-tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18217 6f19259b-4bc3-4df7-8a09-765794883524
The ARMGCC and ARMLINUXGCC toolchains are specific to the ARM and
AARCH64 architectures, and overlap with the toolchain configuration
that is provided by the GCC44 - GCC49 toolchains, which are defined
for all architectures.
To reduce the maintenance burden, and make it easier to keep these
different architectures aligned, remove the ARMGCC and ARMLINUXGCC
toolchains entirely.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18212 6f19259b-4bc3-4df7-8a09-765794883524
This adds support for building the AARCH64 platforms using the
Clang compiler and assembler combined with the GNU (cross-)linker.
The chosen name CLANG35 is based on version 3.5 being the oldest
supported version, but no issues are known that should prevent its
use with any later version.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18198 6f19259b-4bc3-4df7-8a09-765794883524
The long value substitution must move to the front of
HEX substitution, and updated build_rule to add --trim-long
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yingke Liu <yingke.d.liu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18170 6f19259b-4bc3-4df7-8a09-765794883524
These scripts all now have the same contents, so we only need to use
GccBase.lds. Therefore we can delete gcc-4K-align-ld-script,
gcc4.4-ld-script and gcc4.9-ld-script.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18142 6f19259b-4bc3-4df7-8a09-765794883524
Drop the GCC AARCH64 specific linker script and use the new
unified one instead.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18138 6f19259b-4bc3-4df7-8a09-765794883524
Instead of hardcoding the values for the PE/COFF header size and the
section alignment, set them on the linker command line. This factors
out these values from the various linker scripts, which will allow us
to unify them in a subsequent patch.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18134 6f19259b-4bc3-4df7-8a09-765794883524
Some toolchains, at least Fedora GCC, generate inline unwind tables in
object files. These confuses GenFw to no end, leading to build failures:
GenFw: ERROR 3000: Invalid WriteSections64(): ...
unsupported ELF EM_AARCH64 relocation 0x105.
GenFw: ERROR 3000: Invalid WriteSections64(): ...
unsupported ELF EM_AARCH64 relocation 0x0.
I am aware of no current use of these tables, so explicitly disable
their generation for aarch64.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Wei Huang <wei@redhat.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17905 6f19259b-4bc3-4df7-8a09-765794883524
Instead of relying on the builtin linker script of GNU ld, which
may vary based on binutils version (which is not tightly coupled to
the GCC version) and linker command line options, introduce a linker
script for AArch64 to be used by all GCC/binutils versions.
The script is laid out such that two ELF sections .text and .data are
created that map onto the PE/COFF with the same names. By aligning
.data to the minimum alignment of .text, and by not adding any
additional padding -which is what LD's builtin linker script does- the
relative offset between .text and .data is retained after the PE/COFF
conversion. This should prevent problems with debuggers and other
tooling that are ELF based.
Also provided is an overlay linker script that increases the alignment
of .text and .data to 64 KB. This is intended for DXE_RUNTIME_DRIVER
modules, to make them compatible with the newly introduced
Properties Table feature.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Olivier Martin <Olivier.Martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17824 6f19259b-4bc3-4df7-8a09-765794883524
Ard Biesheuvel
Shi, Steven
Laszlo Ersek
Leif Lindholm
Cinnamon Shia
Michael Kinney
Larry Hauch
Wang Yu
Eugene Cohen
Liming Gao
Yingke Liu