We're supposed to zero everything in the kernel bootparams that we don't
explicitly initialise, other than the setup_header from 0x1f1 onwards
for a precisely defined length, which is copied from the bzImage.
We're *not* supposed to just pass the garbage that we happened to find
in the bzImage file surrounding the setup_header.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14052 6f19259b-4bc3-4df7-8a09-765794883524
Boot protocol 2.05 just means that the relocatable_kernel field is present
in the header. We should actually check that it's *set*.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14051 6f19259b-4bc3-4df7-8a09-765794883524
We currently just jump to offset 0x200 in the kernel image, in 64-bit
mode. This is completely broken. If it's a 32-bit kernel, we'll be
jumping into the compressed data payload.
If it's a 64-bit kernel, it'll work... but the 0x200 offset is
explicitly marked as 'may change in the future', has already changed
from 0x100 to 0x200 in the past with no fanfare, and bootloaders are
instructed that they should look at the ELF header to find the offset.
So although it does actually work today, it's still broken in the
"someone needs to whipped for doing it this way" sense of the word.
In fact, the same bug exists in other bootloaders so the 0x200 offset
probably *is* now set in stone. But still it's only valid to use it if
we *know* it's a 64-bit kernel. And we don't. There *is* no ELF header
that we can look at when we're booting a bzImage, and we can't rely on
it having a PE/COFF header either.
The 32-bit entry point is always guaranteed to work, and we need to
support it anyway. So let's just *always* use it, in 32-bit mode, and
then we don't have to make up some horrible heuristics for detecting
32-bit vs. 64-bit kernels.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14045 6f19259b-4bc3-4df7-8a09-765794883524
2. Add “Current SecureBoot State” field to reflect current secure boot status of the platform.
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Dong Guo <guo.dong@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14042 6f19259b-4bc3-4df7-8a09-765794883524
1. Client must ignore any Advertise message that includes a Status Code option containing the value NoAddrsAvail.
2. The elapsed-time should start from the current DHCP transaction.
3. Client should not change any information about addresses the client has recorded in the IA but not included in the IA from the server.
4. Client need to update to handle the error status code UnspecFail/UseMulticast/NotOnLink/NoBinding in the Reply message from server.
5. When the client receives a Reply message in response to a Renew/ Rebind message, the client examines each IA independently. For each IA in the original Renew/ Rebind message, the client sends a Renew/ Rebind if the IA is not in the Reply message.
6. Client should uses network byte order in IANA T1/T2 option
7. Client should discard any addresses for which the preferred lifetime is greater than the valid lifetime.
Signed-off-by: Fu Siyuan <siyuan.fu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
Reviewed-by: Ouyang Qian <qian.ouyang@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14039 6f19259b-4bc3-4df7-8a09-765794883524
2. When no DELETED variable found, no variable space could be reclaimed, so just give some debug info and return EFI_SUCCESS.
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14029 6f19259b-4bc3-4df7-8a09-765794883524
1. PciCfg Read/Write doesn't support UINT64 width.
2. PciCfg2 Segment must be zero.
Move CheckParameters () to BootScriptSave.c to check parameter early.
Add code for EfiSmbusBWBRProcessCall operation, and let the SmbusLib instance to decide if it is supported or not.
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14018 6f19259b-4bc3-4df7-8a09-765794883524
SysCalls.c: Add IGNSPEC to the "sane" termios settings so that, by default, function keys and other special keys are ignored.
fvwrite.c:
Line 109: Change test to less-than zero since zero is a valid value.
Line 113: Change test to greater-than zero since we only want to loop when there are characters available.
Line 114: Force uio_resid to zero since it might have become negative on line 113.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: daryl.mcdaniel@intel.com
Reviewed-by: erik.c.bjorge@intel.com
Reviewed-by: lee.g.rosenbaum@intel.com
Reviewed-by: jaben.carsey@intel.com
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14013 6f19259b-4bc3-4df7-8a09-765794883524
Move these states from the DSDT to the SSDT. Override the default
configuration if the host has the following qemu commit:
commit 459ae5ea5ad682c2b3220beb244d4102c1a4e332
Author: Gleb Natapov <gleb@redhat.com>
Date: Mon Jun 4 14:31:55 2012 +0300
Add PIIX4 properties to control PM system states.
This patch adds two things. First it allows QEMU to distinguish
between regular powerdown and S4 powerdown. Later separate QMP
notification will be added for S4 powerdown. Second it allows
S3/S4 states to be disabled from QEMU command line. Some guests
known to be broken with regards to power management, but allow to
use it anyway. Using new properties management will be able to
disable S3/S4 for such guests.
Supported system state are passed to a firmware using new fw_cfg
file. The file contains 6 byte array. Each byte represents one
system state. If byte at offset X has its MSB set it means that
system state X is supported and to enter it guest should use the
value from lowest 3 bits.
Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14003 6f19259b-4bc3-4df7-8a09-765794883524
The ACPI 5.0 specification says:
7.3.4.4 System \_S3 State
[...]
* Dynamic RAM context is maintained.
[...]
This corresponds to the following in the PIIX4 spec:
PMCNTRL -- POWER MANAGEMENT CONTROL REGISTER (IO)
[...]
Bits[12:10] Suspend Type
[...]
001 STR (Suspend To RAM)
Also, this (ie. decimal 1) is the suspend type value that qemu recognizes
as an S3 (suspend to ram) request.
Only the value for PM1a_CNT.SLP_TYP is set (PM1b_CNT.SLP_TYP is left at
zero), since in OVMF we don't report the optional PM1b_EVT_BLK register
block to OSPM. (PM1b_EVT_BLK is defined as 0 in "Platform.h"; see "4.8.1.1
PM1 Event Registers" in the ACPI 5.0 specification.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14002 6f19259b-4bc3-4df7-8a09-765794883524
The ACPI 5.0 specification says:
7.3.4.5 System \_S4 State
[...]
* DRAM context is not maintained.
[...]
This corresponds to the following in the PIIX4 spec:
PMCNTRL -- POWER MANAGEMENT CONTROL REGISTER (IO)
[...]
Bits[12:10] Suspend Type
[...]
010 POSCL (Powered On Suspend, Context Lost)
Also, this (ie. decimal 2) is the default suspend type value that qemu
recognizes as an S4 (suspend to disk) request.
Only the value for PM1a_CNT.SLP_TYP is corrected (PM1b_CNT.SLP_TYP is left
at zero), since in OVMF we don't report the optional PM1b_EVT_BLK register
block to OSPM. (PM1b_EVT_BLK is defined as 0 in "Platform.h"; see "4.8.1.1
PM1 Event Registers" in the ACPI 5.0 specification.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14001 6f19259b-4bc3-4df7-8a09-765794883524
jljusten
lzeng14
ydong10
tye1
niruiyu
sfu5
li-elvin
erictian
lgao4
andrewfish
darylm503
jcarsey
jyao1