1. PciCfg Read/Write doesn't support UINT64 width.
2. PciCfg2 Segment must be zero.
Move CheckParameters () to BootScriptSave.c to check parameter early.
Add code for EfiSmbusBWBRProcessCall operation, and let the SmbusLib instance to decide if it is supported or not.
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14018 6f19259b-4bc3-4df7-8a09-765794883524
2. To be consistent, update PciCfgRead to support full S3BootScriptWidth(Uint8, FifoUint8 and FullUint8) like PciCfgWrite.
3. Use BuildLoopData() to get the addressStride and BufferStride to do PCI CFG operations.
4. Correct, refine and enhance some comments and debug messages.
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13987 6f19259b-4bc3-4df7-8a09-765794883524