The Microsoft Debug Port Table 2 (DBG2) specification revision
October 6, 2015 adds support for Serial Port Subtypes for ARM.
This patch adds these definitions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
The Serial Port Console Redirection Table specification Version 1.03 -
August 10, 2015 adds support for Serial Port Subtypes for ARM. These
Subtypes are described in the Table 3 of the Microsoft Debug Port Table
2 (DBG2) Specification - December 10, 2015.
This patch adds macro definitions for these.
Code at: 79678a0f39
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
These definitions are defined in SD physical layer simplified spec
and eMMC electrical standard spec.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
The definitions are defined in TCG storage core and opal spec.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
As the SMBIOS table types belong to the SMBIOS standard, they were
moved from the SMBIOS Protocol header into the SMBIOS
IndustryStandard header without the EFI_-prefix. Defines with the
EFI_-prefix have been kept in the Protocol header for
backwards-compatibility, resolving to the IndustryStandard defines.
The same has been done with the C types.
The SMBIOS table header structure had been duplicated -
SMBIOS_STRUCTURE in the IndustryStandard header and
EFI_SMBIOS_TABLE_HEADER in the Protocol file - and thus the
Protocol type was replaced with a typedef to the InudstryStandard's.
This doesn't only make it easier to maintain, but it also prevents
potential future issues as the Protocol type has been aligned, while
the standard and the IndustryStandard header declare it as
byte-packed.
This has worked well till now only because the members of the
structure do not require alignment yet.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Marvin Haeuser <Marvin.Haeuser@outlook.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Add additional HTTP 1.1 definitions that are useful in HTTP
applications, such as User-Agent, Location, and x-Auth-Token
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
The HeaderLog field of the PCIe Extended Capabilities Advanced Error
Reporting structure was incorrectly defined as a 32-bit field. The PCIe
2.1 Base Specification, section 7.10, lists this as 16 bytes, or 4
DWORDs.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Update Ipmi2.0 definitions header files for data structure
name suffix for request/response data and completion code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daocheng Bu <daocheng.bu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19484 6f19259b-4bc3-4df7-8a09-765794883524
Update BaseAddress in the SPCR structure to use
EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19456 6f19259b-4bc3-4df7-8a09-765794883524
Add common HTTP 1.1 industry standard definitions for use in HTTP
clients/applications. List includes: HTTP methods, request/response
headers, and encodings.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <elhaj@hpe.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19435 6f19259b-4bc3-4df7-8a09-765794883524
The GicVersion field is defined in ACPI 5.1 and 6.0
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Samer El-Haj-Mahmoud" <elhaj@hpe.com>
Reviewed-by: "Yao, Jiewen" <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19288 6f19259b-4bc3-4df7-8a09-765794883524
Re-add Ipmi2.0 definitions header files based on Ipmi category:
App, Storage and etc.
In V3, the file name has been changed for short.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daocheng Bu <daocheng.bu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19272 6f19259b-4bc3-4df7-8a09-765794883524
The file name is too long and with "Definitions" word
that is duplicated meanings for the header file.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daocheng Bu <daocheng.bu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19231 6f19259b-4bc3-4df7-8a09-765794883524
Add Ipmi2.0 definitions head file based on Ipmi category:
App, Storage and etc.
In V2, correct #include IndustryStandard/IpmiNetFnSensorEventDefinitions.h,
and remove trailing space.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daocheng Bu <daocheng.bu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19125 6f19259b-4bc3-4df7-8a09-765794883524
So that other module can also refer to them.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Zeng, Star" <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18674 6f19259b-4bc3-4df7-8a09-765794883524
Add a new module MemoryOverwriteRequestControlLock to register VarCheck handler to enforce MorLock Policy.
Only SMM version is added because MOR is only supported in SMM variable case.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
Reviewed-by: "Chao Zhang" <chao.b.zhang@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18092 6f19259b-4bc3-4df7-8a09-765794883524
SlotTypeAgp8X should be used per SMBIOS spec.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Elvin Li <elvin.li@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16917 6f19259b-4bc3-4df7-8a09-765794883524
This adds PCI Express extended capabilities structures. These structures are required for enhancements to the shell.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15076 6f19259b-4bc3-4df7-8a09-765794883524
Sami Mujawar
Feng Tian
Eric Dong
Marvin Häuser
Ruiyu Ni
Samer El-Haj-Mahmoud
jiewen yao
Daocheng Bu
Samer El-Haj-Mahmoud
Heyi Guo
Samer El-Haj-Mahmoud
Qiu Shumin
Chao Zhang
Elvin Li
Samer El-Haj-Mahmoud
jaben carsey
Star Zeng
Samer El-Haj-Mahmoud elhaj
jyao1