This PCD ensures the transition from EL3 to EL2 in ArmPlatformPkg/Sec.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14579 6f19259b-4bc3-4df7-8a09-765794883524
- Setting DVI fails on VE models. The FVP models behave the same.
These have updated SYS ID numbers and they need to be added to the
driver.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14564 6f19259b-4bc3-4df7-8a09-765794883524
ARM Versatile Express TC2 Core Tile has two profiles: the 1GB DRAM core tile or
the 2GB DRAM core tile profiles.
By default UEFI assumes, it is the 1GB core tile. In case of 2GB DRAM it declares
this additional 1GB resource system memory to UEFI. But the previous code did
not map this memory in the MMU Page Table.
So, the memory was allocatable by UEFI modules, but was not accessible by the CPU
(because not mapped).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Leif Lindholm <Leif.Lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14449 6f19259b-4bc3-4df7-8a09-765794883524
The syntax '!ifdef $(MACRO)' is deprecated and should be replaced by '!ifdef MACRO'.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14440 6f19259b-4bc3-4df7-8a09-765794883524
This patch changes the Versatile Express A9 BSP to build with
EDK2_ARMVE_STANDALONE=1 as the default option.
The user may then specify zero if they wish to build the non-standalone
version.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14439 6f19259b-4bc3-4df7-8a09-765794883524
LibResetSystem was performing a cold reboot for both reboot and
shutdown.
This patch updates LibResetSystem to pass SYS_CFG_SHUTDOWN to the
microcontroller when called wit EfiResetShutdown.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14438 6f19259b-4bc3-4df7-8a09-765794883524
The size of the FDs did not match the FD layout.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14426 6f19259b-4bc3-4df7-8a09-765794883524
The FDT name are the one from Linaro release.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14348 6f19259b-4bc3-4df7-8a09-765794883524
This function allows platform to do any specific actions prior to
the start the PEI phase.
For instance, this function could be used by some platforms to initialize clocks that
are required at the early stage of the PEI phase.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Acked-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14347 6f19259b-4bc3-4df7-8a09-765794883524
ArmPlatformGetPrimaryCoreMpId returns the MPID of the primary core.
The primary core might not be known at build time (eg: the platform allows
the boot CPU to be changed through board config).
This function is used during the secondary core stack initialization to know
the position of the secondary core in the SoC.
A secondary core that is at the position N, with N greater than the primary
core position, will be at the position N-1 in the list of secondary stacks
(the primary core has its own separate bigger stack).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Acked-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14345 6f19259b-4bc3-4df7-8a09-765794883524
Checking if a core if the primary/boot core used to be done with the macro
IS_PRIMARY_CORE().
Some platforms exposes configuration registers to change the primary core.
Replacing the macro IS_PRIMARY_CORE() by ArmPlatformIsPrimaryCore() allows
some flexibility in the way to check the primary core.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Ryan Harkin <ryan.harkin@linaro.org>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14344 6f19259b-4bc3-4df7-8a09-765794883524
ArmPlatformGetAdditionalSystemMemory() function wasn't used anywhere in UEFI.
This patch deletes it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14270 6f19259b-4bc3-4df7-8a09-765794883524
Only the Cortex A9 based platforms have an external L2 controller.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14269 6f19259b-4bc3-4df7-8a09-765794883524
Setting bit4 of SCC register 48 now triggers the erasing of the memory region
reserved for variable storage in NOR flash and the restoration of the default
headers in flash.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14177 6f19259b-4bc3-4df7-8a09-765794883524
Formerly only the header was defined and it was expecting the SerialPortExtLib
interface to be implemented by SerialPortLib if supported. This behaviour was
not conform to the EDK2 framework.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14173 6f19259b-4bc3-4df7-8a09-765794883524
A ArmSmcLib Null implementation has also been added for CPU without the ARM Security
Extension (Trustzone support).
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14164 6f19259b-4bc3-4df7-8a09-765794883524
The new functions are:
- ArmPlatformStackSet(IN UINTN StackBase, IN UINTN MpId, IN UINTN PrimaryStackSize, IN UINTN SecondaryStackSize);
- ArmPlatformStackSetPrimary(IN UINTN StackBase, IN UINTN MpId, IN UINTN PrimaryStackSize, IN UINTN SecondaryStackSize);
- ArmPlatformStackSetSecondary(IN UINTN StackBase, IN UINTN MpId, IN UINTN PrimaryStackSize, IN UINTN SecondaryStackSize);
The stack topology can be changed by implementing a new ArmPlatformStackLib
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13774 6f19259b-4bc3-4df7-8a09-765794883524
On ARM PLatforms, there is no standard way to know how many cores are
available on the platform.
This PCD is expected to contain this number.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13769 6f19259b-4bc3-4df7-8a09-765794883524
This library could be used before the UEFI phases to expose the CPU state
when an unexpected exception interrupt the firmware.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13767 6f19259b-4bc3-4df7-8a09-765794883524
In case a DebugAgent library is supported for a specific debugger, we would
expect the exception be caught by DebugAgentLib.
The DebugAgentBaseLib exposes the cause of the exception to the user in the
Serial Terminal.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13765 6f19259b-4bc3-4df7-8a09-765794883524
The function only used in Secure Firmware used to be mixed with
the Non-Secure/Normal functions in ArmPlatformLib.
When the Secure Firmware was not required for some platforms (eg:
BeagleBoard), these functions were empty functions.
This new interface has been created to clean the ArmPlatformLib
interface between the SEC and PEI phases.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13260 6f19259b-4bc3-4df7-8a09-765794883524
The 'NS' bit must only be set in Secure world to define the Non-Secure region
of the Non-Secure World.
This bit must not be set in Non-Secure World.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13252 6f19259b-4bc3-4df7-8a09-765794883524
- ArmPlatformNormalInitialize() has been renamed into ArmPlatformInitialize()
- Make the function be called at the early stage of the PEI phase as some
platforms require their interconnects or clocks to be initialize before any
access to Timers or UARTs.
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13245 6f19259b-4bc3-4df7-8a09-765794883524
BaseTools now raises an error when a PCD is not declared in a DEC.
This change:
- Remove undeclared PCDs
- Add PCD declaration to DEC file
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13195 6f19259b-4bc3-4df7-8a09-765794883524
The GICD_IGROUPR0 is banked for each connected processor. It means the
Non-Secure bits for the PPIs (Private Peripheral Interrupts) must be
configured for every processor.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13135 6f19259b-4bc3-4df7-8a09-765794883524
This NULL implementation should not affect the existing code flow and
avoid the builds to be broken by a missing dependency.
In a longer term, an implementation of CpuExceptionHandlerLib should
be provided for ARM architecture.
Signed-off-by: oliviermartin
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13103 6f19259b-4bc3-4df7-8a09-765794883524
CFI Flash differentiates DeviceBaseAddress with BlockAddress in
its protocol. The DeviceBaseAddress was not considered in the
previous version of this driver.
This version also fixes some bugs in the implementation of the
CFI protocol.
This new version also uses the Boot Mode Hob to reinitialized the
FVB when Boot Mode is equal to BOOT_WITH_DEFAULT_SETTINGS.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13064 6f19259b-4bc3-4df7-8a09-765794883524
The MMC controller is accessible through the ARM RTSM model.
A filesystem can be added on a MMC file to be accessible through the
UEFI firmware running on RTSM.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12862 6f19259b-4bc3-4df7-8a09-765794883524
This library interface is not related to adding extra action to debug support.
But it adds extra action to the ArmPlatform/Sec component.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12861 6f19259b-4bc3-4df7-8a09-765794883524
The Variable PEI and RuntimeDxe drivers were using the attribute 'HeaderLength' of
EFI_FIRMWARE_VOLUME_HEADER without checking if a Firmware Volume Header was existing at
the base address.
In case the Firmware Volume Header does not exist or is corrupted, the attribute 'HeaderLength'
is a non valid value that can lead to a non valid physical address when accessing produces an
access error.
Signed-off-by: oliviermartin
Reviewed-by: niruiyu
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12836 6f19259b-4bc3-4df7-8a09-765794883524
Memory map remapping is a platform specific feature only enabled by some platforms.
Instead of keeping this function empty for most platforms, the function has been
removed. This feature can easily fit in any other ArmPlatformLib function.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12632 6f19259b-4bc3-4df7-8a09-765794883524
This change does not make possible to disable Trustzone from the firmware.
The firmware has to be built for Trustzone support enabled or disabled.
The memory page table are now defined as 'Normal Memory' in any case.
Except for RTSM Device Memory which as to be Secure Device Memory due
to a RTSM bug.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12452 6f19259b-4bc3-4df7-8a09-765794883524
Every CPUs have their own initialization requirements.
This library allows to allows to abstract these initialization requirements
into the ARM Platform common components.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12448 6f19259b-4bc3-4df7-8a09-765794883524
The denomination 'Normal' was used to make reference to the 'Normal'
or 'Non Secure' or 'Non Trusted' world.
To avoid confusion, this prefix has been removed from PCDs to define
the normal world.
The PCDs explicitely related to the Secure/Trusted World continue to
have the 'Sec' prefix.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12416 6f19259b-4bc3-4df7-8a09-765794883524
In the previous version, every cores had the same stack size.
To avoid to waste memory with secondary core stacks, the primary core stack
size is now different from the secondary cores stack size.
These are the Stack PCDs and their default values:
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x10000
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12415 6f19259b-4bc3-4df7-8a09-765794883524
This library is the interface for the ARM Generic Interrupt Controller
Architecture Specification.
ARM Platform can use any GIC controller (not necessary PL390 GIC).
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12411 6f19259b-4bc3-4df7-8a09-765794883524
This library that uses the DebugAgentLib interface prints the loaded addresses
of the SEC and PEI_CORE module using PeCoffExtraActionLib.
Note: Because there is no PE loader for these XIP modules, PeCoffExtraActionLib is not invoked.
This library scans the firmware volume to find these modules and calculate their fixup loaded
addresses used to load their symbols in the debugger.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12023 6f19259b-4bc3-4df7-8a09-765794883524
In the former memory model, the UEFI firmware was expected to be located
at the top of the system memory. Stacks & Pi memory regions were set below
the firmware.
On some platform, the UEFI firmware could be shadowed by the ROM firmware
(case of the BeagleBoard) and in some cases the firmware is copied at the
beginning of the system memory.
With this new memory model, stack and Pi/DXE memory regions are set at the
top of the system memory wherever the UEFI firmware is located in the memory
map.
Because DXE core does not support shadowed firmwares, the system memory covered
by the UEFI firmware is marked as 'Non Present' to avoid to be overlapped by
DXE allocations.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11992 6f19259b-4bc3-4df7-8a09-765794883524
The PcdStandalone is a PCD ARM Ltd uses to make the difference between a standalone UEFI (boot
from cold boot to Boot Manager without user intervention) and a Debug UEFI firmware (the firmware
engineer has to copy the Normale World image into the DRAM to enable his/her firmware).
By coping the firmware into DRAM in the non standalone version it is much faster than reflashing
the NOR Flash after each build.
ArmPlatformSecExtraAction() function is called just before the Sec module jump to normal world.
The platform firmware can run extra actions at this stage.
The 'ARM Standalone' concept has moved to the implementation of ArmPlatformSecExtraAction() for
the ARM development boards (in ArmPlatformPkg/Library/DebugSecExtraActionLib).
ArmPlatformPkg: Enable DebugAgentLib in Sec and PrePeiCore
ArmPlatformPkg: Fix line endings in some source files
Use CR+LF line endings as defined by the EDK2 coding convention
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11991 6f19259b-4bc3-4df7-8a09-765794883524
The $(BUILD_TARGETS) macro was used to make the difference between DEBUG and
RELEASE builds. The $(TARGET) macro should be used instead.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11961 6f19259b-4bc3-4df7-8a09-765794883524
The idea is to keep ArmPkg responsible for the ARM architectural modules and ArmPlatformPkg
the ARM development platform packages (with their respective drivers).
ArmPlatformPkg: Reduce driver dependency on ArmPlatform.h
- Move some driver definitions from C-Macro to PCD values
- Unify PCD driver namespace
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11956 6f19259b-4bc3-4df7-8a09-765794883524
This module is enabled for ArmRealViewEb and ArmvExpress builds
when the macro EDK2_SKIP_PEICORE is passed to the build system.
The PrePi module can be used when the DRAM has already been initialized
by the SEC phase/1st stage boot loader and no call to external PEIM is
required.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11953 6f19259b-4bc3-4df7-8a09-765794883524
Feature PCDs cannot be used in assembly files.
The PcdStandalone PCD is needed in one of the assembly file of the
ArmPlatformPkg/PrePi module.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11952 6f19259b-4bc3-4df7-8a09-765794883524
The code specific to the secure intialization has been moved into a
separate file that is not linked with the Normal world version of the
library.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11810 6f19259b-4bc3-4df7-8a09-765794883524
With this change, we now have these following PCDs values to define the
location of the Secure and Normal firmwares:
- gArmTokenSpaceGuid.PcdSecureFd(BaseAddress|Size)
- gArmTokenSpaceGuid.PcdSecureFv(BaseAddress|Size)
- gArmTokenSpaceGuid.PcdNormalFd(BaseAddress|Size)
- gArmTokenSpaceGuid.PcdNormalFv(BaseAddress|Size)
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11806 6f19259b-4bc3-4df7-8a09-765794883524
The size of this memory is controlled by a PCD. The Global Variable in this regsion are defined by their offset.
This memory region can be use to store the PEI Services Table Pointer.
Update the PeiServicesTablePointerLib to use this region instead of PcdPeiServicePtrAddr.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11803 6f19259b-4bc3-4df7-8a09-765794883524
The UEFI Specification defines some requirement related to the Boot Manager.
This new version of the BDS support most of the features:
- TimeOut, BootNext, BootOrder, Boot### environment variable for boot device selection
- ConOut. ConIn, ConErr environment variables for console intialization
- Boot EFI application defined by a Device Path
- Support removable devices
- Support FileSystem, MemMap, PXE and TFTP boot devices
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11800 6f19259b-4bc3-4df7-8a09-765794883524
The UEFI platform designer had to add '%a' to their EBL prompt PCD to print out the path
in the shell.
This change makes the addition of the path automatically after the platform specific value
in the EBL shell.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11798 6f19259b-4bc3-4df7-8a09-765794883524
This driver implements the interface for the PL111 Lcd controller.
The LcdPlatformLib allows to set the platform specific requirements
needed by the platform for setting the LCD (oscillators, etc).
ArmPlatformPkg/ArmVExpressPkg: Implement LcdPlatformLib
This library exports the supported resolutions. It also allocates the
memory for the framebuffer and send the correct settings to the VExpress
motherboard microcontroller.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11786 6f19259b-4bc3-4df7-8a09-765794883524
The purpose of this library is to create an interface to communicate
with the platform micro-controller.
It abstracts the communication protocol (eg: SPI, UART, etc) between
the application processor and the micro-controller.
ArmPlatformPkg/ArmVExpressPkg: Implement ArmPlaformSysConfigLib
This implementation allows to communicate with the microcontroller of the
Versatile Express motherboard.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11785 6f19259b-4bc3-4df7-8a09-765794883524
This file contains the ARM Versatile Express motherboard definitions.
It allows to avoid duplication between different platforms based on ARM VExpress
motherboard.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11749 6f19259b-4bc3-4df7-8a09-765794883524
This NOR Flash driver can be reused for other platform (eg: ARM Realview EB).
To make this driver reusable on other platforms the NorFlashPlatformLib library
has been created to abstract the platform specific bits such as the pre-requirements
steps to the initialization and the geometry of the NOR Flash regions.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11746 6f19259b-4bc3-4df7-8a09-765794883524
The SP804 drivers must not consider the presence of the SP810 System Controller
on the platform. The SP810 was used to enable the SP804 Dual Timers on ArmVExpress.
It is the role of the Platform specific driver to enable to the SP804 dual timers
if required.
The former SP810 initialization code has moved to ArmPlatformLib for ArmRealViewEb
and ArmVersatileExpress.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11744 6f19259b-4bc3-4df7-8a09-765794883524
This library makes the interface with the PL011 UART controller.
This library can be linked to different types of driver (Serial Console,
debugger, etc) using PL011 UART controller.
ArmPlatformPkg/PL011SerialPortLib: Use Drivers/PL011Uart
Remove the direct accesses to the PL011 UART controller to use the PL011Uart
library.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11743 6f19259b-4bc3-4df7-8a09-765794883524
Some platforms require some of their controllers to be initialized in Secure world.
This function make the difference between Secure and Normal world platform initialization.
ArmPlatformPkg/ArmPlatformLib: Introduce ArmPlatformNormalInitialize
Contain the code that initializes platform controllers that would be initialized in Normal World
by PlatformPei.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11591 6f19259b-4bc3-4df7-8a09-765794883524
A dummy padding was added before the Reset Vectors to force the alignment on a
32 bytes boundary in XIP code.
The correct fix is to define the alignment in the FDF file.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11588 6f19259b-4bc3-4df7-8a09-765794883524
Formerly, each platform was responsible to declare the location of its UEFI memory
region (used by PEI and DXE Foundations).
The ArmPlatformLib was also declaring every region of its partitionned system memory
with a System Resource HOB.
In this new model, the MemoryInit expects the system memory to be declared with the
PCDs gArmTokenSpaceGuid.PcdSystemMemoryBase/Size.
These PCDs declare the largest continuous DRAM region. Additional regions can be
declared with the ArmPLatformLib function ArmPlatformGetAdditionalSystemMemory().
Now, it is the PEIM that partitions the system memory for every platform. It installs
a region of the size PcdSystemMemoryUefiRegionSize (default 128MB) for the PEI permanent
memory at the top of the DRAM region.
And a region of gArmPlatformTokenSpaceGuid.PcdSystemMemoryFixRegionSize (default 128MB)
is declared at the base of the system memory. This region is used for the allocation that
requires fixed address or have some constraints on their locations.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11481 6f19259b-4bc3-4df7-8a09-765794883524
This function is responsible to handle all the specific platform code that must
be run in secure world to initialize some controllers.
ArmPlatformPkg/Sec: Move the L2x0 initialization to ArmPlatformLib
The L2x0 controller must be initialized in secure world. Move its initialization
into the ArmPlatformInitialize() of the Cortex A9x4 Core Tile PlatformLib.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11476 6f19259b-4bc3-4df7-8a09-765794883524
Exception errors and early print statements must be also print out in Release builds.
Replace the DEBUG() macro by the SerialPortWrite() function.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11474 6f19259b-4bc3-4df7-8a09-765794883524
The Variable Storage is now formated by the NOR Flsah driver.
Force the NOR Flash driver to be loaded before the Variable Service
DXE driver. And check if the Non Volatile Storage exists in NOR flash.
If not, the driver writes the correct header.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11471 6f19259b-4bc3-4df7-8a09-765794883524
Olivier Martin
Harry Liebel
Ryan Harkin
oliviermartin
andrewfish