Commit Graph

3658 Commits

Author SHA1 Message Date
Ard Biesheuvel c857042471 MdePkg: introduce MM communicate 2 protocol
Add the protocol definition of the MM communicate 2 protocol,
which has been introduced by version 1.7 errata A of the PI spec.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2020-05-12 19:23:44 +00:00
Abner Chang 4e74764245 MdePkg/BaseSafeIntLib: Add RISCV64 arch for BaseSafeIntLib.
Add RISCV64 arch for BaseSafeIntLib library.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Helmut Schaefer <daniel.schaefer@hpe.com>
2020-05-07 03:17:15 +00:00
Abner Chang 8c43227c64 MdePkg/BaseSynchronizationLib: RISC-V cache related code.
Support RISC-V cache related functions.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07 03:17:15 +00:00
Abner Chang 3fd8800954 MdePkg/BaseCpuLib: RISC-V Base CPU library
implementation.

Implement RISC-V CPU related functions in BaseCpuLib.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07 03:17:15 +00:00
Abner Chang 54a3d5ec48 MdePkg/BasePeCoff: Add RISC-V PE/Coff related code.
Support RISC-V image relocation.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07 03:17:15 +00:00
Abner Chang 089e9c19a8 MdePkg/BaseIoLibIntrinsic: Rename IoLibArm.c=>IoLibNoIo.c
RISC-V MMIO library instance.
IoLibArm.c in fact implements a generic Mmio-only (and ANSI
C compliant), so rename it to better reflect this.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07 03:17:15 +00:00
Abner Chang 38e72aa877 MdePkg/BaseCacheMaintenanceLib:
RISC-V cache maintenance implementation.

Implement RISC-V cache maintenance functions in
BaseCacheMaintenanceLib.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07 03:17:15 +00:00
Abner Chang 7601b251fd MdePkg/BaseLib: BaseLib for RISCV64 architecture
Add RISC-V RV64 BaseLib functions.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07 03:17:15 +00:00
Abner Chang d3abb40d77 MdePkg/Include: RISC-V definitions.
Add RISC-V processor related definitions.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07 03:17:15 +00:00
Abner Chang 1510d6a391 MdePkg: Add RISC-V RISCV64 binding
Add RISCV64 sections in MdePkg.dec and RISCV64 ProcessorBind.h

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
2020-05-07 03:17:15 +00:00
Guomin Jiang c6a60cf4b9 MdePkg/Security2: Mark the File parameter as OPTIONAL.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2652

According to the description, the File is OPTIONAL and can be NULL.

Signed-off-by: Guomin Jiang <guomin.jiang@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>

Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-04-22 01:55:34 +00:00
Michael Kubacki 3b5a58c5f0 MdePkg/BaseLib: Add linked list iteration macros
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1959

The macros EFI_LIST_FOR_EACH and EFI_LIST_FOR_EACH_SAFE have been
duplicated across several drivers. These macros have proven useful and
established a commonly used pattern for linked list iteration.

This change defines the macros in BaseLib.h alongside other generic linked
list macros and functions.

Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
2020-04-21 02:20:51 +00:00
Pierre Gondois c884b23ac4 MdePkg: Add AML FieldList OpCode definitions
The ACPI specification, version 6.3, January 2019,
defines the Named Objects Encoding for FieldElements
in section '20.2.5.2 Named Objects Encoding'.
FieldElements can be one of the following:
NamedField | ReservedField | AccessField |
ExtendedAccessField | ConnectField

Some of these keywords are starting with an opcode,
allowing to identify their type.
E.g.: ReservedField := 0x00 PkgLength

This patch adds these FieldElement opcodes definitions to
the list of AML Opcode definitions.

Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
2020-04-17 03:36:43 +00:00
Zurcher, Christopher J 8c654bb3ec MdePkg/UefiScsiLib: Set FUA bit for synchronous SCSI Write operations
The FUA (Force Unit Access) bit forces data to be written directly to
disk instead of the write cache. This prevents data from being lost if a
shutdown or reset is requested immediately after a SCSI write operation.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Christopher J Zurcher <christopher.j.zurcher@intel.com>
2020-04-15 01:13:04 +00:00
Zhiguang Liu bd6aa93296 MdePkg DebugLib: Enable FILE NAME as DEBUG ASSERT for CLANG
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1548
For clang compiler, This change will make the generated image not include the
absolute file path. If so, the generated debug image can be reproduced in the
different root directory. Also, it will reduce the size of debug image size.
To do so, use __FILE_NAME__ macro to replace __FILE__. __FILE_NAME__ is
Clang-specific extension that functions similar to __FILE__ but only renders
the last path component (the filename) instead of an invocation dependent full
path to that file, and __FILE_NAME__ is introduced since clang 9.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
2020-04-13 07:17:27 +00:00
Ard Biesheuvel c5824c27be MdePkg: remove PropertiesTable GUID
Remove the GUID definition that describes the deprecated properties table,
which is no longer generated by the DXE core.

Link: https://bugzilla.tianocore.org/show_bug.cgi?id=2633
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Acked-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
2020-04-07 08:15:46 +00:00
Daniel Schaefer 9b2b0942f1 MdePkg/DxeServicesLib: Add RISC-V architecture
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562

Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

Cc: Abner Chang <abner.chang@hpe.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
2020-04-03 17:09:12 +00:00
Abner Chang e576dfadd6 MdePkg/Include: Add RISC-V related definitions EDK2 CI.
HTTP/PXE boot RISC-V related definitions for EDK2 CI.

BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Maciej Rabeda <maciej.rabeda@linux.intel.com>

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
2020-04-03 17:09:12 +00:00
GuoMinJ d4e2909bfc MdeModulePkg: Remove gEfiFormBrowserExProtocolGuid Protocol Guid
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2145

Replace the gEfiFormBrowserExProtocolGuid with
gEdkiiFormBrowserExProtocolGuid, remove the unnecessary declaration.

Signed-off-by: GuoMinJ <newexplorerj@gmail.com>
Acked-by: Hao A Wu <hao.a.wu@intel.com>
2020-03-30 01:13:49 +00:00
Guomin Jiang 090e267b5b MdePkg/UnitTestBaseLib: Add check for pointer BinData
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2531

AllocatePool may fail and BinData may be invalid, check it before use.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
2020-03-27 02:03:41 +00:00
Javeed, Ashraf 1b6b4a83e1 MdePkg/PciExpress40.h: DVSEC definition missing
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2598

All registers definition of DVSEC are defined as per the PCI Express Base
Specification 4.0 chapter 7.9.6.

Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-03-19 00:48:02 +00:00
Siyuan Fu 5b45b44e6f MdePkg: Remove FIT table industry standard header file.
Commit c7c964b and dd01704 add header file for FIT table and update
MpInitLib to support FIT based microcode shadow operation. There are
comments that FIT is Intel specific specification instead of industry
standard, which should not be placed in EDK2 MdePkg and UefiCpuPkg.
This patch removes the header file added by c7c964b.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2020-02-14 04:31:18 +00:00
Krzysztof Koch a67efa3b22 MdePkg: Add PCCT table signature definition
The Platform Communications Channel Table (PCCT) was defined in:
ACPI Specification Version 5.0, Errata A - Published Nov. 13, 2013.

Starting from the Acpi50.h header file, there are definitions
describing the table but a macro with the table's signature is missing.

This patch adds the definition of Platform Communications Channel
Table's signature to the relevant ACPI header files.

Signed-off-by: Krzysztof Koch <krzysztof.koch@arm.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
2020-02-13 07:34:06 +00:00
Michael D Kinney 02b7b861b1 MdePkg/BaseSafeIntLib: Fix VS20xx IA32 link failures
https://bugzilla.tianocore.org/show_bug.cgi?id=2525

SafeUint64Mult() looks for 64-bit overflows and performs
several 32-bit multiples with 64-bit results to check for
all possible overflow conditions.  IA32 builds using VS20xx
with optimizations enabled are producing a reference to
the _allmull intrinsic.

The fix is to use MultU64x64() instead of '*' for
these operations.  These are safe because the inputs
are guaranteed to have the upper 32-bits clear, which
means MultU64x64() can never overflow with those inputs.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-02-13 01:42:50 +00:00
Felix Polyudov e465aae055 MdePkg: Add PCI Express 5.0 Header File
The header includes Physical Layer PCI Express Extended Capability
definitions based on section 7.7.6 of PCI Express Base Specification 5.0.

Signed-off-by: Felix Polyudov <felixp@ami.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-02-12 01:18:33 +00:00
Michael D Kinney 27fb01a0b0 MdePkg: Disable EBC for unit tests in MdePkg.dsc
https://bugzilla.tianocore.org/show_bug.cgi?id=2514

Update the target unit tests in MdePkg.dsc to only
build for IA32, X64, ARM, AARCH64.  This disables
EBC for these components.  The UnitTestLib class
uses vararg macros that the EBC compiler does not
support.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Bret Barkelew <Bret.Barkelew@microsoft.com>
2020-02-11 23:57:44 +00:00
Matthew Carlson 67ead55b35 MdePkg/SmBios.h: Add two additional DWORD for smbios 3.3.0 type17
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2482

Refer to DSP0134_3.3.0.pdf, there are two additional DWORD added
for type 17. One is "Extended Speed", the other is "Extended
Configured Memory Speed". The lack of these field may cause strange
error in some operating systems.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-02-11 05:53:48 +00:00
Antoine Coeur 788421d5a7 MdePkg/Register: Fix various typos
Fix various typos in comments and documentation.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Antoine Coeur <coeur@gmx.fr>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com>
Message-Id: <20200207010831.9046-29-philmd@redhat.com>
2020-02-10 22:30:07 +00:00
Antoine Coeur 43516263a8 MdePkg/Ppi: Fix various typos
Fix various typos in comments and documentation.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Antoine Coeur <coeur@gmx.fr>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com>
Message-Id: <20200207010831.9046-28-philmd@redhat.com>
2020-02-10 22:30:07 +00:00
Antoine Coeur fae43d06dd MdePkg/Library/Smm: Fix various typos
Fix various typos in comments and documentation.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Antoine Coeur <coeur@gmx.fr>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com>
Message-Id: <20200207010831.9046-27-philmd@redhat.com>
2020-02-10 22:30:07 +00:00
Antoine Coeur a8ecf980c0 MdePkg/Library/Pci: Fix various typos
Fix various typos in comments and documentation.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Antoine Coeur <coeur@gmx.fr>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com>
Message-Id: <20200207010831.9046-26-philmd@redhat.com>
2020-02-10 22:30:07 +00:00
Antoine Coeur c1d8b697cf MdePkg/Library/Dxe: Fix various typos
Fix various typos in documentation, comments and strings,
and remove the duplicated 'the'.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Antoine Coeur <coeur@gmx.fr>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com>
Message-Id: <20200207010831.9046-25-philmd@redhat.com>
2020-02-10 22:30:07 +00:00
Antoine Coeur b219e2cd4c MdePkg/IndustryStandard: Fix various typos
Fix various typos in comments and documentation.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Antoine Coeur <coeur@gmx.fr>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com>
Message-Id: <20200207010831.9046-24-philmd@redhat.com>
2020-02-10 22:30:07 +00:00
Michael D Kinney e50c2bb383 MdePkg/Test: Add SafeIntLib and BaseLib Base64 unit tests
https://bugzilla.tianocore.org/show_bug.cgi?id=2505

* Add unit tests for SafeIntLib class
* Add unit tests for BaseLib Base64 conversion APIs.
* Add Test/MdePkgHostTest.dsc -to build host based unit
  tests
* Update MdePkg.dsc to build target based tests for
  SafeIntLib and BaseLib
* Update MdePkg.ci.yaml to build and run host based
  tests for SafeIntLib and BaseLib

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Acked-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Bret Barkelew <Bret.Barkelew@microsoft.com>
2020-02-07 19:18:53 +00:00
Bret Barkelew b238ce28f8 MdePkg/Include/Library: Add UnitTestLib class
https://bugzilla.tianocore.org/show_bug.cgi?id=2505

Add UnitTestLib class to MdePkg that provides services
and macros to implement unit tests.  These services and
macros support the following features:

* Create a Unit Test Framework
* Add a Unit Test Suite to a Unit Test Framework
  + Support optional step that executes before a Unit
    Test Suite is started.
  + Support optional step that executes after a Unit
    Test Suite is finished.
* Add a Unit Test to a Unit Test Suite
  + Support optional step that executes before a Unit
    Test is started.
  + Support optional step that executes after a Unit
    Test is finished.
* Run all unit tests added to a Unit Test Framework
* Save Unit Test Framework state to persistent storage
* Support assertion checks in a unit test for TRUE, FALSE,
  EQUAL, MEM_EQUAL, NOT_EFI_ERROR, STATUS_EQUAL, and NOT_NULL.
* Support generation of log messages at ERROR, WARN, INFO,
  and VERBOSE levels.

Cc: Sean Brogan <sean.brogan@microsoft.com>
Cc: Bret Barkelew <Bret.Barkelew@microsoft.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Bret Barkelew <Bret.Barkelew@microsoft.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
2020-02-07 19:18:53 +00:00
Liming Gao 8778ee616a MdePkg Base.h: Use correct style to check macro _MSC_VER value
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-02-06 09:12:07 +00:00
Liu, Zhiguang 21821933ae MdePkg: Avoid using __clang__ to specify CLANGPDB
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2415

Avoid using __clang__ to specify CLANGPDB because this macro is also defined
in CLANG38 and this causes CLANG38 build failure.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>

Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-02-06 08:55:58 +00:00
Xu, Wei6 48997fe4d3 MdePkg: Add definition for Fmp Capsule Dependency.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2421

Add new definitions for Fmp Capsule dependency in UEFI Spec 2.8.
1. Extend the Last Attempt Status with a value to indicate the firmware
update fails with unsatisfied dependencies.
2. Add the definition of dependency expression op-codes.
3. Add the definition of EFI_FIRMWARE_IMAGE_DEP which is an array of FMP
dependency expression op-codes.
4. Extend the EFI_FIRMWARE_IMAGE_DESCRIPTOR with a pointer to the array of
FMP dependency expression op-codes.
5. Extend the Image Attribute Definitions with IMAGE_ATTRIBUTE_DEPENDENCY
to indicate that there is and EFI_FIRMWARE_IMAGE_DEP section associated
with the image.
6. Update EFI_FIRMWARE_IMAGE_DESCRIPTOR_VERSION to 4.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Wei6 Xu <wei6.xu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-01-19 02:47:47 +00:00
Liming Gao 63653ff8c8 MdePkg Base.h: Use correct style to check the defined macro
#if MACRO is not good style. It should be changed to
#ifdef MACRO style or #if defined (MACRO) style.

Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-01-17 00:57:34 +00:00
Siyuan Fu c7c964b109 MdePkg: Add header file for Firmware Interface Table specification.
This patch add FirmwareInterfaceTable.h for the Firmware Interface Table
BIOS specification.

This is to remove future edk2 dependency on edk2-platforms repo. The file
content comes from
 edk2-platforms\Silicon\Intel\IntelSiliconPkg\Include\IndustryStandard

BZ link: https://tianocore.acgmultimedia.com/show_bug.cgi?id=2449

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Siyuan Fu <siyuan.fu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-01-10 06:20:42 +00:00
Jason Voelz 859046e000 MdePkg BaseLib.h: Update IA32_CR4 strut to include all public fields
Based on Intel Software Develeper's Manual, add all fields in IA32_CR4.

Signed-off-by: Jason Voelz <jason.voelz@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2020-01-10 03:41:55 +00:00
Vitaly Cheptsov via Groups.Io df851da3ce MdePkg: Do not use CreateEventEx unless required
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2446

There are many firmwares in the wild not supporting CreateEventEx,
including devices less than 5 years old.

Signed-off-by: Vitaly Cheptsov <vit9696@protonmail.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2020-01-10 03:25:59 +00:00
Jiewen Yao ec8c74e8bc MdePkg/Tcg: Add new definition in TCG PFP spec.
The latest TCG PFP specification (TCG PC Client Platform Firmware Profile
Specification, Revision 1.05) added new data structure. For example,
the SPDM device measurement. This patch adds the new content.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-12-20 07:49:30 +00:00
Alex James 796b380ca7 MdePkg: Use __builtin_offset with CLANGPDB toolchain
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2393

CLANGPDB does not define __GNUC__, but it does define __clang__. Check
for the __clang__ preprocessor definition to use __builtin_offsetof to
implement the OFFSET_OF macro.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Alex James <theracermaster@gmail.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-12-20 05:54:06 +00:00
Daniel Pawel Banaszek 665afccc52 MdePkg PciExpress21: PCI_REG_PCIE_DEVICE_CONTROL2 struct has 17 bits
Device Control 2 Structure have an issue.
 LtrMechanism - there is 2 bits instead of 1.

Signed-off-by: Daniel Pawel Banaszek <daniel.pawel.banaszek@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
2019-12-19 14:47:37 +00:00
Jiewen Yao c7a0aca0ed MdePkg/Spdm: fix Nonce structure error.
Align to SPDM 1.0.0 specification.
Fix Nonce data structure error.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-12-19 04:01:42 +00:00
Pete Batard bfb141cf19 MdePkg/Include: Add DCC and BCM2835 SPCR UART types
As per the Microsoft Debug Port Table 2 (DBG2) documentation, that
can be found online, we are missing 2 serial interface types for
Arm DCC and Bcm2835 (the latter being used with the Raspberry Pi).

These same types are present in DebugPort2Table.h so add them to
SerialPortConsoleRedirectionTable.h too.

Note that we followed the same idiosyncrasies as DebugPort2Table
for naming these new macros.

Signed-off-by: Pete Batard <pete@akeo.ie>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-12-12 07:32:11 +00:00
Shenglei Zhang 54a07f8fe0 MdePkg: Update the comments of IsLanguageSupported
Keep the comment style of IsLanguageSupported align with
other functions.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-11-20 15:03:24 +00:00
Gao, Zhichao 4b7edd78a0 MdePkg/SmBios.h: SMBIOS 3.3.0 Update Intel Persistent Memory string
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2305

Memory Device (Type 17):
- SMBIOSCR00179: update the string for Intel persistent memory

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2019-11-14 03:06:27 +00:00
Gao, Zhichao 8019eb589a MdePkg/SmBios.h: SMBIOS 3.3.0 Add value HBM and Die for type 17
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2305

Memory Device (Type 17):
- SMBIOSCR00178: add new memory device type value (HBM) and new form
factor value (Die)

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
2019-11-14 03:06:27 +00:00