Up until SVN r18540, GenFw created invalid PE/COFF binaries for the ARM
architecture, by allowing PE/COFF .data sections to appear at offsets
that were not aligned to the global PE/COFF section alignment. The
reason for this was that the relocation metadata emitted by RVCT's
armlink only contains dynamic absolute relocations, so it is impossible
to recalculate relative relocations between .text and .data, and so the
relative offset between the two needs to be preserved.
Since r18540, we do align .data to the PE/COFF section alignment,
resulting in potentially corrupt PE/COFF binaries unless .data happens
to appear at a 32-byte aligned offset. So let's introduce a RVCT scatter
file that sets this alignment for the ELF .data section (and subsequent
.bss section).
At the same time, set the start offset to 0x220 bytes (which is the size
of our 32-bit PE/COFF header) so that the memory layouts are identical
between ELF and PE/COFF. Also add a 4 KB aligned version that can be
used to build DXE_RUNTIME_DRIVER modules with runtime memory protection
enabled.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19235 6f19259b-4bc3-4df7-8a09-765794883524
Michael D Kinney
Ard Biesheuvel