No platforms use the ARMv6 (ARM11) support code anymore. In fact, the
only reference to it in ArmPkg.dsc was commented out by Andrew in SVN
r11298 (2011-02-03) so it may well be broken. So remove it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18237 6f19259b-4bc3-4df7-8a09-765794883524
In the original code, there exists some mismatches between the real
waiting time and the corresponding timeout comments. For example, the
XHC_GENERIC_TIMEOUT comment says it's 10ms timeout value, but the real
code in fact waits 10s.
So the code is refined to be consistent in code logic and comments.
Note XHC_POLL_DELAY macro also be removed and the polling interval in
XhcWaitOpRegBit() is changed from 1ms to 1us to keep same code style
with other code. It has no real functionality impact.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18235 6f19259b-4bc3-4df7-8a09-765794883524
Remove EFI_RESOURCE_ATTRIBUTE_TESTED when reporting lower 640KB memory
so that the coreboot header is not erased before being processed
by CbParseMemoryInfo. This change is needed for compatibility
with SVN revision 18146.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18234 6f19259b-4bc3-4df7-8a09-765794883524
PcdTcg2HashAlgorithmBitmap is declared in a section that allows it to be Fixed or PatchableAtBuild, but there is code that sets it.
This breaks the build on some platforms. Changed it to be PcdsDynamic and PcdsDynamicEx only.
We move PcdTpm2HashMask to Dynamic section too, because now Tcg2Pei will set this PCD according to TPM2 device capability.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Samer El-Haj-Mahmoud" <samer.el-haj-mahmoud@hp.com>
Reviewed-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18233 6f19259b-4bc3-4df7-8a09-765794883524
v2:
* Update the MediaPresent detect declaring.
IP4 driver should re-initiate a DHCP if it detects that there is a network.
To fix this issue, we can implement the DHCP re-initiate policy while the media
change detected. The Ip4 driver should set a timer to signal the Ip4 to run the
DHCP configuration again(D.O.R.A). IP4 driver should free old IP address related
resource, then initiate a DHCP process to acquire new IP.
Cc: Ye Ting <ting.ye@intel.com>
Cc: Zhang Lubo <lubo.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
Reviewed-by: Lubo Zhang <lubo.zhang@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18232 6f19259b-4bc3-4df7-8a09-765794883524
HttpBootDxe need to stop and release the DHCP4 child when it's
not used so the NBP could create new DHCP4 child and use it.
Cc: Ye Ting <ting.ye@intel.com>
Cc: Zhang Lubo <lubo.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18231 6f19259b-4bc3-4df7-8a09-765794883524
VS2012 and VS2013 turn on optimizations by default that generate the
use of CMOV instruction. This is a change from previous version VS2008.
This means when you build with VS2012 or VS2013, it will generate UD
exceptions on Quark.
To resolve it, add /arch:IA32 options to not use enhanced instructions.
https://msdn.microsoft.com/en-us/library/7t5yh4fd(v=vs.140).aspx
Update the default options of VS2012 & VS2013 tool chain IA32 arch in
BaseTools\Conf\tools_def.template to make sure the generated Quark
compatibility driver.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18230 6f19259b-4bc3-4df7-8a09-765794883524
In GCC 4.7, a feature was added to the ARM backend that allows
unaligned loads and stores to be emitted. Since it is enabled by
default on ARMv6 and later CPUs, and since such code is not suitable
in our case (i.e., bare metal code), we must disable it by passing the
-mno-unaligned-access option if we are using GCC 4.7 or later.
However, this particular feature and its enabling by default have been
backported to version 4.6 by Linaro. Since the Linaro toolchains are
widely used for ARM development, and also shipped by distros such as
Ubuntu, we should disable the feature on version 4.6 as well.
Unfortunately, since the upstream version does not support the feature,
it also does not understand the -mno-unaligned-access option.
Since GCC sets the builtin #define __ARM_FEATURE_UNALIGNED to 1 when
-munaligned-access is in effect, we can force the build to fail in this
case by passing -D__ARM_FEATURE_UNALIGNED=0 on the GCC command line.
This will produce the following error message:
<command-line>:0:0: error: "__ARM_FEATURE_UNALIGNED" redefined [-Werror]
<built-in>:0:0: note: this is the location of the previous definition
and terminate the build.
This patch may cause some existing builds to fail, but they will be
builds that were previously at risk of unexpected runtime exceptions.
Those builds can also easily be switched to the GCC47 profile instead,
generating safe binaries.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18228 6f19259b-4bc3-4df7-8a09-765794883524
Follow UEFI specification to add context check and init in BaseCrypto2Hash(), so that other function can get proper status on hash operation.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
Reviewed-by: "Zhang, Chao B" <chao.b.zhang@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18227 6f19259b-4bc3-4df7-8a09-765794883524
Update SignatureSize to include SignatureOwner GUID. This behavior is defined by UEFI spec
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chao Zhang <chao.b.zhang@intel.com>
Reviewed-by: Qin Long <qin.long@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18226 6f19259b-4bc3-4df7-8a09-765794883524
between variable HOB and NV storage.
Variable HOB may be built by a system that supports and loads variable
default, the variables in the HOB will be flush to NV storage after
variable write search ready.
After that, if the variable's Attributes is changed by someone and
system reboots and tries to load default again, the variable Attributes
mismatch case between variable HOB and NV storage will appear.
Original code did not handle the case correctly, that may eventually
cause NV storage contains two valid same variables that will lead to
system hang if GetNextVariableName() called.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18225 6f19259b-4bc3-4df7-8a09-765794883524
IpSecStop() is incompetent to send out the delete information since the underlying
IP child has been destroyed. Delete all established IKE SAs and related
Child SAs directly.
Cc: Ye Ting <ting.ye@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18223 6f19259b-4bc3-4df7-8a09-765794883524
1. Refine parameter name to consistent with function headers.
2. To avoid potential bug BOOLEAN values should not use explicit comparisons to TRUE or FALSE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18222 6f19259b-4bc3-4df7-8a09-765794883524
When add driver option using file,input the description and then commit changes and exit,
it doesn't work.it caused by the commit 18216.When variable DriverOrderList in Variable.c
is NULL,it also need do the follow path,shouldn't return.Now change the code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18220 6f19259b-4bc3-4df7-8a09-765794883524
TCG EFI Protocol Specification for TPM Family 2.0 Revision 1.0 Version 9 at http://www.trustedcomputinggroup.org/resources/tcg_efi_protocol_specification
TCG Physical Presence Interface Specification Version 1.30, Revision 00.52 at http://www.trustedcomputinggroup.org/resources/tcg_physical_presence_interface_specification
Add Tcg2XXX, similar file/directory as TrEEXXX. Old TrEE driver/library can be deprecated.
1) Add Tcg2Pei/Dxe/Smm driver to log event and provide services.
2) Add Dxe/Pei/SmmTcg2PhysicalPresenceLib to support TCG PP.
3) Update Tpm2 library to use TCG2 protocol instead of TrEE protocol.
Test Win8/Win10 with SecureBoot enabled, PCR7 shows bound.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <Jiewen.Yao@intel.com>
Reviewed-by: "Zhang, Chao B" <chao.b.zhang@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18219 6f19259b-4bc3-4df7-8a09-765794883524
After the recent GNU linker script changes, the following warning is
emitted many times during the OVMF build:
BFD: <...>: warning: Empty loadable segment detected, is this intentional ?
This is caused by the fact that, now that the section layout has changed
somewhat, the .eh_frame section is assigned an ELF segment of its own,
which ends up with no contents at all after we strip the .eh_frame
section from the output. (Note that the program headers that contain the
segment information are completely irrelevant to us since the PE/COFF
conversion does not rely on them.)
Since we only retain the .eh_frame data for external debugging, and not
for things like stack unwinding or generating backtraces at runtime, we
can remedy the situation by passing -fno-asynchronous-unwind-tables on
the GCC command line. This option instructs the compiler to emit the
unwind data into a debug section called .debug_frame instead of into
.eh_frame.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Build-tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18217 6f19259b-4bc3-4df7-8a09-765794883524
Refine the code in UiApp to prevent the potential risk.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18216 6f19259b-4bc3-4df7-8a09-765794883524
Refine the code in LegacyBootMaintUiLib to prevent the potential risk.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18215 6f19259b-4bc3-4df7-8a09-765794883524
Replace the unsafe string functions with the safe one in UiApp.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18214 6f19259b-4bc3-4df7-8a09-765794883524
In HttpLib, the Event BodyParseComplete should return to the
callback function when the whole message body has been parsed
including the trailer if it has.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Zhang Lubo <lubo.zhang@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
Reviewed-by: Wu Jiaxin <jiaxin.wu@intel.com>
Reviewed-by: Fu Siyuan <siyuan.fu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18213 6f19259b-4bc3-4df7-8a09-765794883524
The ARMGCC and ARMLINUXGCC toolchains are specific to the ARM and
AARCH64 architectures, and overlap with the toolchain configuration
that is provided by the GCC44 - GCC49 toolchains, which are defined
for all architectures.
To reduce the maintenance burden, and make it easier to keep these
different architectures aligned, remove the ARMGCC and ARMLINUXGCC
toolchains entirely.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18212 6f19259b-4bc3-4df7-8a09-765794883524
Now that we can build the Beagleboard NOR image without the custom
build scripts, let's remove them since they are outdated and out of
sync with each other.
Remove readme.txt as well: it is also outdated, and mostly covers
QEMU and how to build Linaro SD images, which may not be relevant to
most users.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18211 6f19259b-4bc3-4df7-8a09-765794883524
Since the configuration header never changes unless the board parameters
in ConfigurationHeader.dat are updated, we can take a snapshot of the
binary and add it to the FDF definition. This way, it will get emitted
by the EDK2 build system instead of having to use a separate
post-processing tool to add it to the flash image.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18210 6f19259b-4bc3-4df7-8a09-765794883524
Remove the ARMGCC and ARMLINUXGCC from comments in the respective
Makefiles of ArmPlatformPkg and ArmJunoPkg. Also drop the wildly
outdated Versatile Express instructions, since they refer to ARMGCC
as well.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18209 6f19259b-4bc3-4df7-8a09-765794883524
We are going to remove the ARMGCC toolchains, so replace any references
to it with its replacement GCC48.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18208 6f19259b-4bc3-4df7-8a09-765794883524
The ARMGCC toolchain will be removed, and so will the build rule family
by the same name. So remove the BuildOptions specific to ARMGCC.
Cc: Daryl McDaniel <edk2-lists@mc2research.org>
Cc: Jaben Carsey <jaben.carsey@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Daryl McDaniel <edk2-lists@mc2research.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18207 6f19259b-4bc3-4df7-8a09-765794883524
Add auto detection for the ARCH variable for AARCH64 and ARM
systems. This allows us to do a native build of the BaseTools
without the need to set ARCH externally.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18206 6f19259b-4bc3-4df7-8a09-765794883524
When adding section VERSION in FDF file, for example:
FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {
SECTION RAW = MdeModulePkg/Logo/Logo.bmp
SECTION UI = "Logo"
SECTION VERSION = "0001"
}
GenFds will report the following error:
Traceback (most recent call last):
File "GenFds.py", line 276, in main
File "GenFds.py", line 391, in GenFd
File "Fd.py", line 93, in GenFd
File "Region.py", line 106, in AddToBuffer
File "Fv.py", line 114, in AddToBuffer
File "FfsFileStatement.py", line 117, in GenFfs
File "VerSection.py", line 80, in GenSection
File "GenFdsGlobalVariable.py", line 401, in GenerateSection
TypeError: 'NoneType' object is not iterable.
We found in GenFdsGlobalVariable.py line 401 'list' requires a iteralbe object as parameter while the 'Input' is None.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Yingke Liu <yingke.d.liu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18205 6f19259b-4bc3-4df7-8a09-765794883524
The Clang assembler for AArch64 chokes on the value 0XEA1 since it
expects the 0x prefix to use a lower case x.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18204 6f19259b-4bc3-4df7-8a09-765794883524
The ArmVirtPrePiUniCoreRelocatable module comes with its own GNU
linker script to create a PIE executable that can relocate itself
at runtime. In order to be able to build this module using CLANG,
we need to adhere to the section alignment passed via to the linker
using -z commmon-page-size, so add this to the linker script.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18203 6f19259b-4bc3-4df7-8a09-765794883524
The relocated immediate notation supported by GNU as (e.g., #:lo12:foo)
is not supported by clang. Since we are loading a constant value, they
were not entirely appropriate here anyway, so simply replace them with
assembler arithmetic expressions.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18202 6f19259b-4bc3-4df7-8a09-765794883524
DHCP policy is applied as default at boot time on all NICs in the system, which results
in all NIC ports attempting DHCP and trying to acquire IP addresses during boot.
Ip4 driver should only set dhcp as default policy, and not trigger DORA at driver binding
start(). We should start DORA until one IP child is configured to use default address.
Cc: Fu Siyuan <siyuan.fu@intel.com>
Cc: Ye Ting <ting.ye@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Ye Ting <ting.ye@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18201 6f19259b-4bc3-4df7-8a09-765794883524
Change a macro name to fit EDK2 naming conventions: Use all capital letters for #define.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: fanwang2 <fan.wang@intel.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18200 6f19259b-4bc3-4df7-8a09-765794883524
Change several macro names to fit name EDK2 naming conventions: Use all capital letters for #define.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: fanwang2 <fan.wang@intel.com>
Reviewed-by: Jiaxin Wu <jiaxin.wu@intel.com>
Reviewed-by: Qiu Shumin <shumin.qiu@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18199 6f19259b-4bc3-4df7-8a09-765794883524
This adds support for building the AARCH64 platforms using the
Clang compiler and assembler combined with the GNU (cross-)linker.
The chosen name CLANG35 is based on version 3.5 being the oldest
supported version, but no issues are known that should prevent its
use with any later version.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18198 6f19259b-4bc3-4df7-8a09-765794883524
The AArch64 small C model makes extensive use of ADRP/ADD and
ADRP/{LDR,STR} pairs to emit PC-relative symbol references with
a +/- 4 GB range. Since the relocation pair splits the relative
offset into a relative page offset and an absolute offset into
a 4 KB page, we need to take extra care to ensure that the target
of the relocation preserves its alignment relative to a 4 KB
alignment boundary.
Also, due to a problem with the --emit-relocs GNU ld option, where
it does not recalculate the addends for section relative relocations,
the only way to guarantee correct code is by requiring the relative
section offset to be equal in the ELF and PE/COFF versions of the
binary. This affects both the 'tiny' and 'small' GCC code models.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18197 6f19259b-4bc3-4df7-8a09-765794883524
Now that GenFw correctly propagates the minimum alignment of the ELF
input sections to the PE/COFF binary, we can simply select 'auto'
alignment in the FDF Rule section instead of tweaking it by hand.
Also add the FIXED FFS attribute to the module types that may execute
in place. This enables a newly added optimization in GenFfs that strips
redundant padding, preventing excessive waste of FV space if the section
alignment is considerable (i.e., 2 KB or 4 KB)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18196 6f19259b-4bc3-4df7-8a09-765794883524
No need to hardcode the TE alignment anymore, now that GenFw sets
the PE/COFF alignment according to the alignment requirements of
the ELF input sections.
Also enable FIXED FFS placement so that we can reclaim some of the
space wasted to padding when using clang with 4 KB section alignment.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18195 6f19259b-4bc3-4df7-8a09-765794883524
The ACPI .aslc files contain a ReferenceAcpiTable() function whose
sole purpose is to ensure that the table itself does not get optimized
away. However, when using clang, these dummy functions result in a 4 KB
section alignment requirement, which is silly since everything except
the .data section is discarded later anyway.
So instead, make ReferenceAcpiTable a CONST pointer to VOID*. This way,
we still have a .text section, which is mandatory for the PE/COFF
conversion, but no executable code with small model relocations that
impose additional alignment requirements.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18194 6f19259b-4bc3-4df7-8a09-765794883524
Use an explicit VOID* cast when passing a static char array into
a function taking a void pointer.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18193 6f19259b-4bc3-4df7-8a09-765794883524
The GNU assembler extends the generic notation for IMPLEMENTATION
DEFINED system registers to support any system register, so that
system registers defined by newer versions of the architecture can
still be used by older versions of the toolchain.
Clang before v3.6 supports the generic notation, but does not
support this extension, nor does it need to in the particular case
of the GICv3 support code, since it knows the GICv3 registers by
their architectural names. So only redefine their real names to
their generic aliases if we are not using clang.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18192 6f19259b-4bc3-4df7-8a09-765794883524
when stack NX has been enabled for BSP.
DxeIpl may have enabled Execute Disable for BSP,
APs need to get the status and sync up the settings,
otherwise EFI_MP_SERVICES_PROTOCOL->StartupAllAPs
may not work.
Got positive comments and test result from Laszlo
for the early draft patch, thanks.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18191 6f19259b-4bc3-4df7-8a09-765794883524
Chao Zhang
Eric Dong
Ard Biesheuvel
Ruiyu Ni
Feng Tian
Scott Duplichan
Samer El-Haj-Mahmoud
Jiaxin Wu
Liming Gao
Yao, Jiewen
Star Zeng
Qiu Shumin
Dandan Bi
Zhang Lubo
fanwang2