Commit Graph

3 Commits

Author SHA1 Message Date
Jeff Fan 8a5b8cef67 UefiCpuPkg/SecCore: Re-install SEC platform information(2) PPI
In SecTemporaryRamDone(), we will build one privated GUIDed-HOB to save CPU BIST
Data and re-install SEC platform information(2) PPI. Then other PEI drivers
could get CPU BIST data from the private GUIDed-HOB by new installed PPI.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@Intel.com>
2016-09-14 08:54:46 +08:00
Jeff Fan 863c738c4a UefiCpuPkg/SecCore: Add SecBist.c
Add SecBist.c and copy GetBistInfoFromPpi() and SecPlatformInformation2() from
UefiCpuPkg/CpuMpPei/CpuBist.c. And update SecMain.c, SecMain.inf and
UefiCpuPkg.dsc accordinlgy to pass build.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@Intel.com>
2016-09-14 08:54:39 +08:00
Michael Kinney 1921695e64 UefiCpuPkg: Add SecCore module
Add SecCore module that uses the PlatformSecLib class for platform
specific actions.  The SecCore module also uses a new PCD to
configure the size of the stack used in the SEC phase.  If the
stack size PCD is set to 0, the stack is configured to use half
of the available temporary RAM.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18636 6f19259b-4bc3-4df7-8a09-765794883524
2015-10-19 19:10:14 +00:00