The value of EBX must be preserved to follow IA32 cdecl calling convention in the assembly
implementation of AsmFlushCacheLine(). The CPUID instruction modifies the EBX register.
The EBX register value is saved onto the stack before CPUID and restored from the stack
after CPUID.
The update to the inline assembly implementation of AsmFlushCacheLine() changed the location of the
LinearAddress parameter value on the stack. The hardcoded lookup using [esp + 4] is not correct.
Use the parameter name LinearAddress instead of the hard coded [esp + 4] stack location to prevent
this issue from occurring again if there are changes to the inline assembly in the future.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17279 6f19259b-4bc3-4df7-8a09-765794883524
Use CPUID Leaf 01 to detect support for CLFLUSH instruction.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17212 6f19259b-4bc3-4df7-8a09-765794883524
2. Remove #ifdef _GCC_ from all resource files
3. Remove #if 0 from all resource files
4. Remove #ifdef MDE_CPU_IPF and #ifdef MDE_CPU_EBC
5. Remove #progam from Decode.c
6. Remove #ifdef TIANO_EXTENSION_FLAG from source files
7. Remove #ifdef SUPPORT_IPV6, since code base doesn't support IPV6 at all.
8. Remove #ifdef SpecialNowaitVersion from pxe_bc_mtftp.c, since it's only used for test.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2470 6f19259b-4bc3-4df7-8a09-765794883524
Michael Kinney
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