Commit Graph

11 Commits

Author SHA1 Message Date
Liming Gao 04147690b5 IntelFsp2WrapperPkg: Remove unused header files from Fspm and Fsps WrapperPeim
PlatformSecLib.h is not used and removed.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-07-14 15:01:41 +08:00
Liming Gao ce545345b1 IntelFsp2WrapperPkg SecFspWrapperPlatformSecLibSample: Remove MASM/GAS files
Keep NASM file only for new added modules.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-07-11 13:53:48 +08:00
Liming Gao b422ddb215 IntelFsp2WrapperPkg BaseFspWrapperApiLib: Remove MASM/GAS files
Keep NASM file only for new added modules.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-07-11 13:53:45 +08:00
Hao Wu 599c45ff0b IntelFsp2WrapperPkg: Add error handling for possible NULL ptr dereference
Possible NULL pointer dereference for FspmHeaderPtr/FspsHeaderPtr in
module FspmWrapperPeim/FspsWrapperPeim.

Add error handling codes to avoid this issue.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-07-01 08:50:39 +08:00
Liming Gao 2d24f4e70b IntelFsp2WrapperPkg SecFspWrapperPlatformSecLibSample: Convert ASM to NASM
Manually converts Ia32/PeiCoreEntry.asm, Ia32/SecEntry.asm and Ia32/Stack.asm
to Ia32/PeiCoreEntry.nasm, Ia32/SecEntry.nasm and Ia32/Stack.nasm.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
2016-06-28 09:52:05 +08:00
Liming Gao 24498828f7 IntelFsp2WrapperPkg BaseFspWrapperApiLib: Convert X64/Thunk64To32.asm to NASM
Manually convert X64/Thunk64To32.asm to X64/Thunk64To32.nasm

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
2016-06-28 09:52:04 +08:00
Jiewen Yao f862a3b6f9 IntelFsp2WrapperPkg: Add support to handle ResetRequired return Status from FSP.
As per FSP 2.0 spec, FSP shall not trigger system reset and instead it
shall return from the FSP API to the BL/Wrapper with the required reset
type. The changes are to handle the ResetRequired return code from FSP
APIs and provide lib interface for platform to trigger the actual reset.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com>
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-06-18 07:17:04 +08:00
Satya Yarlagadda 6d40ea81fc IntelFsp2WrapperPkg: Add Dymanic PCD capability to PcdFspsBaseAddress
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com>
Reviewed by: Maurice Ma <maurice.ma@intel.com>
Reviewed by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-06-16 10:54:07 +05:30
Jiewen Yao 6f6bf5c772 IntelFsp2WrapperPkg: Update gFspWrapperTokenSpaceGuid to gIntelFsp2WrapperTokenSpaceGuid.
We updated gIntelFspPkgTokenSpaceGuid to gIntelFsp2PkgTokenSpaceGuid
in IntelFsp2Pkg, but we miss the update in IntelFsp2WrapperPkg.
This patch fixed the issue and made them consistent.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Satya P Yarlagadda <satya.p.yarlagadda@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-05-23 09:27:29 +08:00
Jiewen Yao 1f1ec99dea IntelFsp2WrapperPkg/FspmWrapperPeim: Update debug message match code.
Update function name in debug message to match code.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-05-20 08:48:00 +08:00
Jiewen Yao cf1d454983 Add IntelFsp2Pkg and IntelFsp2WrapperPkg.
Add FSP2.0 support.
This series of patch is to support FSP2.0 specification at
https://firmware.intel.com/sites/default/files/FSP_EAS_v2.0_Draft%20External.pdf

Some major updates include:
1) One FSP binary is separated to multiple components:
FSP-T, FSP-M, FSP-S, and optional FSP-O.
Each component has its own configuration data region.
2) All FSP-APIs use same UPD format - FSP_UPD_HEADER.
3) Add EnumInitPhaseEndOfFirmware notifyphase.
4) FSP1.1/FSP1.0 compatibility is NOT maintained.
5) We also add rename Fsp* to FspWrapper* in IntelFsp2WrapperPkg,
to indicate that it is for FspWrapper only.

IntelFspPkg and IntelFspWrapperPkg will be deprecated.
The new Intel platform will follow FSP2.0 and use IntelFsp2Pkg
and IntelFsp2WrapperPkg.
The old platform can still use IntelFspPkg and IntelFspWrapperPkg
for compatibility consideration.

Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Ravi P Rangarajan <ravi.p.rangarajan@intel.com>
2016-05-13 13:00:53 +08:00