In preparation of including Base.h in C++ BaseTools programs, support
the C++ 11 alignof operator. The C _Alignof operator is not universally
supported in C++ mode across compiler toolchains and thus the current
definition may lead to compilation errors with said programs.
Signed-off-by: Marvin Häuser <mhaeuser@posteo.de>
To support GoogleTest, 933b4c3 added support for C++ static_assert.
However, this is not a mandatory or universally supported C++ feature.
Guard its usage by the __cpp_static_assert support flag.
Signed-off-by: Marvin Häuser <mhaeuser@posteo.de>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=3704
build -a X64 -t CLANG38 -b RELEASE -p OvmfPkg/OvmfPkgX64.dsc
results in
UDK/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c:1284:31:
error: variable 'Status' set but not used
[-Werror,-Wunused-but-set-variable]
Signed-off-by: Mikhail Krichanov <krichanov@ispras.ru>
MdePkg/DebugLib(PerformanceLib): Fix "unused-but-set-variable" warning
The current definitions of DEBUG_CODE_BEGIN() and DEBUG_CODE_END() use
the local
variable __DebugCodeLocal as an attempt to track parity. If
DEBUG_CODE_END() is
used without a preceding DEBUG_CODE_BEGIN(), __DebugCodeLocal will not
have been
declared and a compilation error will be issued. The mutations of the
variable
are not used to track nesting or such. As the value of this variable is
never
actually used, recent Clang versions issue a "unused-but-set-variable"
warning
for it.
To solve this, re-define __DebugCodeLocal as a BOOLEAN that is always
FALSE and
use it in a do-while loop condition as done explicitly in many places.
Like the
previous solution, DEBUG_CODE_END() cannot be used without
DEBUG_CODE_BEGIN(),
as __DebugCodeLocal will be not have been defined.
Signed-off-by: Marvin Häuser <mhaeuser@posteo.de>
Add the bit masks for DLL Characteristics, used within the optional
header of a PE, to the PeImage.h header file.
Update the Visual Studio, Microsoft Portable Executable and Common
Object File Format Specification, and the PE/COFF Specification to the
latest version.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Joey Vagedes <joeyvagedes@gmail.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
The ASWG ECR 2303 introduces a new field 'TRBE
interrupt' to GICC structure in ACPI 6.5.
The Trace Buffer Extension (TRBE) interrupt is a
Processor Private interrupt (PPI) and is used to
specify a platform-specific interrupt to signal
TRBE events.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Bugzilla: 3706 'Code First - MADT GICC new flags'
On ARM systems physical CPU hotplug is not supported.
All CPUs are considered present and this is true
throughout the system uptime.
The ECR 2285 introduces a new 'online-capable' flag
in the GICC structure flags in ACPI 6.5, to signal
firmware policy (CPU is not enabled but it can be
enabled and onlined). This enables OSPM to support
virtual CPU hotplug (on virtual platforms for
instance).
This ECR also updates the MADT table revision to 6
to reflect the ACPI 6.5 changes. Therefore, update
the MADT table revision to match the value as
specified in ACPI 6.5.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Define the structure for IPMI Get System Interface
Capabilities command (0x57)
Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Nickle Wang <nicklew@nvidia.com>
1) Add CXL 2.0 header file to comply with CXL 2.0 specification
2) CXL 2.0 header will embed Cxl11.h
3) Updated Cxl.h to point to 2.0 header file
Signed-off-by: Chris Li <chrisli@os.amperecomputing.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Yao, Jiewen <jiewen.yao@intel.com>
Cc: Nong, Foster <foster.nong@intel.com>
Cc: Kinney, Michael D <michael.d.kinney@intel.com>
The PLDM protocol uses Request bit to help differentiate between PLDM
request and response messages.
Currently the Pldm.h header only have a flag for the request message.
Add a flag for the response message as well.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Correct MCTP_TRANSPORT_HEADER structure field 'SourceEndpointIdId' to
'SourceEndpointId'.
Signed-off-by: Abner Chang <abner.chang@amd.com>
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Provide Fit format for UniversalPayload, developer can use argument
"--Fit" to build UniversalPayload.fit
Cc: Guo Dong <guo.dong@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Reviewed-by: Gua Guo <gua.guo@intel.com>
Signed-off-by: BruceX Wang <brucex.wang@intel.com>
Return unsupported HTTP status code to caller so caller can handle
HTTP error status code. Current implementation only return EFI error
to caller. Without knowing the HTTP status code, caller has trouble
to handle HTTP request failure.
Signed-off-by: Nickle Wang <nicklew@nvidia.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Nick Ramirez <nramirez@nvidia.com>
Cc: Mike Maslenkin <mike.maslenkin@gmail.com>
Reviewed-by: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Acked-by: Mike Maslenkin <mike.maslenkin@gmail.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4547
Add New Intel Processor family for SMBIOS Type 4
Hex value - 16h
Name - Intel(R) Processor
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Cc: Benny Lin <benny.lin@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Cc: Prakashan Krishnadas Veliyathuparambil <krishnadas.veliyathuparambil.prakashan@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Avinash Bhargava <avinash.bhargava@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
The EFI_RNG_PROTOCOL can use the RngLib. The RngLib has multiple
implementations, some of them are unsafe (e.g. BaseRngLibTimerLib).
To allow the RngDxe to detect when such implementation is used,
add a GetRngGuid() function to the RngLib.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Kun Qin <kun.qin@microsoft.com>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4441
The EFI_RNG_PROTOCOL can rely on the RngLib. The RngLib has multiple
implementations, some of them are unsafe (e.g. BaseRngLibTimerLib).
To allow the RngDxe to detect when such implementation is used,
a GetRngGuid() function is added in a following patch.
Prepare GetRngGuid() return values and add a gEfiRngAlgorithmArmRndr
to describe a Rng algorithm accessed through Arm's RNDR instruction.
[1] states that the implementation of this algorithm should be
compliant to NIST SP900-80. The compliance is not guaranteed.
[1] Arm Architecture Reference Manual Armv8, for A-profile architecture
sK12.1 'Properties of the generated random number'
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Kun Qin <kun.qin@microsoft.com>
REF: https://uefi.org/specs/UEFI/2.10/Apx_D_Status_Codes.html
Upon review it has been found that MdePkg is missing two
status code definitions:
1. EFI_IP_ADDRESS_CONFLICT - Added in UEFI Spec v2.5
2. EFI_WARN_RESET_REQUIRED - Added in UEFI Spec v2.6
These missing status codes have been added.
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Remove workaround for the redefinition of the type
RUNTIME_FUNCTION that is generated when building with
VS20xx tool chains and using windows include files.
The correct location for this fix is in the EmulatorPkg
in the WinInclude.h file that addresses all the name
collisions between edk2 types and windows types.
The commit that added the workaround is:
ff52068d92
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
The satp mode bits shift is used cross modules. It should be defined
in one place.
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Add an API to retrieve satp register value.
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4182
Adds an SMM SMRAM save-state map for AMD processors.
SMRAM save state maps for the AMD processor family are now supported.
Save state map structure is added based on
AMD64 Architecture Programmer's Manual, Volume 2, Section 10.2.
The AMD legacy save state map for 32-bit architecture is defined.
The AMD64 save state map for 64-bit architecture is defined.
Also added Amd/SmramSaveStateMap.h to IgnoreFiles of EccCheck,
because structures defined in this file are derived from
Intel/SmramSaveStateMap.h.
Cc: Paul Grimes <paul.grimes@amd.com>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3966
This change introduces a new peripheral subclass definition from PI
specification v1.8.
The new subclass definition will cover system reboot events under the
status reports from Trusted Platform Modules (TPMs).
These definition could provide helpful datapoints to OEMs to analyze
system security state and healthiness, as well as avoid definition
collision with other existing peripheral subclass definitions.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3794
This change introduces a new error code definitions under Host Software
class according to PI specification v1.8.
The new error code definition will cover system reboot events under the
conditions of inconsistent memory map from one boot to another.
These error codes could provide helpful datapoints to OEMs to investigate
and prevent system failures in general.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Kun Qin <kuqin12@gmail.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
The timer compare register is 64-bit so simplifying the delay
function.
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
The BaseTools and MdePkg versions of PeImage.h diverged over time,
add some missing bits to the MdePkg header file in preparation for
removing the BaseTools version.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
Not needed any more on modern toolchains, they are better
in not creating a GOT without this trick.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Rebecca Cran <rebecca@bsdio.com>
Add a few more definitions and make SbiCall and TranslateError
usable (not static) by library users.
Cc: Daniel Schaefer <git@danielschaefer.me>
Signed-off-by: Andrei Warkentin <andrei.warkentin@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
This adds more definitions for the IPMI Get System Interface
Capabilities command.
Signed-off-by: Tinh Nguyen <tinhnguyen@os.amperecomputing.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Abner Chang <abner.chang@amd.com>
Reviewed-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4144
This Library is NULL library of TraceHubDebugSysTLib.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Guo Gua <gua.guo@intel.com>
Cc: Chan Laura <laura.chan@intel.com>
Cc: Prakashan Krishnadas Veliyathuparambil <krishnadas.veliyathuparambil.prakashan@intel.com>
Cc: K N Karthik <karthik.k.n@intel.com>
Signed-off-by: Guo Gua <gua.guo@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: K N Karthik <karthik.k.n@intel.com>
Reviewed-by: Chan Laura <laura.chan@intel.com>
Acked-by: Liming Gao <gaoliming@byosoft.com.cn>
Since Visual Studio versions older than VS2015 are no longer supported,
remove mention of them from MdePkg.
Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
Reviewed-by: Oliver Smith-Denny <osd@smith-denny.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Tested-by: Michael D Kinney <michael.d.kinney@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4392
Add FDT support in EDK2 by submodule 3rd party libfdt
(https://github.com/devicetree-org/pylibfdt/tree/main/libfdt)
and refer to LibcLib implementation by Pedro.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Signed-off-by: Benny Lin <benny.lin@intel.com>
Acked-by: Pedro Falcato <pedro.falcato@gmail.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Bug #4414
Add DEBUG_MANAGEABILITY print error lever to
output debug message of detailed manageability
related module information, such as
- RedfishPkg:
- HTTP header/request/response
- JSON plain text
- Refish resource
- Redfish Host interface information
- Redfish credential information
- Platform configuration to Redfish mapping
- etc.
- ManageabilityPKg
- Protocol payload of MCTP/PLDM/IPMI
- Payload of transport interface transfers
- IPMI BLOB transfer
- etc.
- RedfishClinetPkg
- Redfish feature driver dispatcher
- Redfish BIOS attributes
- Platform configuration (HII) to
Redfish property information
- Redfish C structure information
- etc.
Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Cc: Tinh Nguyen <tinhnguyen@os.amperecomputing.com>
BZ #4396
This change adds definitions for DMTF PLDM
SMBIOS Transfer specification.
Spec ref:
https://www.dmtf.org/sites/default/files/standards/documents/DSP0246_1.0.1.pdf
Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
BZ #4396
This change adds definitions for DMTF PLDM
base specification.
Spec ref:
https://www.dmtf.org/sites/default/files/standards/documents/DSP0240_1.1.0.pdf
Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Mikhail Krichanov
Marvin Häuser
Ceping Sun
Joey Vagedes
Jinlong Xu
Sami Mujawar
Abner Chang
Chris Li
Konstantin Aladyshev
Brucex.Wang
Nickle Wang
Avinash Bhargava
Pierre Gondois
Eduardo Cuevas Farfan
Foster Nong
Nate DeSimone
Michael D Kinney
Tuan Phan
Abdul Lateef Attar
Kun Qin
Aryeh Chen
Gerd Hoffmann
Andrei Warkentin
Giri Mudusuru
Tinh Nguyen
Gua Guo
Rebecca Cran
Benny Lin