Commit Graph

21 Commits

Author SHA1 Message Date
Ruiyu Ni 72d6520e48 CorebootPayloadPkg: Fix build failure due to Tftp/Dp library removal
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Prince Agyeman <prince.agyeman@intel.com>
Reviewed-by: Benjamin You <benjamin.you@intel.com>
2017-11-29 10:56:12 +08:00
Maurice Ma 6157f6500c CorebootPayloadPkg: Add APRIORI file in FDF file
Add APRIORI file to allow status code related DXE drivers to
be dispatched earlier so that debug message can also be seen
much earlier. With this, lots of DXE driver debug message will
be missing.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2017-01-12 14:22:03 -08:00
Maurice Ma 1399565a93 CorebootPayloadPkg: Add an option to use HPET timer driver
The current CorebootPayloadPkg will use the legacy 8254 timer
driver as the default. However, on some platforms legacy timer
might not exist anymore. This patch adds HPET timer driver as
a build option.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by : Prince Agyeman <prince.agyeman@intel.com>
2016-10-27 09:12:26 -07:00
Maurice Ma 937f5cb6ac CorebootPayloadPkg DSC: Change the section alignment option
The current CorebootPayloadPkg will print the following message
"InsertImageRecord - Section Alignment(0x20) is not 4K" during
boot. It is caused by the section alignment arranged by the linker.
This patch change the alignment to 4K for runtime drivers.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-10-26 14:52:49 -07:00
Maurice Ma 200eaa3d7d CorebootPayloadPkg: Switch to use StatusCode driver in MdeModulePkg
The current CorebootPayloadPkg uses PEI/DXE StatusCode drivers from
IntelFrameworkModulePkg. This patch switches to use the StatusCode
driver from MdeModulePkg instead.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-10-26 14:49:34 -07:00
Prince Agyeman efe3f0099c CorebootPayloadPkg: fixed GCC49 and GCC5 hang in PeiCore
Section alignment of .data in GCC49 and GCC5 are 0x40
rather than 0x20 in GCC48 and below.
This causes a hang in PeiCore.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Prince Agyeman <prince.agyeman@intel.com>
Reviewed by: Maurice Ma <maurice.ma@intel.com>
2016-08-17 23:38:12 -07:00
Maurice Ma 69787a9d31 CorebootPayloadPkg: Use generic PciBus/PciHostBridge driver
Current CorebootPayloadPkg uses PciBusNoEnumerationDxe and
PciRootBridgenoEnumerationDxe copied from the DuetPkg. Now it will
switch to use the standard PciBusDxe and PciHostBridgeDxe from
MdeModulePkg. As a result, a coreboot specific PciHostBridgeLib
is added to collect pre-allocated PCI resources.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-23 13:53:41 -07:00
Maurice Ma d5f85e3fef CorebootPayloadPkg: Switch to use generic BdxDxe driver
Switch over to use BdxDxe generic driver in MdeModulePkg.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-20 10:11:56 -07:00
Maurice Ma aa52bace8f CorebootPayloadPkg: Use generic SerialDxe driver
Use generic SerialDxe driver in MdeModulePkg instead of the one
in CorebootModulePkg. By doing this the reference for
PciSioSerialDxe driver will also be removed from DSC and FDF file.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
2016-05-13 14:08:56 -07:00
Leahy, Leroy P 0c986eafae CorebootPayloadPkg: Add OHCI driver
Add the USB OHCI driver from revision 24ca2f35 of QuarkSocPkg.

Change-Id: Ie7aa0bc47d4ff06adc57976a5efb0e40ce4e1673
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2016-05-12 18:11:09 -07:00
Leahy, Leroy P f4e84386c7 CorebootPayloadPkg: Add SD/eMMC support
Add SD and eMMC DXE driver support to CorebootPayloadPkg.

Change-Id: Ibfd3a2cc32a653ce51e38d9157ea3c6da25a5474
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-12 15:56:15 -07:00
Leahy, Leroy P 1fee349aeb CorebootPayloadPkg: Use DOS line endings
Convert to using DOS line endings.

Change-Id: Ie2f148867d9b2b386d556583afb6716ec21399e9
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
2016-05-12 09:31:25 -07:00
Leahy, Leroy P 89ecd4cf80 CorebootPayloadPkg: Use serial drivers with PlatformHookLib
Use the serial drivers which update the serial PCDs from
PlatformHookLib.

Change-Id: Ie6a3526d56332ee1cf07edb24ff39634a981183f
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-05 16:12:39 -07:00
Leahy, Leroy P d3f5d59826 CorebootPayloadPkg: Make shell selectable
Add all of the shell options from ShellBinPkg including building the
shell from source.

Enable link time optimization for GCC debug builds to keep the size
under 0x3e0000.

Test: Use -DSHELL_TYPE=BUILD_SHELL command line options to build the
shell from source.  Run the result on Galileo Gen2.

Change-Id: I1e12adb57960ac5e75e682073540a9322aa03081
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-05 16:10:40 -07:00
Leahy, Leroy P 81a23a0fee CorebootModulePkg: Remove DuetPkg references
Remove the references to DuetPkg.  Copy the files from revision
ffea0a2ce2 of DuetPkg into
CorebootModulePkg.  The components include:
* PciBusNoEnumerationDxe
* PciRootBridgeNoEnumerationDxe
* SataControllerDxe

TEST=Build and run on Galileo Gen2

Change-Id: Id07185f7e226749e5f7c6b6cb427bcef7eac8496
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-02 15:46:44 -07:00
Leahy, Leroy P 13986b690c CorebootPayloadPkg: Remove trailing white space
Remove trailing white space from existing .dsc and .fdf files.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-05-02 10:57:15 -07:00
Justen, Jordan L eeb69ffc28 CorebootPayloadPkg: Convert to build FatPkg from source
Now that FatPkg is open source (and therefore can be included in the
EDK II tree) we build and use it directly.

Note: Build tested with GCC 5.3 on IA32 and IA32+X64.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
2016-04-07 08:47:40 -07:00
Star Zeng bae5ddc057 CorebootPayloadPkg: Use SerialDxe in MdeModulePkg
1. Update fdf and dsc to use SerialDxe in MdeModulePkg.
2. Separate the code that gets SerialRegBase and SerialRegAccessType
   by CbParseLib from CorebootPayloadPkg/Library/SerialPortLib to
   PlatformHookLib, and then leverage BaseSerialPortLib16550 in
   MdeModulePkg.
3. Remove CorebootPayloadPkg/SerialDxe and
   CorebootPayloadPkg/Library/SerialPortLib.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18968 6f19259b-4bc3-4df7-8a09-765794883524
2015-11-26 08:49:26 +00:00
Maurice Ma 4665ec9832 CorebootPayloadPkg: Replace PciHostBridge driver with PciRootBridgeNoEnumeration
Current CorebootPayloadPkg uses PciHostBridge and PciBusNoEnumeration
driver. It will cause the PCI bus resource incorrectly set in root
bridge instance. As a result all PCI devices behind a PCI bridge will
not show up in Shell 'PCI' command.

To resolve it use PciRootBridgeNoEnumeration driver instead.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17408 6f19259b-4bc3-4df7-8a09-765794883524
2015-05-11 15:52:31 +00:00
Scott Duplichan 08e9b6f72c CorebootPayloadPkg: Increase payload size limit
Increase payload size limit to accomodate large binaries, such as those
produced by Microsoft NOOPT builds and gcc DEBUG builds.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17148 6f19259b-4bc3-4df7-8a09-765794883524
2015-04-10 02:41:32 +00:00
Maurice Ma 9c228fb031 Pkg-Module: CorebootPayloadPkg
Initial coreboot UEFI payload code check in. It provides UEFI services on top of coreboot that allows UEFI OS boot.

CorebootPayloadPkg is source code package of coreboot Payload Modules, Provides definitions of payload image's layout and lists the modules required in DSC file.

It supports the following features:
  - Support Unified Extensible Firmware Interface (UEFI) specification 2.4.
  - Support Platform Initialization(PI) specification 1.3.
  - Support execution as a coreboot payload.
  - Support USB 3.0
  - Support SATA/ATA devices.
  - Support EFI aware OS boot.

The following features are not supported currently and have not been validated:
  - GCC Tool Chains
  - SMM Execution Environment
  - Security Boot

It was tested on a Intel Bay Trail CRB platform.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17081 6f19259b-4bc3-4df7-8a09-765794883524
2015-03-31 00:56:01 +00:00