Commit Graph

4 Commits

Author SHA1 Message Date
Ard Biesheuvel cdeb268cb0 BaseTools IA32/X64: drop redundant alignment from linker script
There is no need to pad out the end of a section of the start of
the following section is aligned to the same value. So drop the
redundant ALIGN() statements.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18132 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03 08:21:49 +00:00
Ard Biesheuvel fa1d29d5cc BaseTools IA32/X64: move .rodata to PE/COFF .text section
The .rodata ELF section contains constant non-executable data that
should never be modified by the program itself. Since the risk of
inadvertent modification is typically higher than the risk of
inadvertent execution, it makes sense to put this data in the
R-X .text section rather than in the RW- .data section.
So move it there.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18131 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03 08:21:39 +00:00
Ard Biesheuvel e90ba6e1ea BaseTools IA32/X64: remove NOP padding from X86/IA32 GCC linker scripts
The NOP padding in the GCC linker scripts ensures that all empty
regions in the ELF binary are filled with x86 NOP instructions.

There is no upside to doing this: if the CPU ends up executing these
instructions, we have little hope of resuming normal execution of the
program anyway. And having NOP slides in memory only makes it easier
for attackers to launch exploits. So remove them.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18130 6f19259b-4bc3-4df7-8a09-765794883524
2015-08-03 08:21:28 +00:00
Jordan Justen dafe0fedc5 BaseTools: Add GCC49 toolchain; align data sections to 0x40
GCC 4.9 may use 64-byte (0x40) alignment for data sections.

Therefore we use a different link script for GCC 4.9. The only
difference from the gcc4.4-ld-script is the alignment for data
sections.

When using the GCC48 toolchain with GCC 4.9, this error would be
encountered by GenFw:
> GenFw: ERROR 3000: Invalid
>   Unsupported section alignment.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Yingke Liu <yingke.d.liu@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15697 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-28 17:37:10 +00:00