Removing rules for Ipf sources file:
* Remove the source file which path with "ipf" and also listed in
[Sources.IPF] section of INF file.
* Remove the source file which listed in [Components.IPF] section
of DSC file and not listed in any other [Components] section.
* Remove the embedded Ipf code for MDE_CPU_IPF.
Removing rules for Inf file:
* Remove IPF from VALID_ARCHITECTURES comments.
* Remove DXE_SAL_DRIVER from LIBRARY_CLASS in [Defines] section.
* Remove the INF which only listed in [Components.IPF] section in DSC.
* Remove statements from [BuildOptions] that provide IPF specific flags.
* Remove any IPF sepcific sections.
Removing rules for Dec file:
* Remove [Includes.IPF] section from Dec.
Removing rules for Dsc file:
* Remove IPF from SUPPORTED_ARCHITECTURES in [Defines] section of DSC.
* Remove any IPF specific sections.
* Remove statements from [BuildOptions] that provide IPF specific flags.
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Prince Agyeman <prince.agyeman@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chen A Chen <chen.a.chen@intel.com>
Reviewed-by: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Ma, Maurice <maurice.ma@intel.com>
Current implemenation sets PM1_CNT.SCI_EN bit at ReadyToBoot event.
However, this should not be done because this causes OS to skip triggering
FADT.SMI_CMD, which leads to the functions implemented in the SMI
handler being omitted.
This issue was identified by Matt Delco <delco@google.com>.
The fix does the following:
- The SCI_EN bit setting is removed from CbSupportDxe driver.
- Some additional checks are added in CbParseFadtInfo() in CbParseLib.c to
output some error message and ASSERT (FALSE) if ALL of the following
conditions are met:
1) HARDWARE_REDUCED_ACPI is not set;
2) SMI_CMD field is zero;
3) SCI_EN bit is zero;
which indicates the ACPI enabling status is inconsistent: SCI is not
enabled but the ACPI table does not provide a means to enable it through
FADT->SMI_CMD. This may cause issues in OS.
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Prince Agyeman <prince.agyeman@intel.com>
Cc: Matt Delco <delco@google.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Matt Delco <delco@google.com>
Since UefiCpuPkg's CpuDxe Driver already adds Local Apic's MMIO space to
GCD, CorebootModulePkg's CbSupportDxe should not do this again. Doing this
again causes error return status from GCD service, and ASSERT (FALSE) with
debug build, so the duplicated addition is removed.
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Not all platforms have or support graphics. The ASSERT that the
frame buffer HOB is not NULL is fatal for these platforms. Convert
this into an if statement and make the related PcdSet* calls c
onditional on locating the frame buffer HOB.
Change-Id: Ibdc4bf5359571f3ce1555efcaf4657b8e363b2cd
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
The video console resolution related PCDs are required to be
initialized after switching to use the generic BdsDxe driver
in MdeModulePkg.
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
Convert TAB to white space for CbSupportDxe driver.
Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
All image entry point functions must use EFIAPI.
Some GCC toolchains will have a build error without this fix.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17154 6f19259b-4bc3-4df7-8a09-765794883524
Fix DEBUG print formats so that pointers and 64-bit integer values
display correctly for both 32-bit and 64-bit builds.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17153 6f19259b-4bc3-4df7-8a09-765794883524
Make OnReadyToBoot function match the prototype in UefiLib.h. The change
only affects gcc builds because EFIAPI ABI differs from the default ABI
when building with gcc.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17137 6f19259b-4bc3-4df7-8a09-765794883524
Initial coreboot UEFI payload code check in. It provides UEFI services on top of coreboot that allows UEFI OS boot.
CorebootModulePkg is the source code package of coreboot support modules that will be used to parse the coreboot tables and report memory/io resources.
It supports the following features:
- Support Unified Extensible Firmware Interface (UEFI) specification 2.4.
- Support Platform Initialization(PI) specification 1.3.
- Support execution as a coreboot payload.
- Support USB 3.0
- Support SATA/ATA devices.
- Support EFI aware OS boot.
The following features are not supported currently and have not been validated:
- GCC Tool Chains
- SMM Execution Environment
- Security Boot
It was tested on a Intel Bay Trail CRB platform.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17084 6f19259b-4bc3-4df7-8a09-765794883524
chenc2
Benjamin You
Leahy, Leroy P
Maurice Ma
Scott Duplichan