Commit Graph

421 Commits

Author SHA1 Message Date
Laszlo Ersek 84d21abf4e BaseTools/tools_def.template: rename GCC44_IA32_X64_DLINK_COMMON to GCC48_IA32_X64_DLINK_COMMON
GCC44_IA32_X64_DLINK_COMMON is only referenced by:
- GCC48_IA32_X64_ASLDLINK_FLAGS,
- GCC48_IA32_X64_DLINK_FLAGS.

Thus, we can rename ("raise") it to GCC48_IA32_X64_DLINK_COMMON.

(It's easier to review this patch with "git show --word-diff".)

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:43 +01:00
Laszlo Ersek 0db91daf52 BaseTools/tools_def.template: eliminate GCC44_IA32_X64_DLINK_FLAGS
GCC48_IA32_X64_DLINK_FLAGS is defined *wholly* as
GCC44_IA32_X64_DLINK_FLAGS, therefore:

- expand the contents of GCC44_IA32_X64_DLINK_FLAGS into
  GCC48_IA32_X64_DLINK_FLAGS,

- re-point all references of GCC44_IA32_X64_DLINK_FLAGS to
  GCC48_IA32_X64_DLINK_FLAGS,

- remove GCC44_IA32_X64_DLINK_FLAGS.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:43 +01:00
Laszlo Ersek 383d290968 BaseTools/tools_def.template: rename GCC44_ALL_CC_FLAGS to GCC48_ALL_CC_FLAGS
GCC44_ALL_CC_FLAGS is only referenced by:
- GCC48_IA32_CC_FLAGS,
- GCC48_X64_CC_FLAGS,
- GCC49_AARCH64_CC_FLAGS,
- CLANG38_ALL_CC_FLAGS.

Thus, we can rename ("raise") it to GCC48_ALL_CC_FLAGS.

(It's easier to review this patch with "git show --word-diff".)

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:43 +01:00
Laszlo Ersek 38c570efed BaseTools/tools_def.template: propagate loss of GCC44 references
The last patch decremented references on a number of DEFs. They can be
classified into three groups:

(a) those that remain used by multiple toolchains, or by multiple
definitions of a given toolchain (refcount >= 2):

- GCC_ASLCC_FLAGS
- GCC_ASLPP_FLAGS
- GCC_HOST_PREFIX
- GCC_IA32_RC_FLAGS
- GCC_PP_FLAGS
- GCC_VFRPP_FLAGS
- GCC_X64_RC_FLAGS
- IASL_FLAGS
- IASL_OUTFLAGS
- UNIX_IASL_BIN
- GCC44_IA32_X64_DLINK_FLAGS (!)

(b) those that are only used by GCC48 (refcount == 1):

- GCC44_ASM_FLAGS
- GCC44_IA32_CC_FLAGS
- GCC44_IA32_DLINK2_FLAGS
- GCC44_IA32_X64_ASLDLINK_FLAGS
- GCC44_X64_CC_FLAGS
- GCC44_X64_DLINK2_FLAGS
- GCC44_X64_DLINK_FLAGS

(c) those that are no longer used (refcount == 0):

- GCC44_IA32_PREFIX
- GCC44_X64_PREFIX

For the members of class (b), expand their definitions at the referring
sites, and remove their definitions.

For the members of class (c), remove their definitions.

(It's easier to review this patch with "git show --word-diff".)

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:43 +01:00
Laszlo Ersek e046dc60fb BaseTools/tools_def.template: remove GCC44 leaf definitions
Remove the "leaf" definitions for GCC44. These definitions are never
referenced in "tools_def.template", so their removal can't break other
definitions. Instead, their erasure turns other definitions into leaves
(subject to further removal).

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:43 +01:00
Laszlo Ersek 3e77d20f5c BaseTools/tools_def.template: remove GCC45 documentation
No GCC45 definitions exist at this point, so remove the GCC45
documentation too, from "tools_def.template".

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:43 +01:00
Laszlo Ersek 024576896d BaseTools/tools_def.template: propagate loss of GCC45 references
The last patch decremented references on a number of DEFs. They can be
classified into three groups:

(a) those that remain used by multiple toolchains (refcount >= 2):

- GCC_ASLCC_FLAGS
- GCC_ASLPP_FLAGS
- GCC_HOST_PREFIX
- GCC_IA32_RC_FLAGS
- GCC_PP_FLAGS
- GCC_VFRPP_FLAGS
- GCC_X64_RC_FLAGS
- IASL_FLAGS
- IASL_OUTFLAGS
- UNIX_IASL_BIN

(b) those that are only used by GCC48 (refcount == 1):

- GCC45_ASM_FLAGS
- GCC45_IA32_CC_FLAGS
- GCC45_IA32_DLINK2_FLAGS
- GCC45_IA32_X64_ASLDLINK_FLAGS
- GCC45_IA32_X64_DLINK_FLAGS
- GCC45_X64_CC_FLAGS
- GCC45_X64_DLINK2_FLAGS
- GCC45_X64_DLINK_FLAGS

(c) those that are no longer used (refcount == 0):

- GCC45_IA32_PREFIX
- GCC45_X64_PREFIX

For the members of class (b), expand their definitions at the referring
sites, and remove their definitions.

For the members of class (c), remove their definitions.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:43 +01:00
Laszlo Ersek 1458af0cbc BaseTools/tools_def.template: remove GCC45 leaf definitions
Remove the "leaf" definitions for GCC45. These definitions are never
referenced in "tools_def.template" (they are the last GCC45 mentions in
the file), so their removal can't break other definitions. Instead, their
erasure turns other definitions into leaves (subject to further removal).

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:43 +01:00
Laszlo Ersek be359fa7ce BaseTools/tools_def.template: remove GCC46 documentation
No GCC46 definitions exist at this point, so remove the GCC46
documentation too, from "tools_def.template".

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:43 +01:00
Laszlo Ersek 83a8f31388 BaseTools/tools_def.template: propagate loss of GCC46 references
The last patch decremented references on a number of DEFs. They can be
classified into three groups:

(a) those that remain used by multiple toolchains (refcount >= 2):

- GCC_ASLCC_FLAGS
- GCC_ASLPP_FLAGS
- GCC_HOST_PREFIX
- GCC_IA32_RC_FLAGS
- GCC_PP_FLAGS
- GCC_VFRPP_FLAGS
- GCC_X64_RC_FLAGS
- IASL_FLAGS
- IASL_OUTFLAGS
- UNIX_IASL_BIN

(b) those that are only used by GCC48 (refcount == 1):

- GCC46_ASM_FLAGS
- GCC46_IA32_CC_FLAGS
- GCC46_IA32_DLINK2_FLAGS
- GCC46_IA32_X64_ASLDLINK_FLAGS
- GCC46_IA32_X64_DLINK_FLAGS
- GCC46_X64_CC_FLAGS
- GCC46_X64_DLINK2_FLAGS
- GCC46_X64_DLINK_FLAGS

(c) those that are no longer used (refcount == 0):

- GCC46_IA32_PREFIX
- GCC46_X64_PREFIX

For the members of class (b), expand their definitions at the referring
sites, and remove their definitions.

For the members of class (c), remove their definitions.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:43 +01:00
Laszlo Ersek 0f234fb8a6 BaseTools/tools_def.template: remove GCC46 leaf definitions
Remove the "leaf" definitions for GCC46. These definitions are never
referenced in "tools_def.template" (they are the last GCC46 mentions in
the file), so their removal can't break other definitions. Instead, their
erasure turns other definitions into leaves (subject to further removal).

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:42 +01:00
Laszlo Ersek 91a67e0f11 BaseTools/tools_def.template: remove GCC47 documentation
No GCC47 definitions exist at this point, so remove the GCC47
documentation too, from "tools_def.template".

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:42 +01:00
Laszlo Ersek fc87b8d7f4 BaseTools/tools_def.template: propagate loss of GCC47 references
The last patch decremented references on a number of DEFs. They can be
classified into three groups:

(a) those that remain used by multiple toolchains (refcount >= 2):

- GCC_ASLCC_FLAGS
- GCC_ASLPP_FLAGS
- GCC_HOST_PREFIX
- GCC_IA32_RC_FLAGS
- GCC_PP_FLAGS
- GCC_VFRPP_FLAGS
- GCC_X64_RC_FLAGS
- IASL_FLAGS
- IASL_OUTFLAGS
- UNIX_IASL_BIN

(b) those that are only used by GCC48 (refcount == 1):

- GCC47_ASM_FLAGS
- GCC47_IA32_CC_FLAGS
- GCC47_IA32_DLINK2_FLAGS
- GCC47_IA32_X64_ASLDLINK_FLAGS
- GCC47_IA32_X64_DLINK_FLAGS
- GCC47_X64_CC_FLAGS
- GCC47_X64_DLINK2_FLAGS
- GCC47_X64_DLINK_FLAGS

(c) those that are no longer used (refcount == 0):

- GCC47_IA32_PREFIX
- GCC47_X64_PREFIX

For the members of class (b), expand their definitions at the referring
sites, and remove their definitions.

For the members of class (c), remove their definitions.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:42 +01:00
Laszlo Ersek 3c5613c593 BaseTools/tools_def.template: remove GCC47 leaf definitions
Remove the "leaf" definitions for GCC47. These definitions are never
referenced in "tools_def.template" (they are the last GCC47 mentions in
the file), so their removal can't break other definitions. Instead, their
erasure turns other definitions into leaves (subject to further removal).

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:42 +01:00
Laszlo Ersek 9bbf156faa BaseTools/tools_def.template: remove GCC48_IA32_X64_DLINK_COMMON dead-end
DLINK_COMMON definitions are not consumed by "build_rule.template";
instead, DLINK_COMMON definitions (internal to "tools_def.template") were
invented for sharing options between ASLDLINK_FLAGS and DLINK_FLAGS.

However, this intent doesn't actually apply to
GCC48_IA32_X64_DLINK_COMMON: it is never consumed. Furthermore, the
GCC45..GCC47 instances of IA32_X64_DLINK_COMMON too lead up to
GCC48_IA32_X64_DLINK_COMMON only -- they form a dead-end. Remove them
altogether, in order to simplify the subsequent patches.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:42 +01:00
Laszlo Ersek 7381a6627a BaseTools/tools_def.template: strip trailing whitespace
Whitespace just before line terminators is useless, remove it.

("git show -b" produces a null diff for this patch.)

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:42 +01:00
Laszlo Ersek 48e64498c9 BaseTools/tools_def.template: fix up LF-only line terminator
"tools_def.template" should only use CRLF line terminators, at this time.

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Fixes: 88e8498f8a
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-01-08 02:39:42 +01:00
Ard Biesheuvel 7a9dbf2c94 BaseTools/Conf/tools_def.template: drop ARM/AARCH support from GCC46/GCC47
This drops ARM and AARCH64 support from the GCC46 and GCC47 toolchain
definitions, which are on the list to be removed, along with VS2003,
VS2005, VS2008, VS2010, DDK3790, UNIXGCC, GCC44, GCC45, ELFGCC, CYGGCC,
ICC, ICC11 and MYTOOLS.

Since GCC46 and GCC47 are the only ones on that list that support ARM
and/or AARCH64, let's give Liming a hand and cover the ARM side of
things first, so that everything that remains to be removed is x86
only.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Liming Gao <liming.gao@intel.com>
[lersek@redhat.com: add bugzilla reference and CCs]
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-01-08 02:38:43 +01:00
Ard Biesheuvel 41203b9ab5 BaseTools/tools_def ARM: use softfloat target for CLANG3x
The 'arm-linux-gnueabihf' target triplet we use for CLANG35 and
CLANG38 specifies a hardfloat target, and so the binaries that are
emitted are annotated as using VFP registers for passing floating
point arguments, even though no VFP is used anywhere in the code.

This works fine as long as we don't try to link against code
that uses software floating point, but combining object files
with different floating point calling conventions is not permitted.

So switch to the softfloat arm-linux-gnueabi triplet instead.
This affects both the name Clang uses when invoking the linker,
and the arguments it passes to it, and we are mostly interested
in the latter (since any version of GNU ld.bfd will do the right
thing as long as it targets EABI ARM)

For native builds, this change has no effect, since the unprefixed
system linker will take priority, and so Clang will pass the right
arguments to whichever linker happens to be the system linker.

For cross builds, the fact that Clang composes the name of the
linker by prefixing '-ld' with the target triplet implies that
users will have to switch to a version of binutils that targets
arm-linux-gnueabi rather than arm-linux-gnueabihf. Note that the
GCCx toolchain targets can use either when building for ARM so this
does not create a need to install two versions of the ARM cross
toolchain. Also, note that all ARM toolchains in the GCC family
are already documented as requiring a toolchain that targets
arm-linux-gnueabi and not arm-linux-gnueabihf.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-12-23 15:56:02 +01:00
Ard Biesheuvel d05d5f6c85 BaseTools/tools_def ARM: emit PIC veneers
The ARM linker may emit veneers, i.e., trampolines, when ordinary
direct relative branches cannot be used, e.g., for Thumb interworking
or branch targets that are out of range.

Usually, such veneers carry an absolute reference to the branch
target, which is problematic for us, since these absolute references
are not covered by annotations that are visible to GenFw in the
PE/COFF conversion, and so these absolute references are not fixed
up by the PE/COFF loader at runtime.

So switch to all ARM GNU ld toolchains to position independent veneers.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-12-19 18:33:05 +01:00
zhijufan 7c3a1efd15 BaseTools: Update nasm file build rule to support $(INC)
https://bugzilla.tianocore.org/show_bug.cgi?id=1085
Update the build rule to:
"$(NASM)" -I${s_path}(+) $(NASM_INC) $(NASM_FLAGS)
-o $dst ${d_path}(+)${s_base}.iii

Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Bob Feng <bob.c.feng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Zhiju.Fan <zhijux.fan@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>
2018-12-18 14:07:40 +08:00
Ard Biesheuvel b048a2204d BaseTools/tools_def ARM CLANG35: work around -mno-movt option name change
PE/COFF only has a very limited id space for runtime relocations, and
so it defines only a single relocation for movw/movt instruction pairs,
which can be combined to load a 32-bit symbol reference into a register.
For this to work as expected, these instructions must always appear in
the same order and adjacently, and this is something few compilers take
into account, unless they target PE/COFF explicitly (and this is not the
case for our ELF based toolchains)

For Clang 3.6 and later, we can pass the -mno-movt option to suppress
movw/movt pairs entirely, which works around the issue. Unfortunately,
for Clang 3.5, the option is called differently (-mllvm -arm-use-movt=0)
and mutually incompatible between 3.5 and 3.6.

Since it is desirable for the CLANG35 toolchain to be usable on newer
versions of Clang as well (given that it is the only non-LTO alternative
to CLANG38), let's work around this issue in a way that permits versions
3.5 and newer of Clang to be used with the CLANG35 profile.

So pass the -mkernel flag instead (and add -Qunused-argument so Clang
does not complain about the -mno-unaligned-access in ARM_CC_XIPFLAGS).
This also inhibits movw/movt generation, along with some other changes
(e.g., long calls) which do affect code generation but not in an
undesirable manner.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-13 12:46:31 +01:00
Ard Biesheuvel de3c440e8a BaseTools/tools_def AARCH64 RELEASE: move GCC49/GGC5 to 4 KB alignment
Since 4 KB section alignment is required when mapping PE/COFF images
with strict permissions, update the default section alignment when
using GCC49 and GCC5 in RELEASE mode. Note that XIP modules such as
SEC, PEIMs or PEI core are not affected by this change, since the
override to 32 byte aligment remains in effect.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-11 14:51:18 +01:00
Liming Gao fc5217a999 BaseTools build_rule.template: Update aslc rule for XCODE tool chain
Update aslc rule to rename the temp output file from .efi to .pecoff.
This change can avoid the conflict .efi file name in output directory.
One is the driver image, another is aslc temp output file.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2018-11-05 11:02:46 +08:00
Liming Gao 88e8498f8a BaseTools tools_def.template: Add GCC link script option in ASLDLINK_FLAGS
GCC link script is used to discard the unused section data from ELF image.
ASLDLINK_FLAGS requires it to remove the unnecessary section data, then
GenFw can be used to retrieve the correct data section from ELF image.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2018-11-02 22:15:54 +08:00
Yonghong Zhu 9ddd4f7f94 BaseTools: Update the rule to remove .lib before link it for GCC
We met a case on GCC toolchain for increment build. the case is user
build Helloworld first, then rename the source file Helloworld.c to
Helloworld_new.c and also update the file name to Helloworld_new.c in
.inf file's [sources] section. finally, he rebuild it again.
It cause build failure due to multiple definition of `UefiMain' because
in the .lib file it both have Helloworld.obj and Helloworld_new.obj.
current we use the option 'cr' to create the .lib file while the 'r'
cmd means replace existing or insert new files into the archive. so
in this patch before we create the .lib file, we delete it first.

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-08-16 14:17:29 +08:00
Liming Gao f7496d7173 BaseTools: Clean up source files
1. Do not use tab characters
2. No trailing white space in one line
3. All files must end with CRLF

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2018-07-09 10:25:47 +08:00
Liming Gao 4adf7074eb BaseTools Conf: Update tools_def and build_rule to remove IPF setting
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2018-07-05 17:47:50 +08:00
Liming Gao e0fb2d3e5d BaseTools tools_def.template: Ignore link warning 4281 for VS2017
VS2017 reports warning LNK4281: undesirable base address 0x0 for x64 image;
set base address above 4GB for best ASLR optimization.

edk2 build always sets baes address to zero as default. So, ignore this link
warning.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Pete Batard <pete@akeo.ie>
2018-06-25 11:16:10 +08:00
Ard Biesheuvel 6d56ace57b BaseTools/tools_def CLANG35: add NOOPT build target
Create the missing NOOPT target for CLANG35 (which is ARM and AARCH64
only), and align it with the other toolchains: NOOPT has optimizations
disabled entirely (for source level debugging), and DEBUG is changed
from -O0 to -O1, as is the case for CLANG38 as well.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2018-06-18 20:03:03 +02:00
Ard Biesheuvel 11d0cd23dd BaseTools/tools_def IA32: drop -no-pie linker option for GCC49
As reported by Liming, GCC 4.9.2 does not support the -no-pie
linker option that we added to the GCC49 and GCC5 toolchain
profiles in commit c25d390552 ("BaseTools/tools_def IA32:
disable PIE code generation explicitly") to work around issues
with recent distro toolchains that enable PIE code generation
by default.

So rollback the changes for GCC49 but preserve them for GCC5

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-06-18 17:53:04 +02:00
Ard Biesheuvel c25d390552 BaseTools/tools_def IA32: disable PIE code generation explicitly
As a security measure, some distros now build their GCC toolchains with
PIE code generation enabled by default, because it is a prerequisite
for ASLR to be enabled when running the executable.

This typically results in slightly larger code, but it also generates
ELF relocations that our tooling cannot deal with, so let's disable it
explicitly when using GCC49 or later for IA32. (Note that this does not
apply to X64: it uses PIE code deliberately in some cases, and our
tooling does deal with the resuling relocations)

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-06-12 08:08:49 +02:00
Laszlo Ersek cbf00651ed BaseTools/tools_def: add "-fno-unwind-tables" to GCC_AARCH64_CC_FLAGS
The ElfConvert routines in GenFw don't handle the ".eh_frame" ELF section
emitted by gcc. For this reason, Leif disabled the generation of that
section for AARCH64 with "-fno-asynchronous-unwind-tables" in commit
28e80befa4 [1], and Ard did the same for IA32 and X64 in commit
26ecc55c02 [2]. (The CLANG38 toolchain received the same flag at its
inception, in commit 6f756db5ea [3].)

However, ".eh_frame" is back now; in upstream gcc commit 9cbee213b579 [4]
(part of tag "gcc-8_1_0-release"), both "-fasynchronous-unwind-tables" and
"-funwind-tables" were made the default for AARCH64. (The patch author
described the effects on the gcc mailing list [5].) We have to counter the
latter flag with "-fno-unwind-tables", otherwise GenFw chokes on
".eh_frame" again (triggered for example on Fedora 28).

"-f[no-]unwind-tables" goes back to at least gcc-4.4 [6], so it's safe to
add to GCC_AARCH64_CC_FLAGS.

[1] https://github.com/tianocore/edk2/commit/28e80befa4fe
[2] https://github.com/tianocore/edk2/commit/26ecc55c027d
[3] https://github.com/tianocore/edk2/commit/6f756db5ea05
[4] https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=9cbee213b579
[5] http://mid.mail-archive.com/7b28c03a-c032-6cec-c127-1c12cbe98eeb@foss.arm.com
[6] https://gcc.gnu.org/onlinedocs/gcc-4.4.7/gcc/Code-Gen-Options.html

Cc: "Danilo C. L. de Paula" <ddepaula@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Cole Robinson <crobinso@redhat.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reported-by: "Danilo C. L. de Paula" <ddepaula@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-05-23 16:54:18 +02:00
Liming Gao e243dfd12b BaseTools: Separate HOST and PREFIX env for GCC tool chain
The crossing GCC compiler may use the different path for make and gcc tool.
So, GCC_HOST_BIN is introduced for make path. GCC5_BIN is still kept for
gcc path. User needs to set GCC_HOST_BIN besides set GCC5_BIN env if
the default make is not used. Normally, make is in the default system path.
GCC_HOST_BIN is not required to be set.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2018-05-21 15:23:00 +08:00
Pete Batard e223efc60c BaseTools/Conf: Add /Gw optimisation option for VS2017 IA32 and X64
This option, which is used in VS2015 and earlier toolchains, was missing
for VS2017. Applying it greatly reduces the size of generated binaries.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-05-07 10:16:09 +08:00
Pete Batard 5aef7ba3ce BaseTools/Conf: Add VS2017/ARM64 support
Build options for ARM64 are the same as for ARM, except for /BASE:0
which is removed from DLINK flags to avoid LNK1355 error:
invalid base address 0x0; ARM64 image cannot have base address below 4GB

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-03-19 17:05:45 +08:00
Ard Biesheuvel a68749f39a BaseTools/tools_def: use separate PP definition for DTC
Clang's preprocessor behaves differently from GCC's, and produces
intermediate device tree source that still contains #pragma pack()
and other directives that the device tree compiler chokes on.

For assembling device tree sources, it matters very little which
preprocessor is being used, so let's just use GNU CPP explicitly.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-02-28 08:11:48 +00:00
Yonghong Zhu 2052cb675f BaseTools: not specified value of MAX_CONCURRENT_THREAD_NUMBER
when MAX_CONCURRENT_THREAD_NUMBER is not specified, tool will
automatically detect number of processor threads.

Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=775
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-02-09 08:33:46 +08:00
Pete Batard 0a4c903c5a BaseTools/Conf: Add VS2017/ARM support
We duplicate the Assembly-Code-File section from build_rule.template
because --convert-hex cannot be used with the MSFT ARM assembler.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-02-07 09:49:23 +08:00
Ard Biesheuvel 34a4ddda4d BaseTools/Conf: disable DTC legacy phandle format
By default, the device tree compiler emits phandle properties twice:
once called 'phandle' and again called 'linux,phandle'. Given that
Linux was updated in early 2010 [0] to accept the former (which is
what is specified in the ePAPR and device tree specifications), there
is no point in emitting both when compiling device trees for UEFI
platforms.

[0] 04b954a673dd02f585a2769c4945a43880faa989
"of/flattree: Make the kernel accept ePAPR style phandle information"

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-02-06 09:58:31 +00:00
Ard Biesheuvel faf0475b13 BaseTools/tools_def CLANG3x: ignore unknown warning options
Ironically, disabling warnings in the OpensslLib library build is
causing breakage when using the CLANG35 toolchain to build for ARM:

error: unknown warning option '-Werror=maybe-uninitialized'; did you mean '-Werror=uninitialized'? [-Werror,-Wunknown-warning-option]

So let's add -Wno-unknown-warning-option to the list of warnings to
ignore when using Clang 3.5, and move the same option from the x86
specific list to the shared list for Clang 3.8.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-01-22 11:17:04 +00:00
Liming Gao 2583352f24 BaseTools: Use nasm as the preferred assembly source files for XCODE5 tool
https://bugzilla.tianocore.org/show_bug.cgi?id=850

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2018-01-16 23:29:55 +08:00
Liming Gao db408fa3c1 BaseTools: Disable -Wno-unused-const-variable in XCODE5 RELEASE target
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Andrew Fish <afish@apple.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2018-01-16 23:29:37 +08:00
Liming Gao 24a105a7d8 BaseTools: Disable warning varargs in XCODE5 align to CLANG38
https://bugzilla.tianocore.org/show_bug.cgi?id=741

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2018-01-16 23:29:29 +08:00
Ard Biesheuvel 06c8a34cc4 BaseTool/tools_def GCC5: enable optimization for ARM/AARCH64 DEBUG builds
Enable optimization for DEBUG builds, to make it more usable in terms of
performance, and to give more coverage to the LTO builds. Also, some
diagnostics are only enabled when optimization is enabled.
NOOPT builds can now also be created, which will retain the behavior DEBUG
builds had previously.

Note that this aligns ARM and AARCH64 with the x86 architectures, which
already use optimization for DEBUG builds.

In order to preserve existing behavior for users of older toolchains,
keep GCC49 and older as-is.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-12-08 15:04:42 +00:00
Ard Biesheuvel 1a21d339cd BaseTools/tools_def CLANG38: add -Wno-unused-const-variable
Commit 8b6366f875 ("BaseTools/GCC: set -Wno-unused-const-variable
on RELEASE builds") suppresses warnings about unused constant
variables in RELEASE builds when building with GCC, given that they
break the build under our warnings-as-errors policy.

Do the same for CLANG38.

Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=790
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Shi Steven <steven.shi@intel.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-12-08 15:02:44 +00:00
Ard Biesheuvel f2a3131fbe BaseTools/tools_def: add CLANG38 LTO versions for AARCH64 and ARM
Extend the CLANG38 toolchain definition so it can be used for
ARM and AARCH64 as well. Note that this requires llvm-ar and
the LLVMgold.so linker plugin.

In preparation of doing the same for GCC5, this toolchain version
also departs from the custom of using -O0 for DEBUG builds, which
makes them needlessly slow. Instead, let's add a NOOPT flavor as
well, and enable optimization for DEBUG like the other architectures
do. (Note that this will require some trivial changes to the platform
description files)

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-12-08 15:02:12 +00:00
Liming Gao 1d0d15522a BaseTools: Add VS2017 tool chain in BaseTools tools_def.template
VS2017 tool chain enables /WHOLEARCHIVE linker option
Split host-related and arch-related elements

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2017-11-29 16:03:11 +08:00
Ard Biesheuvel 14ca435fb6 BaseTools/tools_def AARCH64 ARM: suppres PIE sections via linker script
Recent distro builds of GCC 6 enable PIE linking by default, and allow
the previous behavior to be restored by passing the -no-pie command line
argument. Support for this was implemented by commits 1894a7c64c and
3380a59123 but unfortunately, it turns out that GCC 5 does not support
this command line argument, and exits with an error.

To avoid the need for yet another toolchain tag, to distinguish between
GCC 5 and GCC 6, let's use our GCC linker scripts when building objects
from .aslc files. This will ensure that the extra sections that are added
by the PIE linker are discarded from the ELF binary, and so they will not
corrupt the resulting .acpi file.

This reverts

1894a7c64c BaseTools/tools_def AARCH64 ARM: disable PIE linking
3380a59123 BaseTools/tools_def AARCH64 ARM: disable PIE linking for .aslc sources

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-11-23 10:44:53 +00:00
Ard Biesheuvel 3380a59123 BaseTools/tools_def AARCH64 ARM: disable PIE linking for .aslc sources
Commit 1894a7c64c ("BaseTools/tools_def AARCH64 ARM: disable PIE
linking") works around an issue that was caught due to the fact that
PIE linking produces broken .acpi files. However, v2 of that fix
inadvertently only applied the workaround to the normal linker command
line, and not to the ASLD one, so the issue still persists.

So add the missing -no-pie options for ASLD on ARM and AARCH64.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-11-01 15:18:10 +00:00
Ard Biesheuvel 8512fc5731 BaseTools/tools_def: suppress GCC predefined macros in DTB compilation
The standard GCC preprocessor we use to preprocess device tree source
files has a whole bunch of macros predefined, among which

  #define __linux 1
  #define __linux__ 1
  #define __gnu_linux__ 1
  #define linux 1

This causes a property like 'linux,code' to be converted into '1,code'
which is obviously wrong. So let's get rid of all the predefined macros
by passing -undef to the preprocessor command line.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-10-27 13:53:00 +01:00
Ard Biesheuvel 1894a7c64c BaseTools/tools_def AARCH64 ARM: disable PIE linking
Some prebuilt GCC toolchains targeting aarch64 (e.g., the Debian Stretch
one) will default to building PIE executables. This has been observed to
corrupt ACPI tables built from .aslc sources, so disable PIE linking
altogether when using the GCC toolchain to build for AARCH64 or ARM.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-10-27 13:49:40 +01:00
Ard Biesheuvel 424a5ec33b BaseTools/tools_def AARCH64: enable frame pointers for RELEASE builds
Commit 8f0b62a5da ("BaseTools/tools_def AARCH64: enable frame pointers
for DEBUG builds") removed the -fomit-frame-pointer switch from the CFLAGS
definitions that are shared between AARCH64 DEBUG and RELEASE builds, and
moved it to the RELEASE specific ones, so that DEBUG builds can produce a
backtrace when a crash occurs.

This is actually a useful thing to have for RELEASE builds as well. AArch64
has 30 general purpose registers, and so the performance hit of having a
frame pointer is unlikely to be noticeable, nor are the additional 8 bytes
of stack space likely to present a problem.

So remove -fomit-frame-pointer altogether this time.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-09-19 09:39:48 -07:00
Thomas Lamprecht 8b6366f875 BaseTools/GCC: set -Wno-unused-const-variable on RELEASE builds
TianoCore BZ#700 [1]

Set the '-Wno-unused-const-variables' in RELEASE builds with the
GGC49 and GCC5 toolchain.

This fixes the RELEASE build of OVMF with GCC in version 6 or newer.
GCC 6 added the '-Wunused-const-variable' warning, which gets
activated by '-Wunused-variable' and has the following behavior:
"Warn whenever a constant static variable is unused aside from its
declaration" [2]

Commit 2ad6ba80a1 introduced a case
where exactly this happens on a RELEASE build. All uses of the static
const variable are located in debug code only, which gets thrown out
by the compiler on RELEASE builds and thus triggers the
unused-const-variable warning.

There is currently no GCC 6 toolchain target defined and doing so
would add a lot of boilerplate code. Instead, use the fact that GCC
ignores unknown '-Wno-*' options:

"[...] if the -Wno- form is used [...] no diagnostic is produced for
-Wno-unknown-warning unless other diagnostics are being produced"

This behavior is available in GCC 4.9 [3] (and also earlier, for that
matter), so add the flag to the GCC49 and GCC5 toolchain, even if
both GCC versions do not supports it.
GCC49 doesn't enables LTO whereas GCC5 does. As GCC 6.0 through 6.2
had bugs relating to LTO there can be desire to use the GCC49 target
even if compiling with GCC 6, see 432f1d83f7.

Orient the changes on 20d00edf21 which moved the
'-Wno-unused-but-set-variable' flag to RELEASE builds only, as there
it ensure that it does not gets raised if the only usage of a
variable is in (then collapsed) debug code.

[1] https://bugzilla.tianocore.org/show_bug.cgi?id=700
[2] https://gcc.gnu.org/onlinedocs/gcc-6.4.0/gcc/Warning-Options.html#index-Wunused-const-variable
[3] https://gcc.gnu.org/onlinedocs/gcc-4.9.0/gcc/Warning-Options.html

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
[lersek@redhat.com: fix typo in subject]
2017-09-08 20:58:54 +02:00
Ard Biesheuvel f29ca8e8b9 BaseTools/Gcc ARM AARCH64: add support for building device tree binaries
While modern AARCH64 server systems use ACPI for describing the platform
topology to the OS, ARM systems and AARCH64 outside of the server space
mostly use device tree binaries, which are compiled from device tree
source files using the device tree compiler.

Currently, such source files and binaries may be kept in the EDK2 platform
trees, but are not integrated with the build, which means they need to be
kept in sync and recompiled manually, which is cumbersome.

So let's wire up BaseTools support for them: add tool definitions for the
DTC compiler and preprocessor flags that allow these source files to use
FixedPcd expressions and other macros defined by AutoGen.h

This way, a device tree binary can be built from source and emitted into
a FFS file automatically using something like:

  DeviceTree.inf:
    [Defines]
      INF_VERSION    = 0x00010019
      BASE_NAME      = SomePlatformDeviceTree
      FILE_GUID      = 25462CDA-221F-47DF-AC1D-259CFAA4E326 # gDtPlatformDefaultDtbFileGuid
      MODULE_TYPE    = USER_DEFINED
      VERSION_STRING = 1.0

    [Sources]
      SomePlatform.dts

    [Packages]
      MdePkg/MdePkg.dec

  SomePlatform.fdf:
    INF RuleOverride = DTB xxx/yyy/DeviceTree.inf

    [Rule.Common.USER_DEFINED.DTB]
      FILE FREEFORM = $(NAMED_GUID) {
        RAW BIN                |.dtb
      }

where it can be picked at runtime by the DTB loader that may refer to it
using gDtPlatformDefaultDtbFileGuid.

Note that this is very similar to how ACPI tables may be emitted into a
FFS file with a known GUID and picked up by AcpiTableDxe at runtime.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-08-31 08:59:00 +01:00
Liming Gao f3f0bd168f BaseTools: Enable --whole-archive in GCC tool chain as the default option
https://bugzilla.tianocore.org/show_bug.cgi?id=581

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2017-08-31 15:18:59 +08:00
Shi, Steven 47bfbd7f80 BaseTools/Conf: Support LLVM39 and LLVM40 in CLANG38 toolchain
https://bugzilla.tianocore.org/show_bug.cgi?id=676
Add LLVM39 and LLVM40 support in CLANG38 toolchain

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-08-29 09:30:33 +08:00
Liming Gao 578211b882 BaseTools: Support /WHOLEARCHIVE option in VS2015 tool chain
https://bugzilla.tianocore.org/show_bug.cgi?id=582

Don't enable this option in the default setting, because it may cause VS2015
linker crash. Platform can enable this option in PlatformPkg.dsc like below:
[BuildOptions]
*_*_*_DLINK2_FLAGS = /WHOLEARCHIVE

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2017-08-29 09:30:31 +08:00
Liming Gao 02739b0f41 BaseTools: Update tools_def to remove /Gw option in VS NOOPT target
To remove /Gw option is to disable size optimization.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2017-08-25 11:20:54 +08:00
Liming Gao 2f7f1e73c1 BaseTools: Add the missing -pie link option in GCC tool chain
https://bugzilla.tianocore.org/show_bug.cgi?id=671
GCC tool chain uses -fpie in CC_FLAGS. So, add -pie in DLINK_FLAGS.
More discussion in
https://lists.01.org/pipermail/edk2-devel/2017-August/013508.html

3.13 Options for Linking
========================
'-pie'
     Produce a position independent executable on targets that support
     it.  For predictable results, you must also specify the same set
     of options used for compilation ('-fpie', '-fPIE', or model
     suboptions) when you specify this linker option.

3.18 Options for Code Generation Conventions
============================================
'-fpie'
'-fPIE'
     These options are similar to '-fpic' and '-fPIC', but generated
     position independent code can be only linked into executables.
     Usually these options are used when '-pie' GCC option is used
     during linking.
     '-fpie' and '-fPIE' both define the macros '__pie__' and
     '__PIE__'. The macros have the value 1 for '-fpie' and 2 for
     '-fPIE'.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2017-08-25 11:19:56 +08:00
Chris Ruffin 8853c2afc5 BaseTools/Conf: apply nasmb, asm16 build rule order
Prioritize nasmb rule over asm16 where both source types are specified.

Change-Id: I33ec348dab66b313ddb05cb15f2d8407a648c320
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chris Ruffin <chris.ruffin@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-08-07 13:33:34 +08:00
Ard Biesheuvel 0df6c8c157 BaseTools/tools_def AARCH64: avoid SIMD registers in XIP code
XIP code may execute with the MMU off, in which case all memory accesses
should be strictly aligned to their size. Some versions of GCC violate
this restriction even when -mstrict-align is passed, when performing
loads and stores that involve SIMD registers. This is clearly a bug in
the compiler, but we can easily work around it by avoiding SIMD registers
altogether when building code that may execute in such a context. So add
-mgeneral-regs-only to the AARCH64 XIP CC flags.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-07-14 17:28:49 +01:00
Ard Biesheuvel 6d73863b54 BaseTools/tools_def AARCH64: mark register x18 as reserved
The AArch64 ABI classifies register x18 as a platform register, which
means it should not be used unless the code is guaranteed to run on a
platform that doesn't use it in such a capacity.

GCC does not honour this requirement by default, and so we need to tell
it not to touch it explicitly, by passing the -ffixed-x18 command line
option.

Link: https://bugzilla.tianocore.org/show_bug.cgi?id=625
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-07-14 17:28:49 +01:00
Liming Gao f7bd152c2a BaseTools: Update tools_def.template to remove old XCLANG and XCODE32
https://bugzilla.tianocore.org/show_bug.cgi?id=562
https://bugzilla.tianocore.org/show_bug.cgi?id=563

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2017-07-05 13:22:46 +08:00
Yonghong Zhu 75f0094ef7 BaseTools: add /Gw to CC_FLAGS for VS2013 and higher tool chain tags
The /Gw flag does a better job at size optimization than use of the
GLOBAL_REMOVE_IF_UNREFERENCED macro that is currently used for VS20xx
tool chains to remove unreferenced global variables.
This patch add /Gw to CC_FLAGS for VS2013 and higher tool chain tags.

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2017-06-23 12:24:49 +08:00
Ard Biesheuvel 9ba8baae15 BaseTools/tools_def: AARCH64: disable LTO type mismatch warnings
On AARCH64, any code that may execute with the MMU off needs to be built
with -mstrict-align, given that unaligned accesses are not allowed unless
the MMU is enabled. This does not only affect SEC and PEI modules, but
also static libraries of the BASE type, which may be linked into such
modules, as well as into modules of other types. As it turns out, the
presence of -mstrict-align is reflected in the internal representations
of the types defined in those libraries.

When -fstrict-aliasing is passed to GCC, it assumes that pointers to
objects of different types cannot refer to the same memory location, and
attempts to exploit this fact when optimizing the code. Since such
assumptions are only valid under very strict conditions which are not
guaranteed to be met in EDK2, we disable this optimization by passing
-fno-strict-aliasing by default. [*]

When LTO is in effect, this applies equally to the code generation that
may occur at link time, which is why the linker warns about unexpected
differences in type definitions between the intermediate representations
that are present in the object files being linked. This may result in
warnings such as the one below, even if -fno-strict-aliasing is used:

  MdePkg/Include/Library/BaseLib.h:1712:1:
  warning: type of 'StrToGuid' does not match original declaration
  [-Wlto-type-mismatch]
   StrToGuid (
   ^
  MdePkg/Library/BaseLib/SafeString.c:1506:1:
  note: 'StrToGuid' was previously declared here
   StrToGuid (
   ^
  MdePkg/Library/BaseLib/SafeString.c:1506:1:
  note: code may be misoptimized unless -fno-strict-aliasing is used

This warning is inadvertently triggered when linking BASE libraries built
with -mstrict-align into modules of types other than SEC or PEI, since the
types are subtly different, even though the use of code that maintains
strict alignment in a module that does not care about this is unlikely to
cause problems. And even if it did, it would still only affect code built
with -fstrict-aliasing enabled, which we disable unconditionally. So let's
just silence the warning by passing -Wno-lto-type-mismatch.

[*] Leif adds: "-fstrict-aliasing is GCC default, because it is a
    restriction in the C language. Because it's a bit non-obvious, things
    can go hilariously wrong in very non-obvious ways, and the potential
    optimization gains are unlikely to be generally relevant,
    -fno-strict-aliasing is a sensible thing to always have set (like we
    do)."

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2017-06-22 11:07:02 +00:00
Ard Biesheuvel fa6080138c BaseTools/tools_def GCC: ARM/AARCH64: drop -save-temps from command line
For historical reasons, GCC builds for ARM and AARCH64 pass the
-save-temps command line option to GCC, which instructs the compiler
to preserve intermediate files, i.e., preprocessor output and generated
assembler. Given that this clutters up the Build directory, and slows
down the build, let's remove it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-06-22 11:06:49 +00:00
dann frazier a6b5380642 BaseTools/GCC ARM/AARCH64: Force disable PIE
After Debian's toolchain switched to PIE by default, our edk2 builds began
to fail to build (GCC49 w/ gcc 6.3). This patch fixes the build by forcing
off PIE for both ARM and AARCH64 builds.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: dann frazier <dannf@debian.org>

Add -fno-pic as well for ARM.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-06-01 08:30:23 +00:00
Michael Kinney 3e1d93c32e BaseTools: Clean up tools_def.template for XCODE5
Reorganize the statements for XCODE5 to match other tool
chains and remove dependency on XCLANG and XCODE32

Cc: Andrew Fish <afish@apple.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2017-05-19 15:05:33 -07:00
Michael Kinney bdaced0bcf BaseTools: Add -D NO_MSABI_VARGS to X64 XCODE5 CC_FLAGS
https://bugzilla.tianocore.org/show_bug.cgi?id=561

Update BaseTools/Conf/tools_def.template to add the define

-D NO_MSABI_VAARGS

To CC_FLAGS for X64 XCODE5 builds.

The llvm/clang compiler used in XCODE5 builds supports the
_ms_ versions of the vararg builtins, but the compiler
generates build errors.

The recommendation from the XCODE5 experts is to never use
the _ms_ version of the vararg builtins.  The define
NO_MSABI_VARARGS is already supported in MdePkg/Include/Base.h
and forces the use the standard vararg builtins.

Cc: Andrew Fish <afish@apple.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
2017-05-19 15:05:25 -07:00
Liming Gao ab200776cd BaseTools: Add option in CLANG38 to disable warning unknown-warning-option
https://bugzilla.tianocore.org/show_bug.cgi?id=466

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2017-04-11 14:21:34 +08:00
Liming Gao 90defe7198 BaseTools: Update tools_def.template to add -fno-builtin in GCC tool chain
Now, -fno-builtin option is added for the specific GCC tool chain.
It is a generic option. It can be moved to common GCC option to keep
the consistent compiler option.

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Suggested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
2017-04-06 16:03:33 +08:00
Ard Biesheuvel c2d56a894b BaseTools/GCC AARCH64: force disable PIC code generation
As a security measure, some distro toolchains now default to PIC code
generation, allowing executables (as opposed to shared libraries) using
the objects to be built as PIE binaries, which can be loaded at a random
virtual offset.

However, our ELF to PE/COFF generation code does not deal with the
resulting relocation types (i.e., GOT based), and so the use of PIC code
leads to GenFw errors.

Given that
a) our non-PIC PE/COFF executables are already relocatable,
b) PIC code leads to all symbol references to be indirected via GOT
   entries containing absolute addresses, each requiring an entry in the
   relocation table,
c) the AArch64 ISA makes it perfectly feasible to built PIE executables
   from non-PIC code,

there is absolutely no upside to using PIC code for building EDK2 modules,
and so we're better off simply disabling it unconditionally.

Note that when running under the OS, the GOT has an additional advantage,
i.e., that all .text/.rodata pages remain clean and so can be shared between
processes. This does not apply to the UEFI environment, however.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
2017-03-31 10:34:34 +01:00
Song, BinX 87d97b6a77 BaseTools: Add Brotli algorithm tool
- Add Brotli algorithm tool support

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Bell Song <binx.song@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2017-03-29 12:14:43 +08:00
Marvin Haeuser b88aa9c3d3 BaseTools/tools_def: Use armv7-a for CLANG35 ARM compilations.
Define "-march=armv7-a" - which is used by the GCC toolchains - for
ARM CLAMNG35 builds to fix compilation of the MemoryFence ASM.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Marvin Haeuser <Marvin.Haeuser@outlook.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2017-03-22 12:54:49 +08:00
Liming Gao 296153c5bf BaseTools: Add NOOPT target in CLANG38 tool chain
https://bugzilla.tianocore.org/show_bug.cgi?id=310

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2017-02-13 15:25:25 +08:00
Liming Gao 86a1eca210 BaseTools tools_def.txt: Include AutoGen.h in GCC ASLPP_FLAGS
https://bugzilla.tianocore.org/show_bug.cgi?id=227
Refer to VS ASLPP_FLAGS, force include AutoGen.h so that ASL code
can use FixedPcdGetXX to get FixedPcd value.

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2016-11-16 09:50:11 +08:00
Liming Gao 8ccd619c74 BaseTools tools_def.txt: Remove -P option in GCC ASLPP_FLAGS
https://bugzilla.tianocore.org/show_bug.cgi?id=227

After -P option is removed, the generated preprocessed ASL file will have
line markers. The extra information can be removed by Trim script. ASL code
can refer to the definition in C source file. This has been supported in
VS and XCODE tool chains.

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2016-11-16 09:50:07 +08:00
Yonghong Zhu 90a4021967 BaseTools:introduce PREFIX env for VS tool path
This patch introduce PREFIX env for VS tool path for tools_def.template
file.

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-11-02 10:00:31 +08:00
Yonghong Zhu 4b8234d054 BaseTools: support the NOOPT target with the GCC tool chains
Update the tools_def.template to add NOOPT support with GCC tool chains.
Also disable -flto and -Os in NOOPT target for GCC5.

Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Bruce Cran <bruce.cran@sandisk.com>
2016-10-12 07:17:00 +08:00
Yonghong Zhu 333ba578fe BaseTools: support generating image package from BMP/JPEG/PNG files
BaseTools add support to generating image package from BMP/JPEG/PNG
files.
1) New file type *.idf Image definition file to describe HII image
resource. It is the ASCII text file, and includes one or more "#image
IMAGE_ID [TRANSPARENT] ImageFileName".
2) New IMAGE_TOKEN macro is used to refer to IMAGE_ID.
3) New AutoGen header file $(MODULE_NAME)ImgDefs.h to include the
generated ImageId definition.
4) New $(MODULE_NAME)Idf.hpk or $(MODULE_NAME)Images are generated
as the output binary HII image package.

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-09-27 09:43:28 +08:00
Ard Biesheuvel 8f0b62a5da BaseTools/tools_def AARCH64: enable frame pointers for DEBUG builds
Enable frame pointers on DEBUG builds so we can support backtraces in
crash dumps.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-09-07 17:22:27 +01:00
Yonghong Zhu cd1c960469 BaseTools: Add the PKCS7 tool
Provide the PKCS7 Tool to support the CertType - EFI_CERT_TYPE_PKCS7_GUID,
then user can use this tool to add EFI_FIRMWARE_IMAGE_AUTHENTICATION
for a binary.

Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-19 15:33:25 +08:00
Shi, Steven 6d732bbbc2 BaseTools-CLANG38: Add -O3 in DLINK2 flag
CLANG38 build fail after CC_FLAG is added in the link rule.
This failure is because the CLANG38 enable the LTO through LLVMgold.so
linker plugin, but the LLVMgold.so plugin cannot accept the clang -Oz
CC flag as build option. After CC_FLAG is added in the link rule,
the LLVMgold.so plugin reports linking error. LLVMgold.so only accept
-O0 ~ -O3, and you can see it in the LLVM gold plugin source code
in below:

http://llvm.org/svn/llvm-project/llvm/tags/RELEASE_380/final/tools/gold/
gold-plugin.cpp line173:

if (opt[1] < '0' || opt[1] > '3')
   message(LDPL_FATAL, "Optimization level must be between 0 and 3");

Add -O3 in the *_CLANG38_*_DLINK2_FLAGS to override the -Oz flag in
*_CLANG38_*_CC_FLAGS to pass LLVMgold.so linking.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-19 12:58:37 +08:00
Ard Biesheuvel d977ba4406 BaseTools RVCT: ignore various RVC diagnostics
This updates the RVCT CC flags so various diagnostics that trigger
warnings-as-errors are silenced. In particular, RVCT complains about
missing newlines at the end of source files, mixing of enums and int
values and return statements followed by a break, all of which occur
in the Tianocore codebase, but none of which are actual errors in the
code. So just silence them.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-12 09:04:13 +02:00
Ard Biesheuvel ff59570f41 BaseTools ARM AARCH64: drop redundant compiler arguments
The ARM and AARCH64 CC_FLAGS definitions include both GCC_ALL_CC_FLAGS
and GCC44_ALL_CC_FLAGS, resulting in many of the compiler arguments
being passed twice. Since the CLANG35 definitions do not refer to
GCC44_ALL_CC_FLAGS, drop the reference for GCCx as well.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-12 09:02:20 +02:00
Ard Biesheuvel 6f8ecc41d7 BaseTools ARM AARCH64: pass CC flags to linker for XIP modules as well
Commit 478f50990a ("BaseTools GCC: add the compiler flags to the linker
command line") added the compiler flags to the linker command line,
which is required for LTO to function correctly, since it involves code
generation at link time.

This patch failed to update the build rules for XIP modules on AARCH64,
which not only requires the ordinary CC flags but also the XIP CC flags
to prevent the LTO backend to, e.g., emit code that does not adhere to
the strict alignment rules we impose for code that may execute with the
MMU off.

So update the XIP link rules as well. Since AARCH64 and ARM are not
supported by any toolchains in the GCCLD build rule family, drop the
reference to GCCLD while we're at it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-12 09:01:58 +02:00
Shi, Steven 6f756db5ea BaseTools-Conf:Introduce CLANG38 new toolchain for x86
This adds support for LLVM 3.8.x in LTO mode for IA32 and X64.
CLANG38 enable LLVM Link Time Optimization (LTO) and code size
optimization flag (-Oz) by default for aggressive code size
improvement. CLANG38 X64 code is small code model + PIE.

CLANG LTO needs PIE in link flags to generate PIE code correctly,
otherwise the PIE is not really enabled. (e.g. OvmfPkgX64 will
hang in 64bits SEC at high address because of small model code
displacement overflow).

Test pass platforms: OVMF (OvmfPkgIa32.dsc, OvmfPkgX64.dsc and
OvmfPkgIa32X64.dsc).
Test compiler and linker version: LLVM 3.8, GNU ld 2.26.

Example steps to use the CLANG38 tool chain to build OVMF platform:
1. Download and extract the llvm 3.8.0 Pre-Built Binaries from
http://www.llvm.org/releases/ (e.g. http://www.llvm.org/releases/
3.8.0/clang+llvm-3.8.0-x86_64-linux-gnu-ubuntu-16.04.tar.xz and
extract it as ~/clang38).
2. Copy LLVMgold.so from https://github.com/shijunjing/edk2/blob/
llvm/BaseTools/Bin/LLVMgold.so to above clang lib folder (e.g.
~/clang38/lib/LLVMgold.so)
3. Install new version linker with plugin support (e.g. ld 2.26 in
GNU Binutils 2.26 or Ubuntu16.04)
$ cd edk2
$ git checkout llvm
$ export CLANG38_BIN=path/to/your/clang38/
(e.g. export CLANG38_BIN=~/clang38/bin/)
$ source edksetup.sh
$ make -C BaseTools/Source/C
$ build -t CLANG38 -a X64 -p OvmfPkg/OvmfPkgX64.dsc -n 5 -b DEBUG
-DDEBUG_ON_SERIAL_PORT
$ cd edk2/Build/OvmfX64/DEBUG_CLANG38/FV
$ qemu-system-x86_64.exe -bios OVMF.fd -serial file:serial.log -m 4096
 -hda fat:.

If you want, you can build and install GNU Binutils 2.26 as below steps
in Ubuntu:
Download binutils-2.26 source code from http://ftp.gnu.org/gnu/binutils/
 and extract it to ~/binutils-2.26
$sudo apt-get install bison
$sudo apt-get install flex
Install other necessary binutils build tools if missing
$ mkdir build
$ cd build
$ ../binutils-2.26/configure --enable-gold --enable-plugins
--disable-werror --prefix=/usr
$ make -j 5
$ sudo make install

If you want, you can build LLVMgold.so as below steps
Download llvm-3.8.0 source code from http://www.llvm.org/releases/
3.8.0/llvm-3.8.0.src.tar.xz and extract it to ~/llvm-3.8.0.src
Download clang3.8.0 source code from http://www.llvm.org/releases/
3.8.0/cfe-3.8.0.src.tar.xz and extract it to ~/llvm-3.8.0.src/tools/clang
Refer http://clang.llvm.org/get_started.html to Install other necessary
clang build tools if missing
$ mkdir llvm38build
$ cd llvm38build
If your GNU Binutils 2.26 is in /home/jshi19/binutils-2.26,
$ cmake ../llvm-3.8.0.src -G "Unix Makefiles" -DCMAKE_BUILD_TYPE="Release"
-DLLVM_TARGETS_TO_BUILD="X86" -DCMAKE_VERBOSE_MAKEFILE=ON
-DCMAKE_CXX_COMPILER="/usr/bin/g++" -DCMAKE_C_COMPILER="/usr/bin/gcc"
-DLLVM_BINUTILS_INCDIR=/home/jshi19/binutils-2.26/include
$ make -j 5 LLVMgold The LLVMgold.so is in ~/llvm38build/lib/LLVMgold.so

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-10 12:56:34 +08:00
Shi, Steven b5e006edb9 BaseTools-Conf:Remove short dash in ar flag for LLVM
Both binutils ar and LLVM ar support "cr", but LLVM ar doens't
support add "-" in the flags, and llvm-ar cannot accept "-cr".
So remove the short dash "-" to make llvm archives work.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2016-08-10 12:56:27 +08:00
Ard Biesheuvel 0f73cca02b BaseTools ARM: impose strict alignment only for XIP modules
Given that we only support ARMv7 and up in Tianocore (due to the fact
that the PI spec mandates that the PEI services table pointer be stored
in the TPIDRURW register, which is not available on earlier CPUs), we can
assume that any code executing with the MMU on may perform unaligned
accesses (since the AArch32 bindings in the UEFI spec stipulate that
unaligned accesses should be allowed if supported by the CPU)

So relax the alignment restrictions to XIP modules only, i.e., BASE, SEC,
PEI_CORE and PEIM type modules, exactly like we do for AARCH64 already.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-09 09:50:05 +02:00
Ard Biesheuvel 3cdbd7528b BaseTools CLANG35: add missing XIP flags for AARCH64
When building for AARCH64, code that may execute with the MMU off should
not perform unaligned accesses, which is why we set -mstrict-align for
BASE, SEC, PEI_CORE and PEIM modules when building with GCCx. However,
this setting is missing from CLANG35 so set it there as well.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-09 09:49:57 +02:00
Ard Biesheuvel 0667e98527 BaseTools GCC/ARM: add -fno-builtin to CC flags
Avoid build errors when including OpensslLib, which may throw
undefined reference errors for builtin functions if -fno-builtin
is not specified (and it is already set for IA32, X64 and AARCH64)
So set it for ARM as well.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-05 16:32:36 +02:00
Ard Biesheuvel 478f50990a BaseTools GCC: add the compiler flags to the linker command line
Now that we invoke GCC as the linker for the GCC toolchain family,
we can pass the CC flags to the linker as well. This is only
required for LTO (which may involve code generation during the link
stage), but does not interfere with non-LTO builds.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-03 17:41:59 +02:00
Ard Biesheuvel f8d0b96629 BaseTools GCC5: disable warnings-as-errors for now
GCC5 runs in LTO mode, which means it may generate code from an
intermediate representation during the link stage, at which time
additional diagnostics are run that may emit warnings.

Some of these warnings seem to be spurious, e.g., the following
warning which is emitted when building OVMF for IA32 or ArmVirtQemu
for ARM (but not for X64 resp. AARCH64)

  .../MdeModulePkg/Library/UefiHiiLib/HiiLib.c:
                 In function 'HiiCreateGuidOpCode.constprop':
  .../MdeModulePkg/Library/UefiHiiLib/HiiLib.c:3228:10:
                 error: function may return address of local variable
                                            [-Werror=return-local-addr]
     return (UINT8 *)OpCodePointer;
            ^
  .../MdeModulePkg/Library/UefiHiiLib/HiiLib.c:3208:17: note: declared here
     EFI_IFR_GUID  OpCode;
                   ^
  lto1: all warnings being treated as errors
  lto-wrapper: fatal error: gcc returned 1 exit status

So before adding the contents of CC_FLAGS to the linker command line,
defuse the default '-Werror' by adding '-Wno-error' to DLINK2_FLAGS
for GCC5.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-03 17:41:54 +02:00
Ard Biesheuvel 108c5b6018 BaseTools GCC: move -c compiler flag to build rules
In order to be able to share the compiler flags with the linker (which
is required for LTO since it involves the linker doing code generation
based on the LTO bytecode), move the -c GCC argument to the build rules,
and drop it from the GCC CC_FLAGS definitions in tools_def.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-03 17:41:41 +02:00
Ard Biesheuvel b89919ee8f BaseTools AARCH64: override XIP module linker alignment to 32 bytes
Now that GenFw converts small code model ADRP instructions to ADR on
the fly, we can reduce the alignment for XIP modules, where large
alignment values may cause considerable waste of flash space due to
excessive padding. This limits the module size to 1 MB, but this is
not a concern in practice.

So set the XIP section alignment to 0x20 for DEBUG_GCC49, DEBUG_GCC5
and *_CLANG35, all of which use the small code model.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-08-02 10:58:25 +02:00
Ard Biesheuvel 4a8466d4ba BaseTools GCC: introduce GCC5 toolchain to support GCC v5.x in LTO mode
This adds support for GCC 5.x in LTO mode for IA32, X64, ARM and
AARCH64. Due to the fact that the GCC project switched to a new
numbering scheme where the first digit is now incremented for every
major release, the new toolchain is simply called 'GCC5', and is
intended to support all GCC v5.x releases.

Since IA32 and X64 enable compiler optimizations (-Os) for both DEBUG
and RELEASE builds, LTO support is equally enabled for both targets.
On ARM and AARCH64, DEBUG builds are not optimized, and so the LTO
optimizations are only enabled for RELEASE.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-02 10:54:11 +02:00
Ard Biesheuvel a1b8baccc3 BaseTools GCC: use 'gcc' as the linker command for GCC44 and later
To accommodate upcoming GCCx toolchain versions that require 'gcc' to
be used as the linker in order to support LTO, switch GCC44 and later
(including CLANG35) to a new DLINK build rule that invokes 'gcc' as the
linker instead of 'ld'. Since gcc expects its command line arguments in
a different format, and expects arguments that it needs to pass to the
linker to be prefixed with '-Wl,', this involves changes to most of the
DLINK_FLAGS definitions in tools_def.template, as well as some changes to
module .INF files that set their own linker options.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-02 08:40:43 +02:00
Ard Biesheuvel befb3ba515 BaseTools UNIXGCC ELFGCC CYGGCC: clone GCC build rule family into GCCLD
Before we can make non-backward compatible changes to the GCC build rules
regarding the use of the 'gcc' binary as the linker, clone the existing
GCC build rules into a 'GCCLD' build rule family, and move the legacy
toolchains UNIXGCC, CYGGCC, CYGGCCxASL and ELFGCC over to it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-02 08:40:31 +02:00
Ard Biesheuvel 1c63516075 BaseTools CLANG35: drop problematic use-movt and save-temps options
Some versions of Clang fail on every input file when using the
-save-temps options, and produces the following heplful error message:

  <unknown>:0: error: Undefined temporary symbol

Simply dropping the option for CLANG35 is the simplest way around this,
since the value of storing .i and .s files is dubious anyway.

Also, drop the arm-use-movt option, which does not appear to be
supported anymore by recent versions of clang.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
2016-08-02 08:21:46 +02:00