Remove the "leaf" definitions for GCC46. These definitions are never
referenced in "tools_def.template" (they are the last GCC46 mentions in
the file), so their removal can't break other definitions. Instead, their
erasure turns other definitions into leaves (subject to further removal).
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
No GCC47 definitions exist at this point, so remove the GCC47
documentation too, from "tools_def.template".
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
The last patch decremented references on a number of DEFs. They can be
classified into three groups:
(a) those that remain used by multiple toolchains (refcount >= 2):
- GCC_ASLCC_FLAGS
- GCC_ASLPP_FLAGS
- GCC_HOST_PREFIX
- GCC_IA32_RC_FLAGS
- GCC_PP_FLAGS
- GCC_VFRPP_FLAGS
- GCC_X64_RC_FLAGS
- IASL_FLAGS
- IASL_OUTFLAGS
- UNIX_IASL_BIN
(b) those that are only used by GCC48 (refcount == 1):
- GCC47_ASM_FLAGS
- GCC47_IA32_CC_FLAGS
- GCC47_IA32_DLINK2_FLAGS
- GCC47_IA32_X64_ASLDLINK_FLAGS
- GCC47_IA32_X64_DLINK_FLAGS
- GCC47_X64_CC_FLAGS
- GCC47_X64_DLINK2_FLAGS
- GCC47_X64_DLINK_FLAGS
(c) those that are no longer used (refcount == 0):
- GCC47_IA32_PREFIX
- GCC47_X64_PREFIX
For the members of class (b), expand their definitions at the referring
sites, and remove their definitions.
For the members of class (c), remove their definitions.
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Remove the "leaf" definitions for GCC47. These definitions are never
referenced in "tools_def.template" (they are the last GCC47 mentions in
the file), so their removal can't break other definitions. Instead, their
erasure turns other definitions into leaves (subject to further removal).
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
DLINK_COMMON definitions are not consumed by "build_rule.template";
instead, DLINK_COMMON definitions (internal to "tools_def.template") were
invented for sharing options between ASLDLINK_FLAGS and DLINK_FLAGS.
However, this intent doesn't actually apply to
GCC48_IA32_X64_DLINK_COMMON: it is never consumed. Furthermore, the
GCC45..GCC47 instances of IA32_X64_DLINK_COMMON too lead up to
GCC48_IA32_X64_DLINK_COMMON only -- they form a dead-end. Remove them
altogether, in order to simplify the subsequent patches.
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Whitespace just before line terminators is useless, remove it.
("git show -b" produces a null diff for this patch.)
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This drops ARM and AARCH64 support from the GCC46 and GCC47 toolchain
definitions, which are on the list to be removed, along with VS2003,
VS2005, VS2008, VS2010, DDK3790, UNIXGCC, GCC44, GCC45, ELFGCC, CYGGCC,
ICC, ICC11 and MYTOOLS.
Since GCC46 and GCC47 are the only ones on that list that support ARM
and/or AARCH64, let's give Liming a hand and cover the ARM side of
things first, so that everything that remains to be removed is x86
only.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1377
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Liming Gao <liming.gao@intel.com>
[lersek@redhat.com: add bugzilla reference and CCs]
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
The 'arm-linux-gnueabihf' target triplet we use for CLANG35 and
CLANG38 specifies a hardfloat target, and so the binaries that are
emitted are annotated as using VFP registers for passing floating
point arguments, even though no VFP is used anywhere in the code.
This works fine as long as we don't try to link against code
that uses software floating point, but combining object files
with different floating point calling conventions is not permitted.
So switch to the softfloat arm-linux-gnueabi triplet instead.
This affects both the name Clang uses when invoking the linker,
and the arguments it passes to it, and we are mostly interested
in the latter (since any version of GNU ld.bfd will do the right
thing as long as it targets EABI ARM)
For native builds, this change has no effect, since the unprefixed
system linker will take priority, and so Clang will pass the right
arguments to whichever linker happens to be the system linker.
For cross builds, the fact that Clang composes the name of the
linker by prefixing '-ld' with the target triplet implies that
users will have to switch to a version of binutils that targets
arm-linux-gnueabi rather than arm-linux-gnueabihf. Note that the
GCCx toolchain targets can use either when building for ARM so this
does not create a need to install two versions of the ARM cross
toolchain. Also, note that all ARM toolchains in the GCC family
are already documented as requiring a toolchain that targets
arm-linux-gnueabi and not arm-linux-gnueabihf.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
The ARM linker may emit veneers, i.e., trampolines, when ordinary
direct relative branches cannot be used, e.g., for Thumb interworking
or branch targets that are out of range.
Usually, such veneers carry an absolute reference to the branch
target, which is problematic for us, since these absolute references
are not covered by annotations that are visible to GenFw in the
PE/COFF conversion, and so these absolute references are not fixed
up by the PE/COFF loader at runtime.
So switch to all ARM GNU ld toolchains to position independent veneers.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
PE/COFF only has a very limited id space for runtime relocations, and
so it defines only a single relocation for movw/movt instruction pairs,
which can be combined to load a 32-bit symbol reference into a register.
For this to work as expected, these instructions must always appear in
the same order and adjacently, and this is something few compilers take
into account, unless they target PE/COFF explicitly (and this is not the
case for our ELF based toolchains)
For Clang 3.6 and later, we can pass the -mno-movt option to suppress
movw/movt pairs entirely, which works around the issue. Unfortunately,
for Clang 3.5, the option is called differently (-mllvm -arm-use-movt=0)
and mutually incompatible between 3.5 and 3.6.
Since it is desirable for the CLANG35 toolchain to be usable on newer
versions of Clang as well (given that it is the only non-LTO alternative
to CLANG38), let's work around this issue in a way that permits versions
3.5 and newer of Clang to be used with the CLANG35 profile.
So pass the -mkernel flag instead (and add -Qunused-argument so Clang
does not complain about the -mno-unaligned-access in ARM_CC_XIPFLAGS).
This also inhibits movw/movt generation, along with some other changes
(e.g., long calls) which do affect code generation but not in an
undesirable manner.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Since 4 KB section alignment is required when mapping PE/COFF images
with strict permissions, update the default section alignment when
using GCC49 and GCC5 in RELEASE mode. Note that XIP modules such as
SEC, PEIMs or PEI core are not affected by this change, since the
override to 32 byte aligment remains in effect.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Update aslc rule to rename the temp output file from .efi to .pecoff.
This change can avoid the conflict .efi file name in output directory.
One is the driver image, another is aslc temp output file.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
GCC link script is used to discard the unused section data from ELF image.
ASLDLINK_FLAGS requires it to remove the unnecessary section data, then
GenFw can be used to retrieve the correct data section from ELF image.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
We met a case on GCC toolchain for increment build. the case is user
build Helloworld first, then rename the source file Helloworld.c to
Helloworld_new.c and also update the file name to Helloworld_new.c in
.inf file's [sources] section. finally, he rebuild it again.
It cause build failure due to multiple definition of `UefiMain' because
in the .lib file it both have Helloworld.obj and Helloworld_new.obj.
current we use the option 'cr' to create the .lib file while the 'r'
cmd means replace existing or insert new files into the archive. so
in this patch before we create the .lib file, we delete it first.
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
1. Do not use tab characters
2. No trailing white space in one line
3. All files must end with CRLF
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
VS2017 reports warning LNK4281: undesirable base address 0x0 for x64 image;
set base address above 4GB for best ASLR optimization.
edk2 build always sets baes address to zero as default. So, ignore this link
warning.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Pete Batard <pete@akeo.ie>
Create the missing NOOPT target for CLANG35 (which is ARM and AARCH64
only), and align it with the other toolchains: NOOPT has optimizations
disabled entirely (for source level debugging), and DEBUG is changed
from -O0 to -O1, as is the case for CLANG38 as well.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
As reported by Liming, GCC 4.9.2 does not support the -no-pie
linker option that we added to the GCC49 and GCC5 toolchain
profiles in commit c25d390552 ("BaseTools/tools_def IA32:
disable PIE code generation explicitly") to work around issues
with recent distro toolchains that enable PIE code generation
by default.
So rollback the changes for GCC49 but preserve them for GCC5
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
As a security measure, some distros now build their GCC toolchains with
PIE code generation enabled by default, because it is a prerequisite
for ASLR to be enabled when running the executable.
This typically results in slightly larger code, but it also generates
ELF relocations that our tooling cannot deal with, so let's disable it
explicitly when using GCC49 or later for IA32. (Note that this does not
apply to X64: it uses PIE code deliberately in some cases, and our
tooling does deal with the resuling relocations)
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
The ElfConvert routines in GenFw don't handle the ".eh_frame" ELF section
emitted by gcc. For this reason, Leif disabled the generation of that
section for AARCH64 with "-fno-asynchronous-unwind-tables" in commit
28e80befa4 [1], and Ard did the same for IA32 and X64 in commit
26ecc55c02 [2]. (The CLANG38 toolchain received the same flag at its
inception, in commit 6f756db5ea [3].)
However, ".eh_frame" is back now; in upstream gcc commit 9cbee213b579 [4]
(part of tag "gcc-8_1_0-release"), both "-fasynchronous-unwind-tables" and
"-funwind-tables" were made the default for AARCH64. (The patch author
described the effects on the gcc mailing list [5].) We have to counter the
latter flag with "-fno-unwind-tables", otherwise GenFw chokes on
".eh_frame" again (triggered for example on Fedora 28).
"-f[no-]unwind-tables" goes back to at least gcc-4.4 [6], so it's safe to
add to GCC_AARCH64_CC_FLAGS.
[1] https://github.com/tianocore/edk2/commit/28e80befa4fe
[2] https://github.com/tianocore/edk2/commit/26ecc55c027d
[3] https://github.com/tianocore/edk2/commit/6f756db5ea05
[4] https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=9cbee213b579
[5] http://mid.mail-archive.com/7b28c03a-c032-6cec-c127-1c12cbe98eeb@foss.arm.com
[6] https://gcc.gnu.org/onlinedocs/gcc-4.4.7/gcc/Code-Gen-Options.html
Cc: "Danilo C. L. de Paula" <ddepaula@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Cole Robinson <crobinso@redhat.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reported-by: "Danilo C. L. de Paula" <ddepaula@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
The crossing GCC compiler may use the different path for make and gcc tool.
So, GCC_HOST_BIN is introduced for make path. GCC5_BIN is still kept for
gcc path. User needs to set GCC_HOST_BIN besides set GCC5_BIN env if
the default make is not used. Normally, make is in the default system path.
GCC_HOST_BIN is not required to be set.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
This option, which is used in VS2015 and earlier toolchains, was missing
for VS2017. Applying it greatly reduces the size of generated binaries.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Build options for ARM64 are the same as for ARM, except for /BASE:0
which is removed from DLINK flags to avoid LNK1355 error:
invalid base address 0x0; ARM64 image cannot have base address below 4GB
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Clang's preprocessor behaves differently from GCC's, and produces
intermediate device tree source that still contains #pragma pack()
and other directives that the device tree compiler chokes on.
For assembling device tree sources, it matters very little which
preprocessor is being used, so let's just use GNU CPP explicitly.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
when MAX_CONCURRENT_THREAD_NUMBER is not specified, tool will
automatically detect number of processor threads.
Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=775
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
We duplicate the Assembly-Code-File section from build_rule.template
because --convert-hex cannot be used with the MSFT ARM assembler.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>
By default, the device tree compiler emits phandle properties twice:
once called 'phandle' and again called 'linux,phandle'. Given that
Linux was updated in early 2010 [0] to accept the former (which is
what is specified in the ePAPR and device tree specifications), there
is no point in emitting both when compiling device trees for UEFI
platforms.
[0] 04b954a673dd02f585a2769c4945a43880faa989
"of/flattree: Make the kernel accept ePAPR style phandle information"
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Ironically, disabling warnings in the OpensslLib library build is
causing breakage when using the CLANG35 toolchain to build for ARM:
error: unknown warning option '-Werror=maybe-uninitialized'; did you mean '-Werror=uninitialized'? [-Werror,-Wunknown-warning-option]
So let's add -Wno-unknown-warning-option to the list of warnings to
ignore when using Clang 3.5, and move the same option from the x86
specific list to the shared list for Clang 3.8.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Enable optimization for DEBUG builds, to make it more usable in terms of
performance, and to give more coverage to the LTO builds. Also, some
diagnostics are only enabled when optimization is enabled.
NOOPT builds can now also be created, which will retain the behavior DEBUG
builds had previously.
Note that this aligns ARM and AARCH64 with the x86 architectures, which
already use optimization for DEBUG builds.
In order to preserve existing behavior for users of older toolchains,
keep GCC49 and older as-is.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Commit 8b6366f875 ("BaseTools/GCC: set -Wno-unused-const-variable
on RELEASE builds") suppresses warnings about unused constant
variables in RELEASE builds when building with GCC, given that they
break the build under our warnings-as-errors policy.
Do the same for CLANG38.
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=790
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Shi Steven <steven.shi@intel.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Extend the CLANG38 toolchain definition so it can be used for
ARM and AARCH64 as well. Note that this requires llvm-ar and
the LLVMgold.so linker plugin.
In preparation of doing the same for GCC5, this toolchain version
also departs from the custom of using -O0 for DEBUG builds, which
makes them needlessly slow. Instead, let's add a NOOPT flavor as
well, and enable optimization for DEBUG like the other architectures
do. (Note that this will require some trivial changes to the platform
description files)
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Recent distro builds of GCC 6 enable PIE linking by default, and allow
the previous behavior to be restored by passing the -no-pie command line
argument. Support for this was implemented by commits 1894a7c64c and
3380a59123 but unfortunately, it turns out that GCC 5 does not support
this command line argument, and exits with an error.
To avoid the need for yet another toolchain tag, to distinguish between
GCC 5 and GCC 6, let's use our GCC linker scripts when building objects
from .aslc files. This will ensure that the extra sections that are added
by the PIE linker are discarded from the ELF binary, and so they will not
corrupt the resulting .acpi file.
This reverts
1894a7c64c BaseTools/tools_def AARCH64 ARM: disable PIE linking
3380a59123 BaseTools/tools_def AARCH64 ARM: disable PIE linking for .aslc sources
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Commit 1894a7c64c ("BaseTools/tools_def AARCH64 ARM: disable PIE
linking") works around an issue that was caught due to the fact that
PIE linking produces broken .acpi files. However, v2 of that fix
inadvertently only applied the workaround to the normal linker command
line, and not to the ASLD one, so the issue still persists.
So add the missing -no-pie options for ASLD on ARM and AARCH64.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
The standard GCC preprocessor we use to preprocess device tree source
files has a whole bunch of macros predefined, among which
#define __linux 1
#define __linux__ 1
#define __gnu_linux__ 1
#define linux 1
This causes a property like 'linux,code' to be converted into '1,code'
which is obviously wrong. So let's get rid of all the predefined macros
by passing -undef to the preprocessor command line.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Some prebuilt GCC toolchains targeting aarch64 (e.g., the Debian Stretch
one) will default to building PIE executables. This has been observed to
corrupt ACPI tables built from .aslc sources, so disable PIE linking
altogether when using the GCC toolchain to build for AARCH64 or ARM.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Commit 8f0b62a5da ("BaseTools/tools_def AARCH64: enable frame pointers
for DEBUG builds") removed the -fomit-frame-pointer switch from the CFLAGS
definitions that are shared between AARCH64 DEBUG and RELEASE builds, and
moved it to the RELEASE specific ones, so that DEBUG builds can produce a
backtrace when a crash occurs.
This is actually a useful thing to have for RELEASE builds as well. AArch64
has 30 general purpose registers, and so the performance hit of having a
frame pointer is unlikely to be noticeable, nor are the additional 8 bytes
of stack space likely to present a problem.
So remove -fomit-frame-pointer altogether this time.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
TianoCore BZ#700 [1]
Set the '-Wno-unused-const-variables' in RELEASE builds with the
GGC49 and GCC5 toolchain.
This fixes the RELEASE build of OVMF with GCC in version 6 or newer.
GCC 6 added the '-Wunused-const-variable' warning, which gets
activated by '-Wunused-variable' and has the following behavior:
"Warn whenever a constant static variable is unused aside from its
declaration" [2]
Commit 2ad6ba80a1 introduced a case
where exactly this happens on a RELEASE build. All uses of the static
const variable are located in debug code only, which gets thrown out
by the compiler on RELEASE builds and thus triggers the
unused-const-variable warning.
There is currently no GCC 6 toolchain target defined and doing so
would add a lot of boilerplate code. Instead, use the fact that GCC
ignores unknown '-Wno-*' options:
"[...] if the -Wno- form is used [...] no diagnostic is produced for
-Wno-unknown-warning unless other diagnostics are being produced"
This behavior is available in GCC 4.9 [3] (and also earlier, for that
matter), so add the flag to the GCC49 and GCC5 toolchain, even if
both GCC versions do not supports it.
GCC49 doesn't enables LTO whereas GCC5 does. As GCC 6.0 through 6.2
had bugs relating to LTO there can be desire to use the GCC49 target
even if compiling with GCC 6, see 432f1d83f7.
Orient the changes on 20d00edf21 which moved the
'-Wno-unused-but-set-variable' flag to RELEASE builds only, as there
it ensure that it does not gets raised if the only usage of a
variable is in (then collapsed) debug code.
[1] https://bugzilla.tianocore.org/show_bug.cgi?id=700
[2] https://gcc.gnu.org/onlinedocs/gcc-6.4.0/gcc/Warning-Options.html#index-Wunused-const-variable
[3] https://gcc.gnu.org/onlinedocs/gcc-4.9.0/gcc/Warning-Options.html
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
[lersek@redhat.com: fix typo in subject]
While modern AARCH64 server systems use ACPI for describing the platform
topology to the OS, ARM systems and AARCH64 outside of the server space
mostly use device tree binaries, which are compiled from device tree
source files using the device tree compiler.
Currently, such source files and binaries may be kept in the EDK2 platform
trees, but are not integrated with the build, which means they need to be
kept in sync and recompiled manually, which is cumbersome.
So let's wire up BaseTools support for them: add tool definitions for the
DTC compiler and preprocessor flags that allow these source files to use
FixedPcd expressions and other macros defined by AutoGen.h
This way, a device tree binary can be built from source and emitted into
a FFS file automatically using something like:
DeviceTree.inf:
[Defines]
INF_VERSION = 0x00010019
BASE_NAME = SomePlatformDeviceTree
FILE_GUID = 25462CDA-221F-47DF-AC1D-259CFAA4E326 # gDtPlatformDefaultDtbFileGuid
MODULE_TYPE = USER_DEFINED
VERSION_STRING = 1.0
[Sources]
SomePlatform.dts
[Packages]
MdePkg/MdePkg.dec
SomePlatform.fdf:
INF RuleOverride = DTB xxx/yyy/DeviceTree.inf
[Rule.Common.USER_DEFINED.DTB]
FILE FREEFORM = $(NAMED_GUID) {
RAW BIN |.dtb
}
where it can be picked at runtime by the DTB loader that may refer to it
using gDtPlatformDefaultDtbFileGuid.
Note that this is very similar to how ACPI tables may be emitted into a
FFS file with a known GUID and picked up by AcpiTableDxe at runtime.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=676
Add LLVM39 and LLVM40 support in CLANG38 toolchain
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=582
Don't enable this option in the default setting, because it may cause VS2015
linker crash. Platform can enable this option in PlatformPkg.dsc like below:
[BuildOptions]
*_*_*_DLINK2_FLAGS = /WHOLEARCHIVE
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=671
GCC tool chain uses -fpie in CC_FLAGS. So, add -pie in DLINK_FLAGS.
More discussion in
https://lists.01.org/pipermail/edk2-devel/2017-August/013508.html
3.13 Options for Linking
========================
'-pie'
Produce a position independent executable on targets that support
it. For predictable results, you must also specify the same set
of options used for compilation ('-fpie', '-fPIE', or model
suboptions) when you specify this linker option.
3.18 Options for Code Generation Conventions
============================================
'-fpie'
'-fPIE'
These options are similar to '-fpic' and '-fPIC', but generated
position independent code can be only linked into executables.
Usually these options are used when '-pie' GCC option is used
during linking.
'-fpie' and '-fPIE' both define the macros '__pie__' and
'__PIE__'. The macros have the value 1 for '-fpie' and 2 for
'-fPIE'.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
XIP code may execute with the MMU off, in which case all memory accesses
should be strictly aligned to their size. Some versions of GCC violate
this restriction even when -mstrict-align is passed, when performing
loads and stores that involve SIMD registers. This is clearly a bug in
the compiler, but we can easily work around it by avoiding SIMD registers
altogether when building code that may execute in such a context. So add
-mgeneral-regs-only to the AARCH64 XIP CC flags.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
The AArch64 ABI classifies register x18 as a platform register, which
means it should not be used unless the code is guaranteed to run on a
platform that doesn't use it in such a capacity.
GCC does not honour this requirement by default, and so we need to tell
it not to touch it explicitly, by passing the -ffixed-x18 command line
option.
Link: https://bugzilla.tianocore.org/show_bug.cgi?id=625
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
The /Gw flag does a better job at size optimization than use of the
GLOBAL_REMOVE_IF_UNREFERENCED macro that is currently used for VS20xx
tool chains to remove unreferenced global variables.
This patch add /Gw to CC_FLAGS for VS2013 and higher tool chain tags.
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
On AARCH64, any code that may execute with the MMU off needs to be built
with -mstrict-align, given that unaligned accesses are not allowed unless
the MMU is enabled. This does not only affect SEC and PEI modules, but
also static libraries of the BASE type, which may be linked into such
modules, as well as into modules of other types. As it turns out, the
presence of -mstrict-align is reflected in the internal representations
of the types defined in those libraries.
When -fstrict-aliasing is passed to GCC, it assumes that pointers to
objects of different types cannot refer to the same memory location, and
attempts to exploit this fact when optimizing the code. Since such
assumptions are only valid under very strict conditions which are not
guaranteed to be met in EDK2, we disable this optimization by passing
-fno-strict-aliasing by default. [*]
When LTO is in effect, this applies equally to the code generation that
may occur at link time, which is why the linker warns about unexpected
differences in type definitions between the intermediate representations
that are present in the object files being linked. This may result in
warnings such as the one below, even if -fno-strict-aliasing is used:
MdePkg/Include/Library/BaseLib.h:1712:1:
warning: type of 'StrToGuid' does not match original declaration
[-Wlto-type-mismatch]
StrToGuid (
^
MdePkg/Library/BaseLib/SafeString.c:1506:1:
note: 'StrToGuid' was previously declared here
StrToGuid (
^
MdePkg/Library/BaseLib/SafeString.c:1506:1:
note: code may be misoptimized unless -fno-strict-aliasing is used
This warning is inadvertently triggered when linking BASE libraries built
with -mstrict-align into modules of types other than SEC or PEI, since the
types are subtly different, even though the use of code that maintains
strict alignment in a module that does not care about this is unlikely to
cause problems. And even if it did, it would still only affect code built
with -fstrict-aliasing enabled, which we disable unconditionally. So let's
just silence the warning by passing -Wno-lto-type-mismatch.
[*] Leif adds: "-fstrict-aliasing is GCC default, because it is a
restriction in the C language. Because it's a bit non-obvious, things
can go hilariously wrong in very non-obvious ways, and the potential
optimization gains are unlikely to be generally relevant,
-fno-strict-aliasing is a sensible thing to always have set (like we
do)."
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
For historical reasons, GCC builds for ARM and AARCH64 pass the
-save-temps command line option to GCC, which instructs the compiler
to preserve intermediate files, i.e., preprocessor output and generated
assembler. Given that this clutters up the Build directory, and slows
down the build, let's remove it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
After Debian's toolchain switched to PIE by default, our edk2 builds began
to fail to build (GCC49 w/ gcc 6.3). This patch fixes the build by forcing
off PIE for both ARM and AARCH64 builds.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: dann frazier <dannf@debian.org>
Add -fno-pic as well for ARM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reorganize the statements for XCODE5 to match other tool
chains and remove dependency on XCLANG and XCODE32
Cc: Andrew Fish <afish@apple.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=561
Update BaseTools/Conf/tools_def.template to add the define
-D NO_MSABI_VAARGS
To CC_FLAGS for X64 XCODE5 builds.
The llvm/clang compiler used in XCODE5 builds supports the
_ms_ versions of the vararg builtins, but the compiler
generates build errors.
The recommendation from the XCODE5 experts is to never use
the _ms_ version of the vararg builtins. The define
NO_MSABI_VARARGS is already supported in MdePkg/Include/Base.h
and forces the use the standard vararg builtins.
Cc: Andrew Fish <afish@apple.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>
Now, -fno-builtin option is added for the specific GCC tool chain.
It is a generic option. It can be moved to common GCC option to keep
the consistent compiler option.
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Suggested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
As a security measure, some distro toolchains now default to PIC code
generation, allowing executables (as opposed to shared libraries) using
the objects to be built as PIE binaries, which can be loaded at a random
virtual offset.
However, our ELF to PE/COFF generation code does not deal with the
resulting relocation types (i.e., GOT based), and so the use of PIC code
leads to GenFw errors.
Given that
a) our non-PIC PE/COFF executables are already relocatable,
b) PIC code leads to all symbol references to be indirected via GOT
entries containing absolute addresses, each requiring an entry in the
relocation table,
c) the AArch64 ISA makes it perfectly feasible to built PIE executables
from non-PIC code,
there is absolutely no upside to using PIC code for building EDK2 modules,
and so we're better off simply disabling it unconditionally.
Note that when running under the OS, the GOT has an additional advantage,
i.e., that all .text/.rodata pages remain clean and so can be shared between
processes. This does not apply to the UEFI environment, however.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Define "-march=armv7-a" - which is used by the GCC toolchains - for
ARM CLAMNG35 builds to fix compilation of the MemoryFence ASM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Marvin Haeuser <Marvin.Haeuser@outlook.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
https://bugzilla.tianocore.org/show_bug.cgi?id=227
Refer to VS ASLPP_FLAGS, force include AutoGen.h so that ASL code
can use FixedPcdGetXX to get FixedPcd value.
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=227
After -P option is removed, the generated preprocessed ASL file will have
line markers. The extra information can be removed by Trim script. ASL code
can refer to the definition in C source file. This has been supported in
VS and XCODE tool chains.
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
BaseTools add support to generating image package from BMP/JPEG/PNG
files.
1) New file type *.idf Image definition file to describe HII image
resource. It is the ASCII text file, and includes one or more "#image
IMAGE_ID [TRANSPARENT] ImageFileName".
2) New IMAGE_TOKEN macro is used to refer to IMAGE_ID.
3) New AutoGen header file $(MODULE_NAME)ImgDefs.h to include the
generated ImageId definition.
4) New $(MODULE_NAME)Idf.hpk or $(MODULE_NAME)Images are generated
as the output binary HII image package.
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Provide the PKCS7 Tool to support the CertType - EFI_CERT_TYPE_PKCS7_GUID,
then user can use this tool to add EFI_FIRMWARE_IMAGE_AUTHENTICATION
for a binary.
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
CLANG38 build fail after CC_FLAG is added in the link rule.
This failure is because the CLANG38 enable the LTO through LLVMgold.so
linker plugin, but the LLVMgold.so plugin cannot accept the clang -Oz
CC flag as build option. After CC_FLAG is added in the link rule,
the LLVMgold.so plugin reports linking error. LLVMgold.so only accept
-O0 ~ -O3, and you can see it in the LLVM gold plugin source code
in below:
http://llvm.org/svn/llvm-project/llvm/tags/RELEASE_380/final/tools/gold/
gold-plugin.cpp line173:
if (opt[1] < '0' || opt[1] > '3')
message(LDPL_FATAL, "Optimization level must be between 0 and 3");
Add -O3 in the *_CLANG38_*_DLINK2_FLAGS to override the -Oz flag in
*_CLANG38_*_CC_FLAGS to pass LLVMgold.so linking.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This updates the RVCT CC flags so various diagnostics that trigger
warnings-as-errors are silenced. In particular, RVCT complains about
missing newlines at the end of source files, mixing of enums and int
values and return statements followed by a break, all of which occur
in the Tianocore codebase, but none of which are actual errors in the
code. So just silence them.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
The ARM and AARCH64 CC_FLAGS definitions include both GCC_ALL_CC_FLAGS
and GCC44_ALL_CC_FLAGS, resulting in many of the compiler arguments
being passed twice. Since the CLANG35 definitions do not refer to
GCC44_ALL_CC_FLAGS, drop the reference for GCCx as well.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Commit 478f50990a ("BaseTools GCC: add the compiler flags to the linker
command line") added the compiler flags to the linker command line,
which is required for LTO to function correctly, since it involves code
generation at link time.
This patch failed to update the build rules for XIP modules on AARCH64,
which not only requires the ordinary CC flags but also the XIP CC flags
to prevent the LTO backend to, e.g., emit code that does not adhere to
the strict alignment rules we impose for code that may execute with the
MMU off.
So update the XIP link rules as well. Since AARCH64 and ARM are not
supported by any toolchains in the GCCLD build rule family, drop the
reference to GCCLD while we're at it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
This adds support for LLVM 3.8.x in LTO mode for IA32 and X64.
CLANG38 enable LLVM Link Time Optimization (LTO) and code size
optimization flag (-Oz) by default for aggressive code size
improvement. CLANG38 X64 code is small code model + PIE.
CLANG LTO needs PIE in link flags to generate PIE code correctly,
otherwise the PIE is not really enabled. (e.g. OvmfPkgX64 will
hang in 64bits SEC at high address because of small model code
displacement overflow).
Test pass platforms: OVMF (OvmfPkgIa32.dsc, OvmfPkgX64.dsc and
OvmfPkgIa32X64.dsc).
Test compiler and linker version: LLVM 3.8, GNU ld 2.26.
Example steps to use the CLANG38 tool chain to build OVMF platform:
1. Download and extract the llvm 3.8.0 Pre-Built Binaries from
http://www.llvm.org/releases/ (e.g. http://www.llvm.org/releases/
3.8.0/clang+llvm-3.8.0-x86_64-linux-gnu-ubuntu-16.04.tar.xz and
extract it as ~/clang38).
2. Copy LLVMgold.so from https://github.com/shijunjing/edk2/blob/
llvm/BaseTools/Bin/LLVMgold.so to above clang lib folder (e.g.
~/clang38/lib/LLVMgold.so)
3. Install new version linker with plugin support (e.g. ld 2.26 in
GNU Binutils 2.26 or Ubuntu16.04)
$ cd edk2
$ git checkout llvm
$ export CLANG38_BIN=path/to/your/clang38/
(e.g. export CLANG38_BIN=~/clang38/bin/)
$ source edksetup.sh
$ make -C BaseTools/Source/C
$ build -t CLANG38 -a X64 -p OvmfPkg/OvmfPkgX64.dsc -n 5 -b DEBUG
-DDEBUG_ON_SERIAL_PORT
$ cd edk2/Build/OvmfX64/DEBUG_CLANG38/FV
$ qemu-system-x86_64.exe -bios OVMF.fd -serial file:serial.log -m 4096
-hda fat:.
If you want, you can build and install GNU Binutils 2.26 as below steps
in Ubuntu:
Download binutils-2.26 source code from http://ftp.gnu.org/gnu/binutils/
and extract it to ~/binutils-2.26
$sudo apt-get install bison
$sudo apt-get install flex
Install other necessary binutils build tools if missing
$ mkdir build
$ cd build
$ ../binutils-2.26/configure --enable-gold --enable-plugins
--disable-werror --prefix=/usr
$ make -j 5
$ sudo make install
If you want, you can build LLVMgold.so as below steps
Download llvm-3.8.0 source code from http://www.llvm.org/releases/
3.8.0/llvm-3.8.0.src.tar.xz and extract it to ~/llvm-3.8.0.src
Download clang3.8.0 source code from http://www.llvm.org/releases/
3.8.0/cfe-3.8.0.src.tar.xz and extract it to ~/llvm-3.8.0.src/tools/clang
Refer http://clang.llvm.org/get_started.html to Install other necessary
clang build tools if missing
$ mkdir llvm38build
$ cd llvm38build
If your GNU Binutils 2.26 is in /home/jshi19/binutils-2.26,
$ cmake ../llvm-3.8.0.src -G "Unix Makefiles" -DCMAKE_BUILD_TYPE="Release"
-DLLVM_TARGETS_TO_BUILD="X86" -DCMAKE_VERBOSE_MAKEFILE=ON
-DCMAKE_CXX_COMPILER="/usr/bin/g++" -DCMAKE_C_COMPILER="/usr/bin/gcc"
-DLLVM_BINUTILS_INCDIR=/home/jshi19/binutils-2.26/include
$ make -j 5 LLVMgold The LLVMgold.so is in ~/llvm38build/lib/LLVMgold.so
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Both binutils ar and LLVM ar support "cr", but LLVM ar doens't
support add "-" in the flags, and llvm-ar cannot accept "-cr".
So remove the short dash "-" to make llvm archives work.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Steven Shi <steven.shi@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Given that we only support ARMv7 and up in Tianocore (due to the fact
that the PI spec mandates that the PEI services table pointer be stored
in the TPIDRURW register, which is not available on earlier CPUs), we can
assume that any code executing with the MMU on may perform unaligned
accesses (since the AArch32 bindings in the UEFI spec stipulate that
unaligned accesses should be allowed if supported by the CPU)
So relax the alignment restrictions to XIP modules only, i.e., BASE, SEC,
PEI_CORE and PEIM type modules, exactly like we do for AARCH64 already.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
When building for AARCH64, code that may execute with the MMU off should
not perform unaligned accesses, which is why we set -mstrict-align for
BASE, SEC, PEI_CORE and PEIM modules when building with GCCx. However,
this setting is missing from CLANG35 so set it there as well.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Avoid build errors when including OpensslLib, which may throw
undefined reference errors for builtin functions if -fno-builtin
is not specified (and it is already set for IA32, X64 and AARCH64)
So set it for ARM as well.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Now that we invoke GCC as the linker for the GCC toolchain family,
we can pass the CC flags to the linker as well. This is only
required for LTO (which may involve code generation during the link
stage), but does not interfere with non-LTO builds.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
GCC5 runs in LTO mode, which means it may generate code from an
intermediate representation during the link stage, at which time
additional diagnostics are run that may emit warnings.
Some of these warnings seem to be spurious, e.g., the following
warning which is emitted when building OVMF for IA32 or ArmVirtQemu
for ARM (but not for X64 resp. AARCH64)
.../MdeModulePkg/Library/UefiHiiLib/HiiLib.c:
In function 'HiiCreateGuidOpCode.constprop':
.../MdeModulePkg/Library/UefiHiiLib/HiiLib.c:3228:10:
error: function may return address of local variable
[-Werror=return-local-addr]
return (UINT8 *)OpCodePointer;
^
.../MdeModulePkg/Library/UefiHiiLib/HiiLib.c:3208:17: note: declared here
EFI_IFR_GUID OpCode;
^
lto1: all warnings being treated as errors
lto-wrapper: fatal error: gcc returned 1 exit status
So before adding the contents of CC_FLAGS to the linker command line,
defuse the default '-Werror' by adding '-Wno-error' to DLINK2_FLAGS
for GCC5.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
In order to be able to share the compiler flags with the linker (which
is required for LTO since it involves the linker doing code generation
based on the LTO bytecode), move the -c GCC argument to the build rules,
and drop it from the GCC CC_FLAGS definitions in tools_def.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Now that GenFw converts small code model ADRP instructions to ADR on
the fly, we can reduce the alignment for XIP modules, where large
alignment values may cause considerable waste of flash space due to
excessive padding. This limits the module size to 1 MB, but this is
not a concern in practice.
So set the XIP section alignment to 0x20 for DEBUG_GCC49, DEBUG_GCC5
and *_CLANG35, all of which use the small code model.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This adds support for GCC 5.x in LTO mode for IA32, X64, ARM and
AARCH64. Due to the fact that the GCC project switched to a new
numbering scheme where the first digit is now incremented for every
major release, the new toolchain is simply called 'GCC5', and is
intended to support all GCC v5.x releases.
Since IA32 and X64 enable compiler optimizations (-Os) for both DEBUG
and RELEASE builds, LTO support is equally enabled for both targets.
On ARM and AARCH64, DEBUG builds are not optimized, and so the LTO
optimizations are only enabled for RELEASE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
To accommodate upcoming GCCx toolchain versions that require 'gcc' to
be used as the linker in order to support LTO, switch GCC44 and later
(including CLANG35) to a new DLINK build rule that invokes 'gcc' as the
linker instead of 'ld'. Since gcc expects its command line arguments in
a different format, and expects arguments that it needs to pass to the
linker to be prefixed with '-Wl,', this involves changes to most of the
DLINK_FLAGS definitions in tools_def.template, as well as some changes to
module .INF files that set their own linker options.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Before we can make non-backward compatible changes to the GCC build rules
regarding the use of the 'gcc' binary as the linker, clone the existing
GCC build rules into a 'GCCLD' build rule family, and move the legacy
toolchains UNIXGCC, CYGGCC, CYGGCCxASL and ELFGCC over to it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Some versions of Clang fail on every input file when using the
-save-temps options, and produces the following heplful error message:
<unknown>:0: error: Undefined temporary symbol
Simply dropping the option for CLANG35 is the simplest way around this,
since the value of storing .i and .s files is dubious anyway.
Also, drop the arm-use-movt option, which does not appear to be
supported anymore by recent versions of clang.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
The ordinary small code model for x86_64 cannot be used in UEFI, since
it assumes the executable is loaded in the first 2 GB of memory.
Therefore, we use the large model instead, which can execute anywhere,
but uses absolute 64-bit wide quantities for all symbol references,
which is costly in terms of code size.
So switch to the PIE small code model, this uses 32-bit relative
references where possible, but does not make any assumptions about the
load address (i.e., all absolute symbol references are 64-bits wide).
Note that, due to the 'protected' visibility pragma introduced in an
earlier patch, there is no need for the EDK2 build system to deal with
GOT related ELF relocation types.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-By: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Now that we switched to the __builtin_ms_va_list VA_LIST type for
GCC/X64, we can trust the compiler to do the right thing even under
optimization, and so we can enable -Os optimization all the way back
to GCC44, and drop the -D define that prevents the use of the __builtin
VA_LIST types. Note that this requires the -maccumulate-outgoing-args
switch as well.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-By: Liming Gao <liming.gao@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
NASM had been unable to assemble segment register operations before the
following git commit:
http://repo.or.cz/nasm.git/commitdiff/21d4ccc3c338
That commit was first released in NASM 2.10:
http://repo.or.cz/nasm.git/commitdiff/ff62f33da0a2
This makes NASM 2.07 unusable for edk2 in general, because now we have a
lot of X64 assembly code that works with segment registers. For example
in:
UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
Bump the minimum required version to 2.10, for use with GCC toolchains.
Furthermore, list NASM 2.12.01 as a requirement for all other toolchains.
In particular, for source level debugging, VS20xx requires CodeView 8
debug symbols, and only NASM 2.12.01 and later produce those. (Suggested
by Liming, Mike, and Andrew.)
Cc: Andrew Fish <afish@apple.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Ref: http://thread.gmane.org/gmane.comp.bios.edk2.devel/14612
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
By default, the ARM architectures have unsigned chars, whereas the other
architectures supported by EDK2 by default have signed chars.
However, EDK2 uses -funsigned-chars on those architectures to change the
default behaviour.
Unfortunately, the ARM architectures explicitly break their default
behaviour by specifying -fsigned-chars (I presume in a pre-emptive
attempt at avoiding incompatibility).
Since this situation is already confusing enough, switch the ARM
architectures to also specify -funsigned-chars explicitly rather than
just dropping the current parameter.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Remove /Oi from Visual Studio tool chains. because of the following reasons:
1. Intrinsic is Compiler-dependent.
2. Adding /Oi (Generate Intrinsic Functions) doesn't promise 100% replacing
the function call with inline functions.
/Oi is only a request, but doesn't force, the compilers to use the intrinsic.
The visual studio optimizer can still use the library version.
3. Since EDK2 doesn't include Visual Studio header files, intrinsic function
should not be used.
Built Nt32Pkg, OvmfPkg, ShellPkg, MdeModulePkg and CryptoPkg successfully.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Cinnamon Shia <cinnamon.shia@hpe.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Qin Long <qin.long@intel.com>
When building AARCH64 platforms that include a Shell binary built from
source, we run into trouble when using the tiny code model for DEBUG
builds. The reason is that the Shell binary built in DEBUG mode exceeds
the 1 MB range of the ADR instruction, so anything that gets pulled into
the final link of the Shell binary either needs to be built with the small
or large model, or needs to be sorted in some way to put the ADR references
close to their targets.
Since code size is not a big concern for DEBUG builds anyway, let's move
to the small code model for all modules when using DEBUG GCC49. This way,
there is no need for workarounds that are specific to UEFI_APPLICATION
modules in general, or the Shell application in particular.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
This aligns the GCC definitions for 4.6 and up to align with the ARM and
AARCH64 definitions, which is to ignore unused but set variables only on
RELEASE builds. This allows us to find instances of unused variables that
are left behind after refactoring. It also allows us to find bad new code,
which, due to the EDK2 coding style which disallows initialized automatic
variables, may contain such variables without having been noticed by other
toolchains.
(Slightly edited) observation from Jordan Justen
<jordan.l.justen@intel.com>: RELEASE builds must keep the flag because
debug code (such as assertions) may collapse to nothing -- e.g. if a
platform defines MDEPKG_NDEBUG for RELEASE -- and therefore trigger the
warning.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
[lersek@redhat.com: incorporate commit message update from Jordan]
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Newer GCC compilers use a default of march higher than i586
for -m32 (IA32 configuration) and this is causing generation of
instructions that are not compatible with all IA32 targets.
Specically Galileo platform support in the QuarkPlatformPkg does
not boot if GCC48 or higher is used.
This is similar to the following checkin that was done to address
this same issue for VS2012 and higher tool chains:
SHA-1: 71028ba2c4
Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leroy Leahy <leroy.p.leahy@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
There are no functional changes in this patch.
The only change is to the XML format, updated using Visual Studio
Edit->Advanced->Format Document.
Different XML Schema editors use different formats for indentation and
line breaks. Visual Studio 2013 uses a two space indentation for content.
Cc: Zhu Yonghong <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Larry Hauch <larry.hauch@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
GCC for AARCH64 recognizes byte swapping load and store sequences
and may replace them with wider loads or stores combined with rev
instructions. In some cases (i.e., with GCC version 5 and later)
this may result in unaligned accesses, which are not allowed before
we turn the MMU on.
So build any modules or static libraries that may execute with the MMU
off with -mstrict-align. Other modules don't need this switch, so we
can remove it from the CLANG35/AARCH64 common CC flags.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19638 6f19259b-4bc3-4df7-8a09-765794883524
Laszlo Ersek
Ard Biesheuvel
zhijufan
Liming Gao
Yonghong Zhu
Pete Batard
Thomas Lamprecht
Shi, Steven
Chris Ruffin
dann frazier
Michael Kinney
Song, BinX
Marvin Haeuser
Leif Lindholm
Cinnamon Shia
Larry Hauch