The traversing of a Memory Mapped FV can overflow the 4GB limit on a 32bit system
during the setting up a Linked List of FFS file inside the FV.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16527 6f19259b-4bc3-4df7-8a09-765794883524
Fix DxeCore NotifyFwVolBlock() function to make sure FV protocol is installed for all valid PI FV images.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Guo Dong <guo.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16496 6f19259b-4bc3-4df7-8a09-765794883524
Move the check of FV Header signature and file system to
GetFwVolHeader() to avoid reading the whole unexpected FvHeader.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16255 6f19259b-4bc3-4df7-8a09-765794883524
The code FvCheck() will check FFS file checksum to verify if FFS file is valid when the file is
with FFS_ATTRIB_CHECKSUM set. The whole file will be read through when doing checksum check.
So we can cache FFS file to memory buffer for following checksum calculating first.
And then, the cached file buffer can be also used for FvReadFile.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15958 6f19259b-4bc3-4df7-8a09-765794883524
Previous DxeCore FwVol code will cache whole FvMain FV from flash that may be
uncached if platform reports FvMain FVB, it will impact DXE performance.
The code already has file level cache, so don’t need to cache memory mapped IO FV.
It can also reduce memory consumption of caching memory mapped IO FVs.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15916 6f19259b-4bc3-4df7-8a09-765794883524
Minor cleanup the coding style: #include <DxeMain.h> should be changed to #include "DxeMain.h" since "DxeMain.h" is not pubic header fie.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@5742 6f19259b-4bc3-4df7-8a09-765794883524
1) PeiMain:
- Use PCD for bundle of status code which definitions are put into MdePkg.dec file.
2) DxeMain:
- Use PCD for bundle of status code which definitions are put into MdePkg.dec file.
- Do not produce SectionExtraction protocol which is belong to IntelFramework specification.
- Update many macro for PI specifications.
3) DxeIpl
- Use PCD for bundle of status code which definitions are put into MdePkg.dec file.
4) Add SectionExtractionDxe module (IntelFrameworkModulePkg)
- This module will produce EFI_SECTION_EXTRACTION_PROTOCOL defined in framework specification. If a old platform want to use this protocol, then this platform need dispatch this DXE driver.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@4376 6f19259b-4bc3-4df7-8a09-765794883524
First round of PI enabling work:
1) PiPeiCis changes (CONST, EFI_PEI_FILE_HANDLE.. etc)
2) Make use of FirmwareVolume 2 protocol.
3) Verified for Nt32Pkg and real platform for S3.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@3773 6f19259b-4bc3-4df7-8a09-765794883524