A DMA-like transfer interface has recently been implemented in QEMU for
fw-cfg. For ARM and AARCH64 virtual machines, the binding prescribes a new
8-byte wide register at offset 0x10 in the register block. Make VirtFdtDxe
expose this register if it is present.
Please see "docs/specs/fw_cfg.txt" in the QEMU tree for more information.
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18544 6f19259b-4bc3-4df7-8a09-765794883524
Now that the ARM BDS has been removed, there is a remaining BdsLib
dependency in ArmVirtXen that has now become unresolved. So re-add
the BdsLib resolution that we removed from ArmVirt.dsc.inc to
ArmVirtXen.dsc
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18156 6f19259b-4bc3-4df7-8a09-765794883524
The PcdFirmwareVendor PCD was never used on this platform, since
it has never supported the ARM BDS. So remove it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18154 6f19259b-4bc3-4df7-8a09-765794883524
In order to allow a ArmGicArchLib to be implemented that returns
the supported GIC revision based on the device tree, add handling
to VirtFdtDxe to record the GIC revision at DT parsing time.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18101 6f19259b-4bc3-4df7-8a09-765794883524