For MM, gMmProfileDataHobGuid Memory Allocation HOB is defined to
indicate SMM profile feature enabled or not. If the HOB exist, SMM
profile base address and size will be returned in the HOB, so no need
to consume the PcdCpuSmmProfileEnable feature PCD to check enable or
disable.
To achieve above purpose, Add the IsSmmProfileEnabled () function.
With this change, Both MM and SMM can use the new function for
SMM profile feature check.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
For MM:
SMRAM & PageTable itself & SMM Paging State shall be configured
once the gEdkiiPiMmMemoryAttributesTableGuid is installed by
SMM core. It will happen after MmIpl.Entrypoint.
PerformRemainingTasks will be called before MmIpl.Entrypoint
exit.
For SMM:
SMRAM & PageTable itself & SMM Paging State are still
configured in the first SMI when SMM ready to lock happen.
So, this patch is to differentiate PerformRemainingTasks for MM
and SMM.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
For MM:
CodeAccessCheck is designed to enable in the MM CPU Driver Entry
Point.
For SMM:
CodeAccessCheck is still enabled in the first SMI when SMM ready
to lock happen.
This patch enables the CodeAccessCheck in MM CPU Driver Entry
Point for MM support.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
For MM:
Since all accessible NON-MMRAM memory and attribute shall be in
ResourceDescriptor HOBs for MM, the page table for MM can be finalized
and created in the default Page.
For SMM:
There are still 2 steps for the finalized default Page:
1. Create default Page
2. update the page table in the first SMI when SMM ready to lock
happen
This patch to refactor the GenSmmPageTable() function to create the
default Page Table for Both SMM and MM:
1. Create NonMmram MemoryRegion
2. Gen NonMmram MemoryRegion PageTable
3. Gen MMRAM Range PageTable
4. Consider PcdCpuSmmStackGuard & PcdNullPointerDetectionPropertyMask
cases.
Meanwhile, mXdSupported needs to be initialized before GenSmmPageTable since
it's required by GenSmmPageTable function. So, move the mXdSupported init
from CheckFeatureSupported to the common EntryPoint function.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
MM CPU can not use the dynamic PCD (PcdCpuMaxLogicalProcessorNumber),
so move the PCD usage to DxeSmm.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
Define the mIsStandaloneMm to indicate it's the MM_STANDALONE MM CPU
driver or DXE_SMM_DRIVER SMM CPU driver execution.
With mIsStandaloneMm, GetMpInformationFromMpServices() can be skipped
for the MM CPU since it can not call the
GetMpInformationFromMpServices() due to the NON-SMM MP Services usage
for the MP Information.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
MM can not call GetUefiMemoryMap() function, so, move it into
DxeSmm code. Define a SmmReadyToLockEventNotify to handler the
logic. This will make PiSmmCpuEntryCommon to be common function
for SMM and MM.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
MM can not use the SMM Access Protocol, so get SMRAM info from
gEfiSmmSmramMemoryGuid instead of via SMM Access Protocol for both SMM
and MM.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
Move common code into PiSmmCpuCommon.c to facilitate common usage
in both SMM and MM. The PiSmmCpuCommon.h will be utilized for both
modes in subsequent patches.
No function impact.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
Jiaxin Wu