Commit Graph

20 Commits

Author SHA1 Message Date
Yonghong Zhu a754c70cee BaseTools/GenFw: Fix a bug for GCC build
current GCC build report error: 'for' loop initial declarations are only
allowed in C99 or C11 mode, the patch fix this failure.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-02-18 11:25:54 +08:00
Michael LeMay ea3e924a0c BaseTools/GenFw: Correct datatypes in diagnostic messages and check for string termination
This patch revises multiple diagnostic messages to use correct
datatypes.  It also checks that a symbol name that is about to be used
in a diagnostic message is terminated by a null character within the
contents of the string table section so that the print routine does
not read past the end of the string table section contents when
reading the symbol name.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael LeMay <michael.lemay@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2016-02-17 13:23:59 +08:00
Michael LeMay 621bb723a4 BaseTools/GenFw: Enhance error message for bad symbol definitions
This patch expands the error message that is output when GenFw
encounters a bad symbol definition or an unsupported symbol type.  It
displays the symbol name, the symbol address, and a message that
describes both possibilities (bad symbol definition or unsupported
symbol type).  It also provides two examples of unsupported symbol
types.

Furthermore, this patch revises the conditional for detecting bad
symbol definitions to eliminate a redundant test (a Sym->st_shndx
value of SHN_ABS should certainly be greater than mEhdr->e_shnum) and
to change another test from 'Sym->st_shndx > mEhdr->e_shnum' to
'Sym->st_shndx >= mEhdr->e_shnum' for consistency with the test in
GetShdrByIndex.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael LeMay <michael.lemay@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2016-02-17 13:21:44 +08:00
Michael LeMay 17751c5fa4 BaseTools/GenFw: Exit with error when header lookup fails
This patch revises GetPhdrByIndex and GetShdrByIndex to cause GenFw to
exit with an error message when a section header lookup fails.  The
current behavior of those functions in such circumstances is to return
NULL, which can cause GenFw to subsequently fault when it attempts to
dereference the null pointer.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael LeMay <michael.lemay@intel.com>
Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2016-02-17 13:17:26 +08:00
Yonghong Zhu 5aec6991e7 BaseTools: Update BaseTools to pass VS2015 compiler
Fix some errors to pass VS2015 compiler.
1. warning C4456: declaration of xxx hides previous local declaration
2. warning C4005: 'UINT8_MAX': macro redefinition

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu <yonghong.zhu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19768 6f19259b-4bc3-4df7-8a09-765794883524
2016-01-29 04:54:37 +00:00
Ard Biesheuvel 088dc24508 BaseTools/GenFw RVCT: fix relocation processing of PT_DYNAMIC sections
Unlike GNU ld, which can be instructed to emit symbol based static
relocations into fully linked binaries using the --emit-relocs command
line switch, the RVCT armlink tool can only emit dynamic relocations
into the PT_DYNAMIC segment.

This has two consequences
. we can only identify absolute relocations, so there is no way to fix
  up relative relocations between sections, or check their validity in
  the PE/COFF layout
. the r_offset fields of the PT_DYNAMIC DT_REL entries are relative
  either to the base of the image or to any of its segments but *not* to
  the base of the input section that contains the location they refer
  to, and converting them to PE/COFF image offsets is non-trivial unless
  the sections are laid out in the same way in the ELF and PE/COFF
  versions of the binary.

There is really only one way to deal with this, and that is to require
that the ELF and PE/COFF versions of the binary are identical in memory.
So enforce that in the code.

Also, fix the utterly broken relocation fixup code that dereferences
ELF32_R_SYM(r_info) both as a 1-based program header index and a 0-based
section header index. If this code ever produced working binaries, it
was purely by chance.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19236 6f19259b-4bc3-4df7-8a09-765794883524
2015-12-14 07:56:02 +00:00
Ard Biesheuvel 3164361121 BaseTools/GenFw ARM: allow R_ARM_REL32 relocations
R_ARM_REL32 are relative relocations, so we don't need to do anything
special when performing the ELF to PE/COFF conversion, since our memory
layout is identical between the two binary formats. So just allow them.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18931 6f19259b-4bc3-4df7-8a09-765794883524
2015-11-24 08:40:33 +00:00
Ard Biesheuvel 0bd0d6dff6 BaseTools/GenFw: disable RVCT linker size optimization
Disable the RVCT size optimization that may put sections at an offset
that is not aligned to their own alignment, by adding the --no_legacyalign
switch to the RVCT linker command line. This is necessary since such sections
cannot be correctly converted into PE/COFF sections without padding them at
the front, which defeats the purpose of the optimization anyway.

With the optimization gone, we can also remove the special case for ARM in
GenFw that could result in corrupt PE/COFF images to be emitted. Instead,
sections whose base address is not aligned correctly are outright rejected.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18540 6f19259b-4bc3-4df7-8a09-765794883524
2015-09-24 19:35:16 +00:00
Ard Biesheuvel 4f7d5c6792 BaseTools/GenFw: align RVA of debug
SVN commit r18077 ("BaseTools/GenFw: move .debug contents to .data to
save space") removed the separate .debug section after moving its
contents into .text or .data. However, this change does not take into
account that some of these contents need to appear at a 32-bit aligned
offset. So align the debug data RVA to 32 bits.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18443 6f19259b-4bc3-4df7-8a09-765794883524
2015-09-11 07:07:06 +00:00
Ard Biesheuvel 02a5421f57 BaseTools/GenFw: move PE/COFF header closer to payload
The secondary header (not the DOS header) of a PE/COFF binary
does not reside at a fixed offset. Instead, its offset into the
file is recorded in the DOS header.

This gives us the flexibility to move it, along with the section
headers, to right before the first section if there is considerable
space before it, i.e., when the PE/COFF file alignment is substantially
larger than the size of the header.

Since the PE/COFF to TE conversion replaces everything before the
section headers with a simple TE header, this change removes all
the header padding from such images, leading to smaller files.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yingke Liu <yingke.d.liu@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18078 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-27 13:50:09 +00:00
Ard Biesheuvel 0192b71ca3 BaseTools/GenFw: move .debug contents to .data to save space
In order to reduce the memory footprint of PE/COFF images when
using large values for the PE/COFF section alignment, move the
contents of the .debug section to data, and point the debug data
directory entry to it. This allows us to drop the .debug section
entirely, as well as any associated rounding. Since our .debug
section only contains the filename of the ELF input image, the
penalty of keeping this data in a non-discardable section is
negligible.

Note that the PE/COFF spec v6.3 explicitly mentions that this is
allowed.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Yingke Liu <yingke.d.liu@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18077 6f19259b-4bc3-4df7-8a09-765794883524
2015-07-27 13:49:54 +00:00
Ard Biesheuvel 54b1b57a59 BaseTools: Update GenFw to support 4K alignment.
Get maximum section alignment from each ELF section, and this alignment is used to create PE header.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17727 6f19259b-4bc3-4df7-8a09-765794883524
2015-06-29 03:17:34 +00:00
Erik Bjorge 234f9ff96e BaseTools/GenFw: Set the PE/COFF attribute BaseOfData with the address of the first '.data' section
Before this change the alignment of the first data section was not taken into account.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Erik Bjorge <erik.c.bjorge@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16831 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-11 08:20:17 +00:00
Yingke Liu 97fa0ee9b1 License header updated to match correct format.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yingke Liu <yingke.d.liu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15971 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-28 13:53:34 +00:00
Gao, Liming f51461c829 Sync BaseTool trunk (version r2649) into EDKII BaseTools.
Signed-off-by: Gao, Liming <liming.gao@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15188 6f19259b-4bc3-4df7-8a09-765794883524
2014-01-27 05:23:15 +00:00
Liming Gao e8a47801a1 Sync BaseTool trunk (version r2610) into EDKII BaseTools.
Signed-off-by: Liming Gao <liming.gao@intel.com>


git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14856 6f19259b-4bc3-4df7-8a09-765794883524
2013-11-18 07:41:21 +00:00
lgao4 0d2711a693 Sync BaseTools Trunk (version r2387) to EDKII main trunk.
Signed-off-by: lgao4
Reviewed-by: gikidy

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12602 6f19259b-4bc3-4df7-8a09-765794883524
2011-10-29 06:59:30 +00:00
lgao4 da92f27632 Sync BaseTools Branch (version r2149) to EDKII main trunk.
BaseTool Branch:
  https://edk2-buildtools.svn.sourceforge.net/svnroot/edk2-buildtools/branches/Releases/BaseTools_r2100

  



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11640 6f19259b-4bc3-4df7-8a09-765794883524
2011-05-11 10:26:49 +00:00
lgao4 756ad8f8e9 Sync EDKII BaseTools to BaseTools project r2006.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10764 6f19259b-4bc3-4df7-8a09-765794883524
2010-08-03 03:29:17 +00:00
lgao4 40d841f6a8 Sync EDKII BaseTools to BaseTools project r1971
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10502 6f19259b-4bc3-4df7-8a09-765794883524
2010-05-18 05:04:32 +00:00