90be222196
Fix an issue on FixedMtreProgramming - AND/OR mask incorrect.
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Contributed-under: TianoCore Contribution Agreement 1.0
signed-off by: Yao, Jiewen <jiewen.yao@intel.com>
reviewed by: Rangarajan, Ravi P <ravi.p.rangarajan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16181 6f19259b-4bc3-4df7-8a09-765794883524
2014-09-28 01:07:13 +00:00
fa7fadf78e
IntelFspPkg BaseCacheLib: State CacheAsRamLib in its inf, because it consumes DisableCacheAsRam() that is the interface of CacheAsRamLib.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15877 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-22 01:23:28 +00:00
a81fcd30c1
Eliminate duplicated file GUID.
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Eliminate duplicate GUID definition.
Do explicit data cast.
Use StrnCpy instead of StrCpy.
Update GCC assembly.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed off by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Eric Dong <eric.dong@intel.com>
Reviewed by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15762 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-06 13:27:14 +00:00
c8ec22a266
Add IntelFspPkg to support create FSP bin based on EDKII.
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed off by: Ravi Rangarajan <ravi.p.rangarajan@intel.com>
Reviewed by: Maurice Ma <maurice.ma@intel.com>
Reviewed by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed by: Giri Mudusuru <giri.p.mudusuru@intel.com>
Reviewed by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15705 6f19259b-4bc3-4df7-8a09-765794883524
2014-07-29 02:21:52 +00:00
jyao1
Star Zeng