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Author SHA1 Message Date
Michael D Kinney 9672cd3056 IntelFsp2Pkg: Replace BSD License with BSD+Patent License 
https://bugzilla.tianocore.org/show_bug.cgi?id=1373

Replace BSD 2-Clause License with BSD+Patent License.  This change is
based on the following emails:

  https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html
  https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html

RFCs with detailed process for the license change:

  V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html
  V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html
  V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
 2019-04-09 10:58:03 -07:00
Chasel, Chiu e3b8fd1185 IntelFsp2Pkg: Remove unused keyword in new PPI header 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1477

There was unused keyword added in FspmArchConfigPpi.h
header block and should be removed.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
 2019-01-21 15:49:02 +08:00
Chasel, Chiu 3837e2e038 IntelFsp2Pkg: Add FspmArchConfigPpi to support Dispatch mode 
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1381

In Dispatch mode FSP may consume PPI directly so creating
FSPM_ARCH_CONFIG_PPI to align with FSPM_ARCH_UPD.
Also Keeps new structure size 8 bytes alignment as other
structures.

Test: Verified on internal platform to boot with this PPI
installed successfully.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
 2019-01-17 07:37:16 +08:00