//++
// Copyright (c) 2004, Intel Corporation. All rights reserved.
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
// Module Name:
//
// SwitchStack.s
//
// Abstract:
//
// Contains an implementation of a stack switch for the Itanium-based architecture.
//
//
//
// Revision History:
//
//--
.file "SwitchStack.s"
#include
#include
// Define hardware RSE Configuration Register
//
// RS Configuration (RSC) bit field positions
#define RSC_MODE 0
#define RSC_PL 2
#define RSC_BE 4
// RSC bits 5-15 reserved
#define RSC_MBZ0 5
#define RSC_MBZ0_V 0x3ff
#define RSC_LOADRS 16
#define RSC_LOADRS_LEN 14
// RSC bits 30-63 reserved
#define RSC_MBZ1 30
#define RSC_MBZ1_V 0x3ffffffffULL
// RSC modes
// Lazy
#define RSC_MODE_LY (0x0)
// Store intensive
#define RSC_MODE_SI (0x1)
// Load intensive
#define RSC_MODE_LI (0x2)
// Eager
#define RSC_MODE_EA (0x3)
// RSC Endian bit values
#define RSC_BE_LITTLE 0
#define RSC_BE_BIG 1
// RSC while in kernel: enabled, little endian, pl = 0, eager mode
#define RSC_KERNEL ((RSC_MODE_EA<