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904b002c50
Use newly defined cache management operations for RISC-V where possible It builds up on the support added for RISC-V cache management instructions in BaseLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Pedro Falcato <pedro.falcato@gmail.com> Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Pedro Falcato <pedro.falcato@gmail.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
64 lines
1.5 KiB
INI
64 lines
1.5 KiB
INI
## @file
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# Instance of Cache Maintenance Library using Base Library services.
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#
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# Cache Maintenance Library that uses Base Library services to maintain caches.
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# This library assumes there are no chipset dependencies required to maintain caches.
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#
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# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
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# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
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# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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#
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##
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = BaseCacheMaintenanceLib
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MODULE_UNI_FILE = BaseCacheMaintenanceLib.uni
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FILE_GUID = 123dd843-57c9-4158-8418-ce68b3944ce7
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MODULE_TYPE = BASE
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VERSION_STRING = 1.1
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LIBRARY_CLASS = CacheMaintenanceLib
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#
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# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
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#
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[Sources.IA32]
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X86Cache.c
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[Sources.X64]
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X86Cache.c
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[Sources.EBC]
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EbcCache.c
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[Sources.ARM]
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ArmCache.c
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[Sources.AARCH64]
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ArmCache.c
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[Sources.RISCV64]
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RiscVCache.c
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[Sources.LOONGARCH64]
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LoongArchCache.c
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[Packages]
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MdePkg/MdePkg.dec
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[LibraryClasses]
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BaseLib
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DebugLib
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[LibraryClasses.RISCV64]
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PcdLib
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[Pcd.RISCV64]
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gEfiMdePkgTokenSpaceGuid.PcdRiscVFeatureOverride ## CONSUMES
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