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3f8fb8aeb9
Adding PeiServicesTablePointerLibKs0 for LoongArch64, which provides setting and getting the PEI service table pointer through the CSR KS0 register. The idea of this library is derived from ArmPkg/Library/PeiServicesTablePointerLib/ BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
88 lines
2.6 KiB
C
88 lines
2.6 KiB
C
/** @file
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PEI Services Table Pointer Library For Reigseter Mechanism.
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This library is used for PEIM which does executed from flash device directly but
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executed in memory.
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Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<BR>
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Copyright (c) 2024 Loongson Technology Corporation Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <PiPei.h>
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#include <Library/DebugLib.h>
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#include <Library/PeiServicesTablePointerLib.h>
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#include <Register/LoongArch64/Csr.h>
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/**
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Caches a pointer PEI Services Table.
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Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer
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in a platform specific manner.
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If PeiServicesTablePointer is NULL, then ASSERT().
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@param PeiServicesTablePointer The address of PeiServices pointer.
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**/
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VOID
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EFIAPI
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SetPeiServicesTablePointer (
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IN CONST EFI_PEI_SERVICES **PeiServicesTablePointer
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)
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{
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ASSERT (PeiServicesTablePointer != NULL);
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CsrWrite (LOONGARCH_CSR_KS0, (UINTN)PeiServicesTablePointer);
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}
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/**
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Retrieves the cached value of the PEI Services Table pointer.
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Returns the cached value of the PEI Services Table pointer in a CPU specific manner
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as specified in the CPU binding section of the Platform Initialization Pre-EFI
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Initialization Core Interface Specification.
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If the cached PEI Services Table pointer is NULL, then ASSERT().
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@return The pointer to PeiServices.
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**/
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CONST EFI_PEI_SERVICES **
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EFIAPI
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GetPeiServicesTablePointer (
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VOID
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)
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{
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CONST EFI_PEI_SERVICES **PeiServices;
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PeiServices = (CONST EFI_PEI_SERVICES **)(CsrRead (LOONGARCH_CSR_KS0));
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ASSERT (PeiServices != NULL);
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return PeiServices;
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}
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/**
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Perform CPU specific actions required to migrate the PEI Services Table
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pointer from temporary RAM to permanent RAM.
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For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
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immediately preceding the Interrupt Descriptor Table (IDT) in memory.
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For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
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immediately preceding the Interrupt Descriptor Table (IDT) in memory.
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For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer
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is stored in a dedicated CPU register. This means that there is no
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memory storage associated with storing the PEI Services Table pointer,
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so no additional migration actions are required for Itanium, ARM and
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LoongArch CPUs.
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**/
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VOID
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EFIAPI
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MigratePeiServicesTablePointer (
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VOID
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)
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{
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return;
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}
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