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0acd869796
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
55 lines
1.2 KiB
Plaintext
55 lines
1.2 KiB
Plaintext
;------------------------------------------------------------------------------
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; @file
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; First code exectuted by processor after resetting.
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;
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; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;------------------------------------------------------------------------------
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BITS 16
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ALIGN 16 ; 0xffffffd0
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applicationProcessorEntryPoint:
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;
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; Application Processors entry point
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;
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; GenFv generates code aligned on a 4k boundary which will jump to this
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; location. (0xffffffd0) This allows the Local APIC Startup IPI to be
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; used to wake up the application processors.
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;
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jmp short resetVector
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ALIGN 16 ; 0xffffffe0
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peiCoreEntryPoint:
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;
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; PEI Core entry point
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;
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; GenFv fills the address of the PEI Core into this location
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;
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DD 0x12345678
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ALIGN 16 ; 0xfffffff0
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resetVector:
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;
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; Reset Vector
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;
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; This is where the processor will begin execution
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;
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nop
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nop
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jmp near $
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ALIGN 8
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ApStartupSegment:
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DD 0x12345678
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BootFvBaseAddress:
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DD 0x12345678
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ALIGN 16 ; 0x100000000
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